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Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
-rw-r--r--arch/mips/kernel/cpu-probe.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 5e1b08b00a33..d00f8768e2a0 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -447,10 +447,10 @@ static inline unsigned int decode_config0(struct cpuinfo_mips *c)
447 isa = (config0 & MIPS_CONF_AT) >> 13; 447 isa = (config0 & MIPS_CONF_AT) >> 13;
448 switch (isa) { 448 switch (isa) {
449 case 0: 449 case 0:
450 c->isa_level = MIPS_CPU_ISA_M32; 450 c->isa_level = MIPS_CPU_ISA_M32R1;
451 break; 451 break;
452 case 2: 452 case 2:
453 c->isa_level = MIPS_CPU_ISA_M64; 453 c->isa_level = MIPS_CPU_ISA_M64R1;
454 break; 454 break;
455 default: 455 default:
456 panic("Unsupported ISA type, cp0.config0.at: %d.", isa); 456 panic("Unsupported ISA type, cp0.config0.at: %d.", isa);
@@ -568,7 +568,7 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c)
568 break; 568 break;
569 case PRID_IMP_34K: 569 case PRID_IMP_34K:
570 c->cputype = CPU_34K; 570 c->cputype = CPU_34K;
571 c->isa_level = MIPS_CPU_ISA_M32; 571 c->isa_level = MIPS_CPU_ISA_M32R1;
572 break; 572 break;
573 } 573 }
574} 574}
@@ -647,7 +647,7 @@ static inline void cpu_probe_philips(struct cpuinfo_mips *c)
647 switch (c->processor_id & 0xff00) { 647 switch (c->processor_id & 0xff00) {
648 case PRID_IMP_PR4450: 648 case PRID_IMP_PR4450:
649 c->cputype = CPU_PR4450; 649 c->cputype = CPU_PR4450;
650 c->isa_level = MIPS_CPU_ISA_M32; 650 c->isa_level = MIPS_CPU_ISA_M32R1;
651 break; 651 break;
652 default: 652 default:
653 panic("Unknown Philips Core!"); /* REVISIT: die? */ 653 panic("Unknown Philips Core!"); /* REVISIT: die? */
@@ -690,8 +690,8 @@ __init void cpu_probe(void)
690 if (c->options & MIPS_CPU_FPU) { 690 if (c->options & MIPS_CPU_FPU) {
691 c->fpu_id = cpu_get_fpu_id(); 691 c->fpu_id = cpu_get_fpu_id();
692 692
693 if (c->isa_level == MIPS_CPU_ISA_M32 || 693 if (c->isa_level == MIPS_CPU_ISA_M32R1 ||
694 c->isa_level == MIPS_CPU_ISA_M64) { 694 c->isa_level == MIPS_CPU_ISA_M64R1) {
695 if (c->fpu_id & MIPS_FPIR_3D) 695 if (c->fpu_id & MIPS_FPIR_3D)
696 c->ases |= MIPS_ASE_MIPS3D; 696 c->ases |= MIPS_ASE_MIPS3D;
697 } 697 }