diff options
Diffstat (limited to 'arch/mips/kernel/cevt-r4k.c')
-rw-r--r-- | arch/mips/kernel/cevt-r4k.c | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c index 50d3f5a8d6bb..bff124ae69fa 100644 --- a/arch/mips/kernel/cevt-r4k.c +++ b/arch/mips/kernel/cevt-r4k.c | |||
@@ -12,17 +12,10 @@ | |||
12 | #include <linux/smp.h> | 12 | #include <linux/smp.h> |
13 | #include <linux/irq.h> | 13 | #include <linux/irq.h> |
14 | 14 | ||
15 | #include <asm/smtc_ipi.h> | ||
16 | #include <asm/time.h> | 15 | #include <asm/time.h> |
17 | #include <asm/cevt-r4k.h> | 16 | #include <asm/cevt-r4k.h> |
18 | #include <asm/gic.h> | 17 | #include <asm/gic.h> |
19 | 18 | ||
20 | /* | ||
21 | * The SMTC Kernel for the 34K, 1004K, et. al. replaces several | ||
22 | * of these routines with SMTC-specific variants. | ||
23 | */ | ||
24 | |||
25 | #ifndef CONFIG_MIPS_MT_SMTC | ||
26 | static int mips_next_event(unsigned long delta, | 19 | static int mips_next_event(unsigned long delta, |
27 | struct clock_event_device *evt) | 20 | struct clock_event_device *evt) |
28 | { | 21 | { |
@@ -36,8 +29,6 @@ static int mips_next_event(unsigned long delta, | |||
36 | return res; | 29 | return res; |
37 | } | 30 | } |
38 | 31 | ||
39 | #endif /* CONFIG_MIPS_MT_SMTC */ | ||
40 | |||
41 | void mips_set_clock_mode(enum clock_event_mode mode, | 32 | void mips_set_clock_mode(enum clock_event_mode mode, |
42 | struct clock_event_device *evt) | 33 | struct clock_event_device *evt) |
43 | { | 34 | { |
@@ -47,7 +38,6 @@ void mips_set_clock_mode(enum clock_event_mode mode, | |||
47 | DEFINE_PER_CPU(struct clock_event_device, mips_clockevent_device); | 38 | DEFINE_PER_CPU(struct clock_event_device, mips_clockevent_device); |
48 | int cp0_timer_irq_installed; | 39 | int cp0_timer_irq_installed; |
49 | 40 | ||
50 | #ifndef CONFIG_MIPS_MT_SMTC | ||
51 | irqreturn_t c0_compare_interrupt(int irq, void *dev_id) | 41 | irqreturn_t c0_compare_interrupt(int irq, void *dev_id) |
52 | { | 42 | { |
53 | const int r2 = cpu_has_mips_r2; | 43 | const int r2 = cpu_has_mips_r2; |
@@ -82,8 +72,6 @@ out: | |||
82 | return IRQ_HANDLED; | 72 | return IRQ_HANDLED; |
83 | } | 73 | } |
84 | 74 | ||
85 | #endif /* Not CONFIG_MIPS_MT_SMTC */ | ||
86 | |||
87 | struct irqaction c0_compare_irqaction = { | 75 | struct irqaction c0_compare_irqaction = { |
88 | .handler = c0_compare_interrupt, | 76 | .handler = c0_compare_interrupt, |
89 | .flags = IRQF_PERCPU | IRQF_TIMER, | 77 | .flags = IRQF_PERCPU | IRQF_TIMER, |
@@ -170,7 +158,6 @@ int c0_compare_int_usable(void) | |||
170 | return 1; | 158 | return 1; |
171 | } | 159 | } |
172 | 160 | ||
173 | #ifndef CONFIG_MIPS_MT_SMTC | ||
174 | int r4k_clockevent_init(void) | 161 | int r4k_clockevent_init(void) |
175 | { | 162 | { |
176 | unsigned int cpu = smp_processor_id(); | 163 | unsigned int cpu = smp_processor_id(); |
@@ -225,4 +212,3 @@ int r4k_clockevent_init(void) | |||
225 | return 0; | 212 | return 0; |
226 | } | 213 | } |
227 | 214 | ||
228 | #endif /* Not CONFIG_MIPS_MT_SMTC */ | ||