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-rw-r--r--arch/mips/kernel/branch.c8
1 files changed, 2 insertions, 6 deletions
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index 7b2df224f041..4d7d99d601cc 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -144,7 +144,7 @@ int __mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
144 case mm_bc1t_op: 144 case mm_bc1t_op:
145 preempt_disable(); 145 preempt_disable();
146 if (is_fpu_owner()) 146 if (is_fpu_owner())
147 asm volatile("cfc1\t%0,$31" : "=r" (fcr31)); 147 fcr31 = read_32bit_cp1_register(CP1_STATUS);
148 else 148 else
149 fcr31 = current->thread.fpu.fcr31; 149 fcr31 = current->thread.fpu.fcr31;
150 preempt_enable(); 150 preempt_enable();
@@ -562,11 +562,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
562 case cop1_op: 562 case cop1_op:
563 preempt_disable(); 563 preempt_disable();
564 if (is_fpu_owner()) 564 if (is_fpu_owner())
565 asm volatile( 565 fcr31 = read_32bit_cp1_register(CP1_STATUS);
566 ".set push\n"
567 "\t.set mips1\n"
568 "\tcfc1\t%0,$31\n"
569 "\t.set pop" : "=r" (fcr31));
570 else 566 else
571 fcr31 = current->thread.fpu.fcr31; 567 fcr31 = current->thread.fpu.fcr31;
572 preempt_enable(); 568 preempt_enable();