diff options
Diffstat (limited to 'arch/mips/jmr3927/rbhma3100/setup.c')
-rw-r--r-- | arch/mips/jmr3927/rbhma3100/setup.c | 40 |
1 files changed, 8 insertions, 32 deletions
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c index 025434054ed0..138f25efe38a 100644 --- a/arch/mips/jmr3927/rbhma3100/setup.c +++ b/arch/mips/jmr3927/rbhma3100/setup.c | |||
@@ -170,12 +170,20 @@ static void jmr3927_machine_power_off(void) | |||
170 | while (1); | 170 | while (1); |
171 | } | 171 | } |
172 | 172 | ||
173 | static cycle_t jmr3927_hpt_read(void) | ||
174 | { | ||
175 | /* We assume this function is called xtime_lock held. */ | ||
176 | return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr; | ||
177 | } | ||
178 | |||
173 | #define USE_RTC_DS1742 | 179 | #define USE_RTC_DS1742 |
174 | #ifdef USE_RTC_DS1742 | 180 | #ifdef USE_RTC_DS1742 |
175 | extern void rtc_ds1742_init(unsigned long base); | 181 | extern void rtc_ds1742_init(unsigned long base); |
176 | #endif | 182 | #endif |
177 | static void __init jmr3927_time_init(void) | 183 | static void __init jmr3927_time_init(void) |
178 | { | 184 | { |
185 | clocksource_mips.read = jmr3927_hpt_read; | ||
186 | mips_hpt_frequency = JMR3927_TIMER_CLK; | ||
179 | #ifdef USE_RTC_DS1742 | 187 | #ifdef USE_RTC_DS1742 |
180 | if (jmr3927_have_nvram()) { | 188 | if (jmr3927_have_nvram()) { |
181 | rtc_ds1742_init(JMR3927_IOC_NVRAMB_ADDR); | 189 | rtc_ds1742_init(JMR3927_IOC_NVRAMB_ADDR); |
@@ -183,12 +191,8 @@ static void __init jmr3927_time_init(void) | |||
183 | #endif | 191 | #endif |
184 | } | 192 | } |
185 | 193 | ||
186 | unsigned long jmr3927_do_gettimeoffset(void); | ||
187 | |||
188 | void __init plat_timer_setup(struct irqaction *irq) | 194 | void __init plat_timer_setup(struct irqaction *irq) |
189 | { | 195 | { |
190 | do_gettimeoffset = jmr3927_do_gettimeoffset; | ||
191 | |||
192 | jmr3927_tmrptr->cpra = JMR3927_TIMER_CLK / HZ; | 196 | jmr3927_tmrptr->cpra = JMR3927_TIMER_CLK / HZ; |
193 | jmr3927_tmrptr->itmr = TXx927_TMTITMR_TIIE | TXx927_TMTITMR_TZCE; | 197 | jmr3927_tmrptr->itmr = TXx927_TMTITMR_TIIE | TXx927_TMTITMR_TZCE; |
194 | jmr3927_tmrptr->ccdr = JMR3927_TIMER_CCD; | 198 | jmr3927_tmrptr->ccdr = JMR3927_TIMER_CCD; |
@@ -200,34 +204,6 @@ void __init plat_timer_setup(struct irqaction *irq) | |||
200 | 204 | ||
201 | #define USECS_PER_JIFFY (1000000/HZ) | 205 | #define USECS_PER_JIFFY (1000000/HZ) |
202 | 206 | ||
203 | unsigned long jmr3927_do_gettimeoffset(void) | ||
204 | { | ||
205 | unsigned long count; | ||
206 | unsigned long res = 0; | ||
207 | |||
208 | /* MUST read TRR before TISR. */ | ||
209 | count = jmr3927_tmrptr->trr; | ||
210 | |||
211 | if (jmr3927_tmrptr->tisr & TXx927_TMTISR_TIIS) { | ||
212 | /* timer interrupt is pending. use Max value. */ | ||
213 | res = USECS_PER_JIFFY - 1; | ||
214 | } else { | ||
215 | /* convert to usec */ | ||
216 | /* res = count / (JMR3927_TIMER_CLK / 1000000); */ | ||
217 | res = (count << 7) / ((JMR3927_TIMER_CLK << 7) / 1000000); | ||
218 | |||
219 | /* | ||
220 | * Due to possible jiffies inconsistencies, we need to check | ||
221 | * the result so that we'll get a timer that is monotonic. | ||
222 | */ | ||
223 | if (res >= USECS_PER_JIFFY) | ||
224 | res = USECS_PER_JIFFY-1; | ||
225 | } | ||
226 | |||
227 | return res; | ||
228 | } | ||
229 | |||
230 | |||
231 | //#undef DO_WRITE_THROUGH | 207 | //#undef DO_WRITE_THROUGH |
232 | #define DO_WRITE_THROUGH | 208 | #define DO_WRITE_THROUGH |
233 | #define DO_ENABLE_CACHE | 209 | #define DO_ENABLE_CACHE |