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-rw-r--r--arch/mips/include/asm/asmmacro.h15
-rw-r--r--arch/mips/include/asm/fpu.h4
-rw-r--r--arch/mips/include/asm/ftrace.h20
-rw-r--r--arch/mips/include/asm/syscall.h10
-rw-r--r--arch/mips/include/uapi/asm/inst.h4
-rw-r--r--arch/mips/include/uapi/asm/unistd.h18
6 files changed, 46 insertions, 25 deletions
diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h
index 3220c93ea981..4225e99bd7bf 100644
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -9,6 +9,7 @@
9#define _ASM_ASMMACRO_H 9#define _ASM_ASMMACRO_H
10 10
11#include <asm/hazards.h> 11#include <asm/hazards.h>
12#include <asm/asm-offsets.h>
12 13
13#ifdef CONFIG_32BIT 14#ifdef CONFIG_32BIT
14#include <asm/asmmacro-32.h> 15#include <asm/asmmacro-32.h>
@@ -54,11 +55,21 @@
54 .endm 55 .endm
55 56
56 .macro local_irq_disable reg=t0 57 .macro local_irq_disable reg=t0
58#ifdef CONFIG_PREEMPT
59 lw \reg, TI_PRE_COUNT($28)
60 addi \reg, \reg, 1
61 sw \reg, TI_PRE_COUNT($28)
62#endif
57 mfc0 \reg, CP0_STATUS 63 mfc0 \reg, CP0_STATUS
58 ori \reg, \reg, 1 64 ori \reg, \reg, 1
59 xori \reg, \reg, 1 65 xori \reg, \reg, 1
60 mtc0 \reg, CP0_STATUS 66 mtc0 \reg, CP0_STATUS
61 irq_disable_hazard 67 irq_disable_hazard
68#ifdef CONFIG_PREEMPT
69 lw \reg, TI_PRE_COUNT($28)
70 addi \reg, \reg, -1
71 sw \reg, TI_PRE_COUNT($28)
72#endif
62 .endm 73 .endm
63#endif /* CONFIG_MIPS_MT_SMTC */ 74#endif /* CONFIG_MIPS_MT_SMTC */
64 75
@@ -106,7 +117,7 @@
106 .endm 117 .endm
107 118
108 .macro fpu_save_double thread status tmp 119 .macro fpu_save_double thread status tmp
109#if defined(CONFIG_MIPS64) || defined(CONFIG_CPU_MIPS32_R2) 120#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)
110 sll \tmp, \status, 5 121 sll \tmp, \status, 5
111 bgez \tmp, 10f 122 bgez \tmp, 10f
112 fpu_save_16odd \thread 123 fpu_save_16odd \thread
@@ -159,7 +170,7 @@
159 .endm 170 .endm
160 171
161 .macro fpu_restore_double thread status tmp 172 .macro fpu_restore_double thread status tmp
162#if defined(CONFIG_MIPS64) || defined(CONFIG_CPU_MIPS32_R2) 173#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)
163 sll \tmp, \status, 5 174 sll \tmp, \status, 5
164 bgez \tmp, 10f # 16 register mode? 175 bgez \tmp, 10f # 16 register mode?
165 176
diff --git a/arch/mips/include/asm/fpu.h b/arch/mips/include/asm/fpu.h
index cfe092fc720d..58e50cbdb1a6 100644
--- a/arch/mips/include/asm/fpu.h
+++ b/arch/mips/include/asm/fpu.h
@@ -57,7 +57,7 @@ static inline int __enable_fpu(enum fpu_mode mode)
57 return 0; 57 return 0;
58 58
59 case FPU_64BIT: 59 case FPU_64BIT:
60#if !(defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_MIPS64)) 60#if !(defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_64BIT))
61 /* we only have a 32-bit FPU */ 61 /* we only have a 32-bit FPU */
62 return SIGFPE; 62 return SIGFPE;
63#endif 63#endif
@@ -74,6 +74,8 @@ static inline int __enable_fpu(enum fpu_mode mode)
74 default: 74 default:
75 BUG(); 75 BUG();
76 } 76 }
77
78 return SIGFPE;
77} 79}
78 80
79#define __disable_fpu() \ 81#define __disable_fpu() \
diff --git a/arch/mips/include/asm/ftrace.h b/arch/mips/include/asm/ftrace.h
index ce35c9af0c28..992aaba603b5 100644
--- a/arch/mips/include/asm/ftrace.h
+++ b/arch/mips/include/asm/ftrace.h
@@ -22,12 +22,12 @@ extern void _mcount(void);
22#define safe_load(load, src, dst, error) \ 22#define safe_load(load, src, dst, error) \
23do { \ 23do { \
24 asm volatile ( \ 24 asm volatile ( \
25 "1: " load " %[" STR(dst) "], 0(%[" STR(src) "])\n"\ 25 "1: " load " %[tmp_dst], 0(%[tmp_src])\n" \
26 " li %[" STR(error) "], 0\n" \ 26 " li %[tmp_err], 0\n" \
27 "2:\n" \ 27 "2:\n" \
28 \ 28 \
29 ".section .fixup, \"ax\"\n" \ 29 ".section .fixup, \"ax\"\n" \
30 "3: li %[" STR(error) "], 1\n" \ 30 "3: li %[tmp_err], 1\n" \
31 " j 2b\n" \ 31 " j 2b\n" \
32 ".previous\n" \ 32 ".previous\n" \
33 \ 33 \
@@ -35,8 +35,8 @@ do { \
35 STR(PTR) "\t1b, 3b\n\t" \ 35 STR(PTR) "\t1b, 3b\n\t" \
36 ".previous\n" \ 36 ".previous\n" \
37 \ 37 \
38 : [dst] "=&r" (dst), [error] "=r" (error)\ 38 : [tmp_dst] "=&r" (dst), [tmp_err] "=r" (error)\
39 : [src] "r" (src) \ 39 : [tmp_src] "r" (src) \
40 : "memory" \ 40 : "memory" \
41 ); \ 41 ); \
42} while (0) 42} while (0)
@@ -44,12 +44,12 @@ do { \
44#define safe_store(store, src, dst, error) \ 44#define safe_store(store, src, dst, error) \
45do { \ 45do { \
46 asm volatile ( \ 46 asm volatile ( \
47 "1: " store " %[" STR(src) "], 0(%[" STR(dst) "])\n"\ 47 "1: " store " %[tmp_src], 0(%[tmp_dst])\n"\
48 " li %[" STR(error) "], 0\n" \ 48 " li %[tmp_err], 0\n" \
49 "2:\n" \ 49 "2:\n" \
50 \ 50 \
51 ".section .fixup, \"ax\"\n" \ 51 ".section .fixup, \"ax\"\n" \
52 "3: li %[" STR(error) "], 1\n" \ 52 "3: li %[tmp_err], 1\n" \
53 " j 2b\n" \ 53 " j 2b\n" \
54 ".previous\n" \ 54 ".previous\n" \
55 \ 55 \
@@ -57,8 +57,8 @@ do { \
57 STR(PTR) "\t1b, 3b\n\t" \ 57 STR(PTR) "\t1b, 3b\n\t" \
58 ".previous\n" \ 58 ".previous\n" \
59 \ 59 \
60 : [error] "=r" (error) \ 60 : [tmp_err] "=r" (error) \
61 : [dst] "r" (dst), [src] "r" (src)\ 61 : [tmp_dst] "r" (dst), [tmp_src] "r" (src)\
62 : "memory" \ 62 : "memory" \
63 ); \ 63 ); \
64} while (0) 64} while (0)
diff --git a/arch/mips/include/asm/syscall.h b/arch/mips/include/asm/syscall.h
index 33e8dbfc1b63..f35b131977e6 100644
--- a/arch/mips/include/asm/syscall.h
+++ b/arch/mips/include/asm/syscall.h
@@ -13,6 +13,7 @@
13#ifndef __ASM_MIPS_SYSCALL_H 13#ifndef __ASM_MIPS_SYSCALL_H
14#define __ASM_MIPS_SYSCALL_H 14#define __ASM_MIPS_SYSCALL_H
15 15
16#include <linux/compiler.h>
16#include <linux/audit.h> 17#include <linux/audit.h>
17#include <linux/elf-em.h> 18#include <linux/elf-em.h>
18#include <linux/kernel.h> 19#include <linux/kernel.h>
@@ -39,14 +40,14 @@ static inline unsigned long mips_get_syscall_arg(unsigned long *arg,
39 40
40#ifdef CONFIG_32BIT 41#ifdef CONFIG_32BIT
41 case 4: case 5: case 6: case 7: 42 case 4: case 5: case 6: case 7:
42 return get_user(*arg, (int *)usp + 4 * n); 43 return get_user(*arg, (int *)usp + n);
43#endif 44#endif
44 45
45#ifdef CONFIG_64BIT 46#ifdef CONFIG_64BIT
46 case 4: case 5: case 6: case 7: 47 case 4: case 5: case 6: case 7:
47#ifdef CONFIG_MIPS32_O32 48#ifdef CONFIG_MIPS32_O32
48 if (test_thread_flag(TIF_32BIT_REGS)) 49 if (test_thread_flag(TIF_32BIT_REGS))
49 return get_user(*arg, (int *)usp + 4 * n); 50 return get_user(*arg, (int *)usp + n);
50 else 51 else
51#endif 52#endif
52 *arg = regs->regs[4 + n]; 53 *arg = regs->regs[4 + n];
@@ -57,6 +58,8 @@ static inline unsigned long mips_get_syscall_arg(unsigned long *arg,
57 default: 58 default:
58 BUG(); 59 BUG();
59 } 60 }
61
62 unreachable();
60} 63}
61 64
62static inline long syscall_get_return_value(struct task_struct *task, 65static inline long syscall_get_return_value(struct task_struct *task,
@@ -83,11 +86,10 @@ static inline void syscall_get_arguments(struct task_struct *task,
83 unsigned int i, unsigned int n, 86 unsigned int i, unsigned int n,
84 unsigned long *args) 87 unsigned long *args)
85{ 88{
86 unsigned long arg;
87 int ret; 89 int ret;
88 90
89 while (n--) 91 while (n--)
90 ret |= mips_get_syscall_arg(&arg, task, regs, i++); 92 ret |= mips_get_syscall_arg(args++, task, regs, i++);
91 93
92 /* 94 /*
93 * No way to communicate an error because this is a void function. 95 * No way to communicate an error because this is a void function.
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
index b39ba25b41cc..f25181b19941 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
@@ -163,8 +163,8 @@ enum cop1_sdw_func {
163 */ 163 */
164enum cop1x_func { 164enum cop1x_func {
165 lwxc1_op = 0x00, ldxc1_op = 0x01, 165 lwxc1_op = 0x00, ldxc1_op = 0x01,
166 pfetch_op = 0x07, swxc1_op = 0x08, 166 swxc1_op = 0x08, sdxc1_op = 0x09,
167 sdxc1_op = 0x09, madd_s_op = 0x20, 167 pfetch_op = 0x0f, madd_s_op = 0x20,
168 madd_d_op = 0x21, madd_e_op = 0x22, 168 madd_d_op = 0x21, madd_e_op = 0x22,
169 msub_s_op = 0x28, msub_d_op = 0x29, 169 msub_s_op = 0x28, msub_d_op = 0x29,
170 msub_e_op = 0x2a, nmadd_s_op = 0x30, 170 msub_e_op = 0x2a, nmadd_s_op = 0x30,
diff --git a/arch/mips/include/uapi/asm/unistd.h b/arch/mips/include/uapi/asm/unistd.h
index 1dee279f9665..d6e154a9e6a5 100644
--- a/arch/mips/include/uapi/asm/unistd.h
+++ b/arch/mips/include/uapi/asm/unistd.h
@@ -369,16 +369,18 @@
369#define __NR_process_vm_writev (__NR_Linux + 346) 369#define __NR_process_vm_writev (__NR_Linux + 346)
370#define __NR_kcmp (__NR_Linux + 347) 370#define __NR_kcmp (__NR_Linux + 347)
371#define __NR_finit_module (__NR_Linux + 348) 371#define __NR_finit_module (__NR_Linux + 348)
372#define __NR_sched_setattr (__NR_Linux + 349)
373#define __NR_sched_getattr (__NR_Linux + 350)
372 374
373/* 375/*
374 * Offset of the last Linux o32 flavoured syscall 376 * Offset of the last Linux o32 flavoured syscall
375 */ 377 */
376#define __NR_Linux_syscalls 348 378#define __NR_Linux_syscalls 350
377 379
378#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 380#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
379 381
380#define __NR_O32_Linux 4000 382#define __NR_O32_Linux 4000
381#define __NR_O32_Linux_syscalls 348 383#define __NR_O32_Linux_syscalls 350
382 384
383#if _MIPS_SIM == _MIPS_SIM_ABI64 385#if _MIPS_SIM == _MIPS_SIM_ABI64
384 386
@@ -695,16 +697,18 @@
695#define __NR_kcmp (__NR_Linux + 306) 697#define __NR_kcmp (__NR_Linux + 306)
696#define __NR_finit_module (__NR_Linux + 307) 698#define __NR_finit_module (__NR_Linux + 307)
697#define __NR_getdents64 (__NR_Linux + 308) 699#define __NR_getdents64 (__NR_Linux + 308)
700#define __NR_sched_setattr (__NR_Linux + 309)
701#define __NR_sched_getattr (__NR_Linux + 310)
698 702
699/* 703/*
700 * Offset of the last Linux 64-bit flavoured syscall 704 * Offset of the last Linux 64-bit flavoured syscall
701 */ 705 */
702#define __NR_Linux_syscalls 308 706#define __NR_Linux_syscalls 310
703 707
704#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ 708#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
705 709
706#define __NR_64_Linux 5000 710#define __NR_64_Linux 5000
707#define __NR_64_Linux_syscalls 308 711#define __NR_64_Linux_syscalls 310
708 712
709#if _MIPS_SIM == _MIPS_SIM_NABI32 713#if _MIPS_SIM == _MIPS_SIM_NABI32
710 714
@@ -1025,15 +1029,17 @@
1025#define __NR_process_vm_writev (__NR_Linux + 310) 1029#define __NR_process_vm_writev (__NR_Linux + 310)
1026#define __NR_kcmp (__NR_Linux + 311) 1030#define __NR_kcmp (__NR_Linux + 311)
1027#define __NR_finit_module (__NR_Linux + 312) 1031#define __NR_finit_module (__NR_Linux + 312)
1032#define __NR_sched_setattr (__NR_Linux + 313)
1033#define __NR_sched_getattr (__NR_Linux + 314)
1028 1034
1029/* 1035/*
1030 * Offset of the last N32 flavoured syscall 1036 * Offset of the last N32 flavoured syscall
1031 */ 1037 */
1032#define __NR_Linux_syscalls 312 1038#define __NR_Linux_syscalls 314
1033 1039
1034#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ 1040#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
1035 1041
1036#define __NR_N32_Linux 6000 1042#define __NR_N32_Linux 6000
1037#define __NR_N32_Linux_syscalls 312 1043#define __NR_N32_Linux_syscalls 314
1038 1044
1039#endif /* _UAPI_ASM_UNISTD_H */ 1045#endif /* _UAPI_ASM_UNISTD_H */