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-rw-r--r--arch/mips/include/asm/abi.h6
-rw-r--r--arch/mips/include/asm/compat.h3
-rw-r--r--arch/mips/include/asm/elf.h5
-rw-r--r--arch/mips/include/asm/fpu_emulator.h6
-rw-r--r--arch/mips/include/asm/local.h25
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h15
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h6
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h4
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h2
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h2
-rw-r--r--arch/mips/include/asm/mach-sibyte/war.h6
-rw-r--r--arch/mips/include/asm/mmu.h5
-rw-r--r--arch/mips/include/asm/mmu_context.h2
-rw-r--r--arch/mips/include/asm/page.h6
-rw-r--r--arch/mips/include/asm/pci.h22
-rw-r--r--arch/mips/include/asm/processor.h11
-rw-r--r--arch/mips/include/asm/stackframe.h19
-rw-r--r--arch/mips/include/asm/uasm.h2
-rw-r--r--arch/mips/include/asm/unistd.h2
-rw-r--r--arch/mips/include/asm/vdso.h29
20 files changed, 119 insertions, 59 deletions
diff --git a/arch/mips/include/asm/abi.h b/arch/mips/include/asm/abi.h
index 1dd74fbdc09b..9252d9b50e59 100644
--- a/arch/mips/include/asm/abi.h
+++ b/arch/mips/include/asm/abi.h
@@ -13,12 +13,14 @@
13#include <asm/siginfo.h> 13#include <asm/siginfo.h>
14 14
15struct mips_abi { 15struct mips_abi {
16 int (* const setup_frame)(struct k_sigaction * ka, 16 int (* const setup_frame)(void *sig_return, struct k_sigaction *ka,
17 struct pt_regs *regs, int signr, 17 struct pt_regs *regs, int signr,
18 sigset_t *set); 18 sigset_t *set);
19 int (* const setup_rt_frame)(struct k_sigaction * ka, 19 const unsigned long signal_return_offset;
20 int (* const setup_rt_frame)(void *sig_return, struct k_sigaction *ka,
20 struct pt_regs *regs, int signr, 21 struct pt_regs *regs, int signr,
21 sigset_t *set, siginfo_t *info); 22 sigset_t *set, siginfo_t *info);
23 const unsigned long rt_signal_return_offset;
22 const unsigned long restart; 24 const unsigned long restart;
23}; 25};
24 26
diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h
index f58aed354bfd..613f6912dfc1 100644
--- a/arch/mips/include/asm/compat.h
+++ b/arch/mips/include/asm/compat.h
@@ -8,7 +8,8 @@
8#include <asm/page.h> 8#include <asm/page.h>
9#include <asm/ptrace.h> 9#include <asm/ptrace.h>
10 10
11#define COMPAT_USER_HZ 100 11#define COMPAT_USER_HZ 100
12#define COMPAT_UTS_MACHINE "mips\0\0\0"
12 13
13typedef u32 compat_size_t; 14typedef u32 compat_size_t;
14typedef s32 compat_ssize_t; 15typedef s32 compat_ssize_t;
diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h
index e53d7bed5cda..ea77a42c5f8c 100644
--- a/arch/mips/include/asm/elf.h
+++ b/arch/mips/include/asm/elf.h
@@ -310,6 +310,7 @@ do { \
310 310
311#endif /* CONFIG_64BIT */ 311#endif /* CONFIG_64BIT */
312 312
313struct pt_regs;
313struct task_struct; 314struct task_struct;
314 315
315extern void elf_dump_regs(elf_greg_t *, struct pt_regs *regs); 316extern void elf_dump_regs(elf_greg_t *, struct pt_regs *regs);
@@ -367,4 +368,8 @@ extern const char *__elf_platform;
367#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2) 368#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
368#endif 369#endif
369 370
371#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
372struct linux_binprm;
373extern int arch_setup_additional_pages(struct linux_binprm *bprm,
374 int uses_interp);
370#endif /* _ASM_ELF_H */ 375#endif /* _ASM_ELF_H */
diff --git a/arch/mips/include/asm/fpu_emulator.h b/arch/mips/include/asm/fpu_emulator.h
index aecada6f6117..3b4092705567 100644
--- a/arch/mips/include/asm/fpu_emulator.h
+++ b/arch/mips/include/asm/fpu_emulator.h
@@ -41,7 +41,11 @@ struct mips_fpu_emulator_stats {
41DECLARE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats); 41DECLARE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats);
42 42
43#define MIPS_FPU_EMU_INC_STATS(M) \ 43#define MIPS_FPU_EMU_INC_STATS(M) \
44 cpu_local_wrap(__local_inc(&__get_cpu_var(fpuemustats).M)) 44do { \
45 preempt_disable(); \
46 __local_inc(&__get_cpu_var(fpuemustats).M); \
47 preempt_enable(); \
48} while (0)
45 49
46#else 50#else
47#define MIPS_FPU_EMU_INC_STATS(M) do { } while (0) 51#define MIPS_FPU_EMU_INC_STATS(M) do { } while (0)
diff --git a/arch/mips/include/asm/local.h b/arch/mips/include/asm/local.h
index 361f4f16c30c..bdcdef02d147 100644
--- a/arch/mips/include/asm/local.h
+++ b/arch/mips/include/asm/local.h
@@ -193,29 +193,4 @@ static __inline__ long local_sub_return(long i, local_t * l)
193#define __local_add(i, l) ((l)->a.counter+=(i)) 193#define __local_add(i, l) ((l)->a.counter+=(i))
194#define __local_sub(i, l) ((l)->a.counter-=(i)) 194#define __local_sub(i, l) ((l)->a.counter-=(i))
195 195
196/* Need to disable preemption for the cpu local counters otherwise we could
197 still access a variable of a previous CPU in a non atomic way. */
198#define cpu_local_wrap_v(l) \
199 ({ local_t res__; \
200 preempt_disable(); \
201 res__ = (l); \
202 preempt_enable(); \
203 res__; })
204#define cpu_local_wrap(l) \
205 ({ preempt_disable(); \
206 l; \
207 preempt_enable(); }) \
208
209#define cpu_local_read(l) cpu_local_wrap_v(local_read(&__get_cpu_var(l)))
210#define cpu_local_set(l, i) cpu_local_wrap(local_set(&__get_cpu_var(l), (i)))
211#define cpu_local_inc(l) cpu_local_wrap(local_inc(&__get_cpu_var(l)))
212#define cpu_local_dec(l) cpu_local_wrap(local_dec(&__get_cpu_var(l)))
213#define cpu_local_add(i, l) cpu_local_wrap(local_add((i), &__get_cpu_var(l)))
214#define cpu_local_sub(i, l) cpu_local_wrap(local_sub((i), &__get_cpu_var(l)))
215
216#define __cpu_local_inc(l) cpu_local_inc(l)
217#define __cpu_local_dec(l) cpu_local_dec(l)
218#define __cpu_local_add(i, l) cpu_local_add((i), (l))
219#define __cpu_local_sub(i, l) cpu_local_sub((i), (l))
220
221#endif /* _ARCH_MIPS_LOCAL_H */ 196#endif /* _ARCH_MIPS_LOCAL_H */
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
index b12c4aca2cc9..96a2391ad85b 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
@@ -85,6 +85,7 @@ enum bcm63xx_regs_set {
85 RSET_TIMER, 85 RSET_TIMER,
86 RSET_WDT, 86 RSET_WDT,
87 RSET_UART0, 87 RSET_UART0,
88 RSET_UART1,
88 RSET_GPIO, 89 RSET_GPIO,
89 RSET_SPI, 90 RSET_SPI,
90 RSET_UDC0, 91 RSET_UDC0,
@@ -123,6 +124,7 @@ enum bcm63xx_regs_set {
123#define BCM_6338_TIMER_BASE (0xfffe0200) 124#define BCM_6338_TIMER_BASE (0xfffe0200)
124#define BCM_6338_WDT_BASE (0xfffe021c) 125#define BCM_6338_WDT_BASE (0xfffe021c)
125#define BCM_6338_UART0_BASE (0xfffe0300) 126#define BCM_6338_UART0_BASE (0xfffe0300)
127#define BCM_6338_UART1_BASE (0xdeadbeef)
126#define BCM_6338_GPIO_BASE (0xfffe0400) 128#define BCM_6338_GPIO_BASE (0xfffe0400)
127#define BCM_6338_SPI_BASE (0xfffe0c00) 129#define BCM_6338_SPI_BASE (0xfffe0c00)
128#define BCM_6338_UDC0_BASE (0xdeadbeef) 130#define BCM_6338_UDC0_BASE (0xdeadbeef)
@@ -153,6 +155,7 @@ enum bcm63xx_regs_set {
153#define BCM_6345_TIMER_BASE (0xfffe0200) 155#define BCM_6345_TIMER_BASE (0xfffe0200)
154#define BCM_6345_WDT_BASE (0xfffe021c) 156#define BCM_6345_WDT_BASE (0xfffe021c)
155#define BCM_6345_UART0_BASE (0xfffe0300) 157#define BCM_6345_UART0_BASE (0xfffe0300)
158#define BCM_6345_UART1_BASE (0xdeadbeef)
156#define BCM_6345_GPIO_BASE (0xfffe0400) 159#define BCM_6345_GPIO_BASE (0xfffe0400)
157#define BCM_6345_SPI_BASE (0xdeadbeef) 160#define BCM_6345_SPI_BASE (0xdeadbeef)
158#define BCM_6345_UDC0_BASE (0xdeadbeef) 161#define BCM_6345_UDC0_BASE (0xdeadbeef)
@@ -182,6 +185,7 @@ enum bcm63xx_regs_set {
182#define BCM_6348_TIMER_BASE (0xfffe0200) 185#define BCM_6348_TIMER_BASE (0xfffe0200)
183#define BCM_6348_WDT_BASE (0xfffe021c) 186#define BCM_6348_WDT_BASE (0xfffe021c)
184#define BCM_6348_UART0_BASE (0xfffe0300) 187#define BCM_6348_UART0_BASE (0xfffe0300)
188#define BCM_6348_UART1_BASE (0xdeadbeef)
185#define BCM_6348_GPIO_BASE (0xfffe0400) 189#define BCM_6348_GPIO_BASE (0xfffe0400)
186#define BCM_6348_SPI_BASE (0xfffe0c00) 190#define BCM_6348_SPI_BASE (0xfffe0c00)
187#define BCM_6348_UDC0_BASE (0xfffe1000) 191#define BCM_6348_UDC0_BASE (0xfffe1000)
@@ -208,6 +212,7 @@ enum bcm63xx_regs_set {
208#define BCM_6358_TIMER_BASE (0xfffe0040) 212#define BCM_6358_TIMER_BASE (0xfffe0040)
209#define BCM_6358_WDT_BASE (0xfffe005c) 213#define BCM_6358_WDT_BASE (0xfffe005c)
210#define BCM_6358_UART0_BASE (0xfffe0100) 214#define BCM_6358_UART0_BASE (0xfffe0100)
215#define BCM_6358_UART1_BASE (0xfffe0120)
211#define BCM_6358_GPIO_BASE (0xfffe0080) 216#define BCM_6358_GPIO_BASE (0xfffe0080)
212#define BCM_6358_SPI_BASE (0xdeadbeef) 217#define BCM_6358_SPI_BASE (0xdeadbeef)
213#define BCM_6358_UDC0_BASE (0xfffe0800) 218#define BCM_6358_UDC0_BASE (0xfffe0800)
@@ -246,6 +251,8 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
246 return BCM_6338_WDT_BASE; 251 return BCM_6338_WDT_BASE;
247 case RSET_UART0: 252 case RSET_UART0:
248 return BCM_6338_UART0_BASE; 253 return BCM_6338_UART0_BASE;
254 case RSET_UART1:
255 return BCM_6338_UART1_BASE;
249 case RSET_GPIO: 256 case RSET_GPIO:
250 return BCM_6338_GPIO_BASE; 257 return BCM_6338_GPIO_BASE;
251 case RSET_SPI: 258 case RSET_SPI:
@@ -292,6 +299,8 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
292 return BCM_6345_WDT_BASE; 299 return BCM_6345_WDT_BASE;
293 case RSET_UART0: 300 case RSET_UART0:
294 return BCM_6345_UART0_BASE; 301 return BCM_6345_UART0_BASE;
302 case RSET_UART1:
303 return BCM_6345_UART1_BASE;
295 case RSET_GPIO: 304 case RSET_GPIO:
296 return BCM_6345_GPIO_BASE; 305 return BCM_6345_GPIO_BASE;
297 case RSET_SPI: 306 case RSET_SPI:
@@ -338,6 +347,8 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
338 return BCM_6348_WDT_BASE; 347 return BCM_6348_WDT_BASE;
339 case RSET_UART0: 348 case RSET_UART0:
340 return BCM_6348_UART0_BASE; 349 return BCM_6348_UART0_BASE;
350 case RSET_UART1:
351 return BCM_6348_UART1_BASE;
341 case RSET_GPIO: 352 case RSET_GPIO:
342 return BCM_6348_GPIO_BASE; 353 return BCM_6348_GPIO_BASE;
343 case RSET_SPI: 354 case RSET_SPI:
@@ -384,6 +395,8 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
384 return BCM_6358_WDT_BASE; 395 return BCM_6358_WDT_BASE;
385 case RSET_UART0: 396 case RSET_UART0:
386 return BCM_6358_UART0_BASE; 397 return BCM_6358_UART0_BASE;
398 case RSET_UART1:
399 return BCM_6358_UART1_BASE;
387 case RSET_GPIO: 400 case RSET_GPIO:
388 return BCM_6358_GPIO_BASE; 401 return BCM_6358_GPIO_BASE;
389 case RSET_SPI: 402 case RSET_SPI:
@@ -429,6 +442,7 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
429enum bcm63xx_irq { 442enum bcm63xx_irq {
430 IRQ_TIMER = 0, 443 IRQ_TIMER = 0,
431 IRQ_UART0, 444 IRQ_UART0,
445 IRQ_UART1,
432 IRQ_DSL, 446 IRQ_DSL,
433 IRQ_ENET0, 447 IRQ_ENET0,
434 IRQ_ENET1, 448 IRQ_ENET1,
@@ -510,6 +524,7 @@ enum bcm63xx_irq {
510 */ 524 */
511#define BCM_6358_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) 525#define BCM_6358_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
512#define BCM_6358_UART0_IRQ (IRQ_INTERNAL_BASE + 2) 526#define BCM_6358_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
527#define BCM_6358_UART1_IRQ (IRQ_INTERNAL_BASE + 3)
513#define BCM_6358_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5) 528#define BCM_6358_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5)
514#define BCM_6358_ENET1_IRQ (IRQ_INTERNAL_BASE + 6) 529#define BCM_6358_ENET1_IRQ (IRQ_INTERNAL_BASE + 6)
515#define BCM_6358_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) 530#define BCM_6358_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h
new file mode 100644
index 000000000000..23c705baf171
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h
@@ -0,0 +1,6 @@
1#ifndef BCM63XX_DEV_UART_H_
2#define BCM63XX_DEV_UART_H_
3
4int bcm63xx_uart_register(unsigned int id);
5
6#endif /* BCM63XX_DEV_UART_H_ */
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
index 76a0b7216af5..43d4da0b1e9f 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
@@ -10,6 +10,10 @@ static inline unsigned long bcm63xx_gpio_count(void)
10 switch (bcm63xx_get_cpu_id()) { 10 switch (bcm63xx_get_cpu_id()) {
11 case BCM6358_CPU_ID: 11 case BCM6358_CPU_ID:
12 return 40; 12 return 40;
13 case BCM6338_CPU_ID:
14 return 8;
15 case BCM6345_CPU_ID:
16 return 16;
13 case BCM6348_CPU_ID: 17 case BCM6348_CPU_ID:
14 default: 18 default:
15 return 37; 19 return 37;
diff --git a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
index 6479090a4106..474daaa53497 100644
--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
@@ -45,6 +45,8 @@ struct board_info {
45 unsigned int has_ohci0:1; 45 unsigned int has_ohci0:1;
46 unsigned int has_ehci0:1; 46 unsigned int has_ehci0:1;
47 unsigned int has_dsp:1; 47 unsigned int has_dsp:1;
48 unsigned int has_uart0:1;
49 unsigned int has_uart1:1;
48 50
49 /* ethernet config */ 51 /* ethernet config */
50 struct bcm63xx_enet_platform_data enet0; 52 struct bcm63xx_enet_platform_data enet0;
diff --git a/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h b/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
index 71742bac940d..f453c01d0672 100644
--- a/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
@@ -24,7 +24,7 @@
24#define cpu_has_smartmips 0 24#define cpu_has_smartmips 0
25#define cpu_has_vtag_icache 0 25#define cpu_has_vtag_icache 0
26 26
27#if !defined(BCMCPU_RUNTIME_DETECT) && (defined(CONFIG_BCMCPU_IS_6348) || defined(CONFIG_CPU_IS_6338) || defined(CONFIG_CPU_IS_BCM6345)) 27#if !defined(BCMCPU_RUNTIME_DETECT) && (defined(CONFIG_BCM63XX_CPU_6348) || defined(CONFIG_BCM63XX_CPU_6345) || defined(CONFIG_BCM63XX_CPU_6338))
28#define cpu_has_dc_aliases 0 28#define cpu_has_dc_aliases 0
29#endif 29#endif
30 30
diff --git a/arch/mips/include/asm/mach-sibyte/war.h b/arch/mips/include/asm/mach-sibyte/war.h
index 7950ef4f032c..743385d7b5f2 100644
--- a/arch/mips/include/asm/mach-sibyte/war.h
+++ b/arch/mips/include/asm/mach-sibyte/war.h
@@ -16,7 +16,11 @@
16#if defined(CONFIG_SB1_PASS_1_WORKAROUNDS) || \ 16#if defined(CONFIG_SB1_PASS_1_WORKAROUNDS) || \
17 defined(CONFIG_SB1_PASS_2_WORKAROUNDS) 17 defined(CONFIG_SB1_PASS_2_WORKAROUNDS)
18 18
19#define BCM1250_M3_WAR 1 19#ifndef __ASSEMBLY__
20extern int sb1250_m3_workaround_needed(void);
21#endif
22
23#define BCM1250_M3_WAR sb1250_m3_workaround_needed()
20#define SIBYTE_1956_WAR 1 24#define SIBYTE_1956_WAR 1
21 25
22#else 26#else
diff --git a/arch/mips/include/asm/mmu.h b/arch/mips/include/asm/mmu.h
index 4063edd79623..c436138945a8 100644
--- a/arch/mips/include/asm/mmu.h
+++ b/arch/mips/include/asm/mmu.h
@@ -1,6 +1,9 @@
1#ifndef __ASM_MMU_H 1#ifndef __ASM_MMU_H
2#define __ASM_MMU_H 2#define __ASM_MMU_H
3 3
4typedef unsigned long mm_context_t[NR_CPUS]; 4typedef struct {
5 unsigned long asid[NR_CPUS];
6 void *vdso;
7} mm_context_t;
5 8
6#endif /* __ASM_MMU_H */ 9#endif /* __ASM_MMU_H */
diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h
index 145bb81ccaa5..d9592733a7ba 100644
--- a/arch/mips/include/asm/mmu_context.h
+++ b/arch/mips/include/asm/mmu_context.h
@@ -104,7 +104,7 @@ extern unsigned long smtc_asid_mask;
104 104
105#endif 105#endif
106 106
107#define cpu_context(cpu, mm) ((mm)->context[cpu]) 107#define cpu_context(cpu, mm) ((mm)->context.asid[cpu])
108#define cpu_asid(cpu, mm) (cpu_context((cpu), (mm)) & ASID_MASK) 108#define cpu_asid(cpu, mm) (cpu_context((cpu), (mm)) & ASID_MASK)
109#define asid_cache(cpu) (cpu_data[cpu].asid_cache) 109#define asid_cache(cpu) (cpu_data[cpu].asid_cache)
110 110
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
index ac32572430f4..a16beafcea91 100644
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -188,8 +188,10 @@ typedef struct { unsigned long pgprot; } pgprot_t;
188#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ 188#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
189 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) 189 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
190 190
191#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE) 191#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE + \
192#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET) 192 PHYS_OFFSET)
193#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET - \
194 PHYS_OFFSET)
193 195
194#include <asm-generic/memory_model.h> 196#include <asm-generic/memory_model.h>
195#include <asm-generic/getorder.h> 197#include <asm-generic/getorder.h>
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index 5ebf82572ec0..3beea1479b43 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -102,28 +102,6 @@ struct pci_dev;
102 */ 102 */
103extern unsigned int PCI_DMA_BUS_IS_PHYS; 103extern unsigned int PCI_DMA_BUS_IS_PHYS;
104 104
105#ifdef CONFIG_DMA_NEED_PCI_MAP_STATE
106
107/* pci_unmap_{single,page} is not a nop, thus... */
108#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME;
109#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME;
110#define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
111#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
112#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
113#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
114
115#else /* CONFIG_DMA_NEED_PCI_MAP_STATE */
116
117/* pci_unmap_{page,single} is a nop so... */
118#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
119#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
120#define pci_unmap_addr(PTR, ADDR_NAME) (0)
121#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
122#define pci_unmap_len(PTR, LEN_NAME) (0)
123#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
124
125#endif /* CONFIG_DMA_NEED_PCI_MAP_STATE */
126
127#ifdef CONFIG_PCI 105#ifdef CONFIG_PCI
128static inline void pci_dma_burst_advice(struct pci_dev *pdev, 106static inline void pci_dma_burst_advice(struct pci_dev *pdev,
129 enum pci_dma_burst_strategy *strat, 107 enum pci_dma_burst_strategy *strat,
diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
index 087a8884ef06..ab387910009a 100644
--- a/arch/mips/include/asm/processor.h
+++ b/arch/mips/include/asm/processor.h
@@ -33,13 +33,19 @@ extern void (*cpu_wait)(void);
33 33
34extern unsigned int vced_count, vcei_count; 34extern unsigned int vced_count, vcei_count;
35 35
36/*
37 * A special page (the vdso) is mapped into all processes at the very
38 * top of the virtual memory space.
39 */
40#define SPECIAL_PAGES_SIZE PAGE_SIZE
41
36#ifdef CONFIG_32BIT 42#ifdef CONFIG_32BIT
37/* 43/*
38 * User space process size: 2GB. This is hardcoded into a few places, 44 * User space process size: 2GB. This is hardcoded into a few places,
39 * so don't change it unless you know what you are doing. 45 * so don't change it unless you know what you are doing.
40 */ 46 */
41#define TASK_SIZE 0x7fff8000UL 47#define TASK_SIZE 0x7fff8000UL
42#define STACK_TOP TASK_SIZE 48#define STACK_TOP ((TASK_SIZE & PAGE_MASK) - SPECIAL_PAGES_SIZE)
43 49
44/* 50/*
45 * This decides where the kernel will search for a free chunk of vm 51 * This decides where the kernel will search for a free chunk of vm
@@ -59,7 +65,8 @@ extern unsigned int vced_count, vcei_count;
59#define TASK_SIZE32 0x7fff8000UL 65#define TASK_SIZE32 0x7fff8000UL
60#define TASK_SIZE 0x10000000000UL 66#define TASK_SIZE 0x10000000000UL
61#define STACK_TOP \ 67#define STACK_TOP \
62 (test_thread_flag(TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE) 68 (((test_thread_flag(TIF_32BIT_ADDR) ? \
69 TASK_SIZE32 : TASK_SIZE) & PAGE_MASK) - SPECIAL_PAGES_SIZE)
63 70
64/* 71/*
65 * This decides where the kernel will search for a free chunk of vm 72 * This decides where the kernel will search for a free chunk of vm
diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
index 3b6da3330e32..c8419129e770 100644
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -121,6 +121,25 @@
121 .endm 121 .endm
122#else 122#else
123 .macro get_saved_sp /* Uniprocessor variation */ 123 .macro get_saved_sp /* Uniprocessor variation */
124#ifdef CONFIG_CPU_LOONGSON2F
125 /*
126 * Clear BTB (branch target buffer), forbid RAS (return address
127 * stack) to workaround the Out-of-order Issue in Loongson2F
128 * via its diagnostic register.
129 */
130 move k0, ra
131 jal 1f
132 nop
1331: jal 1f
134 nop
1351: jal 1f
136 nop
1371: jal 1f
138 nop
1391: move ra, k0
140 li k0, 3
141 mtc0 k0, $22
142#endif /* CONFIG_CPU_LOONGSON2F */
124#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32) 143#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
125 lui k1, %hi(kernelsp) 144 lui k1, %hi(kernelsp)
126#else 145#else
diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h
index b99bd07e199b..11a8b5252549 100644
--- a/arch/mips/include/asm/uasm.h
+++ b/arch/mips/include/asm/uasm.h
@@ -84,6 +84,7 @@ Ip_u2s3u1(_lw);
84Ip_u1u2u3(_mfc0); 84Ip_u1u2u3(_mfc0);
85Ip_u1u2u3(_mtc0); 85Ip_u1u2u3(_mtc0);
86Ip_u2u1u3(_ori); 86Ip_u2u1u3(_ori);
87Ip_u3u1u2(_or);
87Ip_u2s3u1(_pref); 88Ip_u2s3u1(_pref);
88Ip_0(_rfe); 89Ip_0(_rfe);
89Ip_u2s3u1(_sc); 90Ip_u2s3u1(_sc);
@@ -102,6 +103,7 @@ Ip_0(_tlbwr);
102Ip_u3u1u2(_xor); 103Ip_u3u1u2(_xor);
103Ip_u2u1u3(_xori); 104Ip_u2u1u3(_xori);
104Ip_u2u1msbu3(_dins); 105Ip_u2u1msbu3(_dins);
106Ip_u1(_syscall);
105 107
106/* Handle labels. */ 108/* Handle labels. */
107struct uasm_label { 109struct uasm_label {
diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h
index 65c679ecbe6b..1b5a6648eb86 100644
--- a/arch/mips/include/asm/unistd.h
+++ b/arch/mips/include/asm/unistd.h
@@ -1004,6 +1004,7 @@
1004#define __ARCH_WANT_OLD_READDIR 1004#define __ARCH_WANT_OLD_READDIR
1005#define __ARCH_WANT_SYS_ALARM 1005#define __ARCH_WANT_SYS_ALARM
1006#define __ARCH_WANT_SYS_GETHOSTNAME 1006#define __ARCH_WANT_SYS_GETHOSTNAME
1007#define __ARCH_WANT_SYS_IPC
1007#define __ARCH_WANT_SYS_PAUSE 1008#define __ARCH_WANT_SYS_PAUSE
1008#define __ARCH_WANT_SYS_SGETMASK 1009#define __ARCH_WANT_SYS_SGETMASK
1009#define __ARCH_WANT_SYS_UTIME 1010#define __ARCH_WANT_SYS_UTIME
@@ -1013,6 +1014,7 @@
1013#define __ARCH_WANT_SYS_LLSEEK 1014#define __ARCH_WANT_SYS_LLSEEK
1014#define __ARCH_WANT_SYS_NICE 1015#define __ARCH_WANT_SYS_NICE
1015#define __ARCH_WANT_SYS_OLD_GETRLIMIT 1016#define __ARCH_WANT_SYS_OLD_GETRLIMIT
1017#define __ARCH_WANT_SYS_OLD_UNAME
1016#define __ARCH_WANT_SYS_OLDUMOUNT 1018#define __ARCH_WANT_SYS_OLDUMOUNT
1017#define __ARCH_WANT_SYS_SIGPENDING 1019#define __ARCH_WANT_SYS_SIGPENDING
1018#define __ARCH_WANT_SYS_SIGPROCMASK 1020#define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/mips/include/asm/vdso.h b/arch/mips/include/asm/vdso.h
new file mode 100644
index 000000000000..cca56aa40ff4
--- /dev/null
+++ b/arch/mips/include/asm/vdso.h
@@ -0,0 +1,29 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2009 Cavium Networks
7 */
8
9#ifndef __ASM_VDSO_H
10#define __ASM_VDSO_H
11
12#include <linux/types.h>
13
14
15#ifdef CONFIG_32BIT
16struct mips_vdso {
17 u32 signal_trampoline[2];
18 u32 rt_signal_trampoline[2];
19};
20#else /* !CONFIG_32BIT */
21struct mips_vdso {
22 u32 o32_signal_trampoline[2];
23 u32 o32_rt_signal_trampoline[2];
24 u32 rt_signal_trampoline[2];
25 u32 n32_rt_signal_trampoline[2];
26};
27#endif /* CONFIG_32BIT */
28
29#endif /* __ASM_VDSO_H */