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-rw-r--r--arch/mips/include/asm/asm-eva.h135
-rw-r--r--arch/mips/include/asm/asm.h1
2 files changed, 136 insertions, 0 deletions
diff --git a/arch/mips/include/asm/asm-eva.h b/arch/mips/include/asm/asm-eva.h
new file mode 100644
index 000000000000..e41c56e375b1
--- /dev/null
+++ b/arch/mips/include/asm/asm-eva.h
@@ -0,0 +1,135 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2014 Imagination Technologies Ltd.
7 *
8 */
9
10#ifndef __ASM_ASM_EVA_H
11#define __ASM_ASM_EVA_H
12
13#ifndef __ASSEMBLY__
14#ifdef CONFIG_EVA
15
16#define __BUILD_EVA_INSN(insn, reg, addr) \
17 " .set push\n" \
18 " .set mips0\n" \
19 " .set eva\n" \
20 " "insn" "reg", "addr "\n" \
21 " .set pop\n"
22
23#define user_cache(op, base) __BUILD_EVA_INSN("cachee", op, base)
24#define user_ll(reg, addr) __BUILD_EVA_INSN("lle", reg, addr)
25#define user_sc(reg, addr) __BUILD_EVA_INSN("sce", reg, addr)
26#define user_lw(reg, addr) __BUILD_EVA_INSN("lwe", reg, addr)
27#define user_lwl(reg, addr) __BUILD_EVA_INSN("lwle", reg, addr)
28#define user_lwr(reg, addr) __BUILD_EVA_INSN("lwre", reg, addr)
29#define user_lh(reg, addr) __BUILD_EVA_INSN("lhe", reg, addr)
30#define user_lb(reg, addr) __BUILD_EVA_INSN("lbe", reg, addr)
31#define user_lbu(reg, addr) __BUILD_EVA_INSN("lbue", reg, addr)
32/* No 64-bit EVA instruction for loading double words */
33#define user_ld(reg, addr) user_lw(reg, addr)
34#define user_sw(reg, addr) __BUILD_EVA_INSN("swe", reg, addr)
35#define user_swl(reg, addr) __BUILD_EVA_INSN("swle", reg, addr)
36#define user_swr(reg, addr) __BUILD_EVA_INSN("swre", reg, addr)
37#define user_sh(reg, addr) __BUILD_EVA_INSN("she", reg, addr)
38#define user_sb(reg, addr) __BUILD_EVA_INSN("sbe", reg, addr)
39/* No 64-bit EVA instruction for storing double words */
40#define user_sd(reg, addr) user_sw(reg, addr)
41
42#else
43
44#define user_cache(op, base) "cache " op ", " base "\n"
45#define user_ll(reg, addr) "ll " reg ", " addr "\n"
46#define user_sc(reg, addr) "sc " reg ", " addr "\n"
47#define user_lw(reg, addr) "lw " reg ", " addr "\n"
48#define user_lwl(reg, addr) "lwl " reg ", " addr "\n"
49#define user_lwr(reg, addr) "lwr " reg ", " addr "\n"
50#define user_lh(reg, addr) "lh " reg ", " addr "\n"
51#define user_lb(reg, addr) "lb " reg ", " addr "\n"
52#define user_lbu(reg, addr) "lbu " reg ", " addr "\n"
53#define user_sw(reg, addr) "sw " reg ", " addr "\n"
54#define user_swl(reg, addr) "swl " reg ", " addr "\n"
55#define user_swr(reg, addr) "swr " reg ", " addr "\n"
56#define user_sh(reg, addr) "sh " reg ", " addr "\n"
57#define user_sb(reg, addr) "sb " reg ", " addr "\n"
58
59#ifdef CONFIG_32BIT
60/*
61 * No 'sd' or 'ld' instructions in 32-bit but the code will
62 * do the correct thing
63 */
64#define user_sd(reg, addr) user_sw(reg, addr)
65#define user_ld(reg, addr) user_lw(reg, addr)
66#else
67#define user_sd(reg, addr) "sd " reg", " addr "\n"
68#define user_ld(reg, addr) "ld " reg", " addr "\n"
69#endif /* CONFIG_32BIT */
70
71#endif /* CONFIG_EVA */
72
73#else /* __ASSEMBLY__ */
74
75#ifdef CONFIG_EVA
76
77#define __BUILD_EVA_INSN(insn, reg, addr) \
78 .set push; \
79 .set mips0; \
80 .set eva; \
81 insn reg, addr; \
82 .set pop;
83
84#define user_cache(op, base) __BUILD_EVA_INSN(cachee, op, base)
85#define user_ll(reg, addr) __BUILD_EVA_INSN(lle, reg, addr)
86#define user_sc(reg, addr) __BUILD_EVA_INSN(sce, reg, addr)
87#define user_lw(reg, addr) __BUILD_EVA_INSN(lwe, reg, addr)
88#define user_lwl(reg, addr) __BUILD_EVA_INSN(lwle, reg, addr)
89#define user_lwr(reg, addr) __BUILD_EVA_INSN(lwre, reg, addr)
90#define user_lh(reg, addr) __BUILD_EVA_INSN(lhe, reg, addr)
91#define user_lb(reg, addr) __BUILD_EVA_INSN(lbe, reg, addr)
92#define user_lbu(reg, addr) __BUILD_EVA_INSN(lbue, reg, addr)
93/* No 64-bit EVA instruction for loading double words */
94#define user_ld(reg, addr) user_lw(reg, addr)
95#define user_sw(reg, addr) __BUILD_EVA_INSN(swe, reg, addr)
96#define user_swl(reg, addr) __BUILD_EVA_INSN(swle, reg, addr)
97#define user_swr(reg, addr) __BUILD_EVA_INSN(swre, reg, addr)
98#define user_sh(reg, addr) __BUILD_EVA_INSN(she, reg, addr)
99#define user_sb(reg, addr) __BUILD_EVA_INSN(sbe, reg, addr)
100/* No 64-bit EVA instruction for loading double words */
101#define user_sd(reg, addr) user_sw(reg, addr)
102#else
103
104#define user_cache(op, base) cache op, base
105#define user_ll(reg, addr) ll reg, addr
106#define user_sc(reg, addr) sc reg, addr
107#define user_lw(reg, addr) lw reg, addr
108#define user_lwl(reg, addr) lwl reg, addr
109#define user_lwr(reg, addr) lwr reg, addr
110#define user_lh(reg, addr) lh reg, addr
111#define user_lb(reg, addr) lb reg, addr
112#define user_lbu(reg, addr) lbu reg, addr
113#define user_sw(reg, addr) sw reg, addr
114#define user_swl(reg, addr) swl reg, addr
115#define user_swr(reg, addr) swr reg, addr
116#define user_sh(reg, addr) sh reg, addr
117#define user_sb(reg, addr) sb reg, addr
118
119#ifdef CONFIG_32BIT
120/*
121 * No 'sd' or 'ld' instructions in 32-bit but the code will
122 * do the correct thing
123 */
124#define user_sd(reg, addr) user_sw(reg, addr)
125#define user_ld(reg, addr) user_lw(reg, addr)
126#else
127#define user_sd(reg, addr) sd reg, addr
128#define user_ld(reg, addr) ld reg, addr
129#endif /* CONFIG_32BIT */
130
131#endif /* CONFIG_EVA */
132
133#endif /* __ASSEMBLY__ */
134
135#endif /* __ASM_ASM_EVA_H */
diff --git a/arch/mips/include/asm/asm.h b/arch/mips/include/asm/asm.h
index b79be18a9267..b153e7991a9d 100644
--- a/arch/mips/include/asm/asm.h
+++ b/arch/mips/include/asm/asm.h
@@ -18,6 +18,7 @@
18#define __ASM_ASM_H 18#define __ASM_ASM_H
19 19
20#include <asm/sgidefs.h> 20#include <asm/sgidefs.h>
21#include <asm/asm-eva.h>
21 22
22#ifndef CAT 23#ifndef CAT
23#ifdef __STDC__ 24#ifdef __STDC__
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-13 06:31:28 -0500