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-rw-r--r--arch/mips/include/asm/compat.h7
-rw-r--r--arch/mips/include/asm/hazards.h3
-rw-r--r--arch/mips/include/asm/prefetch.h2
-rw-r--r--arch/mips/include/asm/seccomp.h4
-rw-r--r--arch/mips/include/asm/thread_info.h6
5 files changed, 16 insertions, 6 deletions
diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h
index ac5d541368e9..6c5b40905dd6 100644
--- a/arch/mips/include/asm/compat.h
+++ b/arch/mips/include/asm/compat.h
@@ -3,6 +3,8 @@
3/* 3/*
4 * Architecture specific compatibility types 4 * Architecture specific compatibility types
5 */ 5 */
6#include <linux/seccomp.h>
7#include <linux/thread_info.h>
6#include <linux/types.h> 8#include <linux/types.h>
7#include <asm/page.h> 9#include <asm/page.h>
8#include <asm/ptrace.h> 10#include <asm/ptrace.h>
@@ -218,4 +220,9 @@ struct compat_shmid64_ds {
218 compat_ulong_t __unused2; 220 compat_ulong_t __unused2;
219}; 221};
220 222
223static inline int is_compat_task(void)
224{
225 return test_thread_flag(TIF_32BIT);
226}
227
221#endif /* _ASM_COMPAT_H */ 228#endif /* _ASM_COMPAT_H */
diff --git a/arch/mips/include/asm/hazards.h b/arch/mips/include/asm/hazards.h
index 43baed16a109..134e1fc8f4d6 100644
--- a/arch/mips/include/asm/hazards.h
+++ b/arch/mips/include/asm/hazards.h
@@ -138,7 +138,8 @@ do { \
138 __instruction_hazard(); \ 138 __instruction_hazard(); \
139} while (0) 139} while (0)
140 140
141#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_CAVIUM_OCTEON) 141#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \
142 defined(CONFIG_CPU_R5500)
142 143
143/* 144/*
144 * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer. 145 * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
diff --git a/arch/mips/include/asm/prefetch.h b/arch/mips/include/asm/prefetch.h
index 17850834ccb0..a56594f360ee 100644
--- a/arch/mips/include/asm/prefetch.h
+++ b/arch/mips/include/asm/prefetch.h
@@ -26,7 +26,7 @@
26 * Pref_WriteBackInvalidate is a nop and Pref_PrepareForStore is broken in 26 * Pref_WriteBackInvalidate is a nop and Pref_PrepareForStore is broken in
27 * current versions due to erratum G105. 27 * current versions due to erratum G105.
28 * 28 *
29 * VR7701 only implements the Load prefetch. 29 * VR5500 (including VR5701 and VR7701) only implement load prefetch.
30 * 30 *
31 * Finally MIPS32 and MIPS64 implement all of the following hints. 31 * Finally MIPS32 and MIPS64 implement all of the following hints.
32 */ 32 */
diff --git a/arch/mips/include/asm/seccomp.h b/arch/mips/include/asm/seccomp.h
index a6772e9507f5..ae6306ebdcad 100644
--- a/arch/mips/include/asm/seccomp.h
+++ b/arch/mips/include/asm/seccomp.h
@@ -15,8 +15,6 @@
15 */ 15 */
16#ifdef CONFIG_MIPS32_O32 16#ifdef CONFIG_MIPS32_O32
17 17
18#define TIF_32BIT TIF_32BIT_REGS
19
20#define __NR_seccomp_read_32 4003 18#define __NR_seccomp_read_32 4003
21#define __NR_seccomp_write_32 4004 19#define __NR_seccomp_write_32 4004
22#define __NR_seccomp_exit_32 4001 20#define __NR_seccomp_exit_32 4001
@@ -24,8 +22,6 @@
24 22
25#elif defined(CONFIG_MIPS32_N32) 23#elif defined(CONFIG_MIPS32_N32)
26 24
27#define TIF_32BIT _TIF_32BIT_ADDR
28
29#define __NR_seccomp_read_32 6000 25#define __NR_seccomp_read_32 6000
30#define __NR_seccomp_write_32 6001 26#define __NR_seccomp_write_32 6001
31#define __NR_seccomp_exit_32 6058 27#define __NR_seccomp_exit_32 6058
diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h
index 3f76de73c943..676aa2ae1913 100644
--- a/arch/mips/include/asm/thread_info.h
+++ b/arch/mips/include/asm/thread_info.h
@@ -127,6 +127,12 @@ register struct thread_info *__current_thread_info __asm__("$28");
127#define TIF_LOAD_WATCH 25 /* If set, load watch registers */ 127#define TIF_LOAD_WATCH 25 /* If set, load watch registers */
128#define TIF_SYSCALL_TRACE 31 /* syscall trace active */ 128#define TIF_SYSCALL_TRACE 31 /* syscall trace active */
129 129
130#ifdef CONFIG_MIPS32_O32
131#define TIF_32BIT TIF_32BIT_REGS
132#elif defined(CONFIG_MIPS32_N32)
133#define TIF_32BIT _TIF_32BIT_ADDR
134#endif /* CONFIG_MIPS32_O32 */
135
130#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 136#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
131#define _TIF_SIGPENDING (1<<TIF_SIGPENDING) 137#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
132#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 138#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)