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-rw-r--r--arch/mips/include/asm/atomic.h24
-rw-r--r--arch/mips/include/asm/mach-ar7/ar7.h6
-rw-r--r--arch/mips/include/asm/mach-ar7/gpio.h2
-rw-r--r--arch/mips/include/asm/mach-au1x00/au1000.h3
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/nvram.h36
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/gpio.h2
-rw-r--r--arch/mips/include/asm/unistd.h5
7 files changed, 58 insertions, 20 deletions
diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h
index 59dc0c7ef733..c63c56bfd184 100644
--- a/arch/mips/include/asm/atomic.h
+++ b/arch/mips/include/asm/atomic.h
@@ -434,7 +434,7 @@ static __inline__ void atomic64_add(long i, atomic64_t * v)
434 __asm__ __volatile__( 434 __asm__ __volatile__(
435 " .set mips3 \n" 435 " .set mips3 \n"
436 "1: lld %0, %1 # atomic64_add \n" 436 "1: lld %0, %1 # atomic64_add \n"
437 " addu %0, %2 \n" 437 " daddu %0, %2 \n"
438 " scd %0, %1 \n" 438 " scd %0, %1 \n"
439 " beqzl %0, 1b \n" 439 " beqzl %0, 1b \n"
440 " .set mips0 \n" 440 " .set mips0 \n"
@@ -446,7 +446,7 @@ static __inline__ void atomic64_add(long i, atomic64_t * v)
446 __asm__ __volatile__( 446 __asm__ __volatile__(
447 " .set mips3 \n" 447 " .set mips3 \n"
448 "1: lld %0, %1 # atomic64_add \n" 448 "1: lld %0, %1 # atomic64_add \n"
449 " addu %0, %2 \n" 449 " daddu %0, %2 \n"
450 " scd %0, %1 \n" 450 " scd %0, %1 \n"
451 " beqz %0, 2f \n" 451 " beqz %0, 2f \n"
452 " .subsection 2 \n" 452 " .subsection 2 \n"
@@ -479,7 +479,7 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v)
479 __asm__ __volatile__( 479 __asm__ __volatile__(
480 " .set mips3 \n" 480 " .set mips3 \n"
481 "1: lld %0, %1 # atomic64_sub \n" 481 "1: lld %0, %1 # atomic64_sub \n"
482 " subu %0, %2 \n" 482 " dsubu %0, %2 \n"
483 " scd %0, %1 \n" 483 " scd %0, %1 \n"
484 " beqzl %0, 1b \n" 484 " beqzl %0, 1b \n"
485 " .set mips0 \n" 485 " .set mips0 \n"
@@ -491,7 +491,7 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v)
491 __asm__ __volatile__( 491 __asm__ __volatile__(
492 " .set mips3 \n" 492 " .set mips3 \n"
493 "1: lld %0, %1 # atomic64_sub \n" 493 "1: lld %0, %1 # atomic64_sub \n"
494 " subu %0, %2 \n" 494 " dsubu %0, %2 \n"
495 " scd %0, %1 \n" 495 " scd %0, %1 \n"
496 " beqz %0, 2f \n" 496 " beqz %0, 2f \n"
497 " .subsection 2 \n" 497 " .subsection 2 \n"
@@ -524,10 +524,10 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
524 __asm__ __volatile__( 524 __asm__ __volatile__(
525 " .set mips3 \n" 525 " .set mips3 \n"
526 "1: lld %1, %2 # atomic64_add_return \n" 526 "1: lld %1, %2 # atomic64_add_return \n"
527 " addu %0, %1, %3 \n" 527 " daddu %0, %1, %3 \n"
528 " scd %0, %2 \n" 528 " scd %0, %2 \n"
529 " beqzl %0, 1b \n" 529 " beqzl %0, 1b \n"
530 " addu %0, %1, %3 \n" 530 " daddu %0, %1, %3 \n"
531 " .set mips0 \n" 531 " .set mips0 \n"
532 : "=&r" (result), "=&r" (temp), "=m" (v->counter) 532 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
533 : "Ir" (i), "m" (v->counter) 533 : "Ir" (i), "m" (v->counter)
@@ -538,10 +538,10 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
538 __asm__ __volatile__( 538 __asm__ __volatile__(
539 " .set mips3 \n" 539 " .set mips3 \n"
540 "1: lld %1, %2 # atomic64_add_return \n" 540 "1: lld %1, %2 # atomic64_add_return \n"
541 " addu %0, %1, %3 \n" 541 " daddu %0, %1, %3 \n"
542 " scd %0, %2 \n" 542 " scd %0, %2 \n"
543 " beqz %0, 2f \n" 543 " beqz %0, 2f \n"
544 " addu %0, %1, %3 \n" 544 " daddu %0, %1, %3 \n"
545 " .subsection 2 \n" 545 " .subsection 2 \n"
546 "2: b 1b \n" 546 "2: b 1b \n"
547 " .previous \n" 547 " .previous \n"
@@ -576,10 +576,10 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
576 __asm__ __volatile__( 576 __asm__ __volatile__(
577 " .set mips3 \n" 577 " .set mips3 \n"
578 "1: lld %1, %2 # atomic64_sub_return \n" 578 "1: lld %1, %2 # atomic64_sub_return \n"
579 " subu %0, %1, %3 \n" 579 " dsubu %0, %1, %3 \n"
580 " scd %0, %2 \n" 580 " scd %0, %2 \n"
581 " beqzl %0, 1b \n" 581 " beqzl %0, 1b \n"
582 " subu %0, %1, %3 \n" 582 " dsubu %0, %1, %3 \n"
583 " .set mips0 \n" 583 " .set mips0 \n"
584 : "=&r" (result), "=&r" (temp), "=m" (v->counter) 584 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
585 : "Ir" (i), "m" (v->counter) 585 : "Ir" (i), "m" (v->counter)
@@ -590,10 +590,10 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
590 __asm__ __volatile__( 590 __asm__ __volatile__(
591 " .set mips3 \n" 591 " .set mips3 \n"
592 "1: lld %1, %2 # atomic64_sub_return \n" 592 "1: lld %1, %2 # atomic64_sub_return \n"
593 " subu %0, %1, %3 \n" 593 " dsubu %0, %1, %3 \n"
594 " scd %0, %2 \n" 594 " scd %0, %2 \n"
595 " beqz %0, 2f \n" 595 " beqz %0, 2f \n"
596 " subu %0, %1, %3 \n" 596 " dsubu %0, %1, %3 \n"
597 " .subsection 2 \n" 597 " .subsection 2 \n"
598 "2: b 1b \n" 598 "2: b 1b \n"
599 " .previous \n" 599 " .previous \n"
diff --git a/arch/mips/include/asm/mach-ar7/ar7.h b/arch/mips/include/asm/mach-ar7/ar7.h
index f1cf38943497..483ffea9ecb1 100644
--- a/arch/mips/include/asm/mach-ar7/ar7.h
+++ b/arch/mips/include/asm/mach-ar7/ar7.h
@@ -50,7 +50,7 @@
50#define UR8_REGS_WDT (AR7_REGS_BASE + 0x0b00) 50#define UR8_REGS_WDT (AR7_REGS_BASE + 0x0b00)
51#define UR8_REGS_UART1 (AR7_REGS_BASE + 0x0f00) 51#define UR8_REGS_UART1 (AR7_REGS_BASE + 0x0f00)
52 52
53#define AR7_RESET_PEREPHERIAL 0x0 53#define AR7_RESET_PERIPHERAL 0x0
54#define AR7_RESET_SOFTWARE 0x4 54#define AR7_RESET_SOFTWARE 0x4
55#define AR7_RESET_STATUS 0x8 55#define AR7_RESET_STATUS 0x8
56 56
@@ -128,7 +128,7 @@ static inline int ar7_has_high_cpmac(void)
128static inline void ar7_device_enable(u32 bit) 128static inline void ar7_device_enable(u32 bit)
129{ 129{
130 void *reset_reg = 130 void *reset_reg =
131 (void *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PEREPHERIAL); 131 (void *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PERIPHERAL);
132 writel(readl(reset_reg) | (1 << bit), reset_reg); 132 writel(readl(reset_reg) | (1 << bit), reset_reg);
133 msleep(20); 133 msleep(20);
134} 134}
@@ -136,7 +136,7 @@ static inline void ar7_device_enable(u32 bit)
136static inline void ar7_device_disable(u32 bit) 136static inline void ar7_device_disable(u32 bit)
137{ 137{
138 void *reset_reg = 138 void *reset_reg =
139 (void *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PEREPHERIAL); 139 (void *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PERIPHERAL);
140 writel(readl(reset_reg) & ~(1 << bit), reset_reg); 140 writel(readl(reset_reg) & ~(1 << bit), reset_reg);
141 msleep(20); 141 msleep(20);
142} 142}
diff --git a/arch/mips/include/asm/mach-ar7/gpio.h b/arch/mips/include/asm/mach-ar7/gpio.h
index 73f9b162c970..abc317c0372e 100644
--- a/arch/mips/include/asm/mach-ar7/gpio.h
+++ b/arch/mips/include/asm/mach-ar7/gpio.h
@@ -24,7 +24,7 @@
24#define AR7_GPIO_MAX 32 24#define AR7_GPIO_MAX 32
25#define NR_BUILTIN_GPIO AR7_GPIO_MAX 25#define NR_BUILTIN_GPIO AR7_GPIO_MAX
26 26
27#define gpio_to_irq(gpio) NULL 27#define gpio_to_irq(gpio) -1
28 28
29#define gpio_get_value __gpio_get_value 29#define gpio_get_value __gpio_get_value
30#define gpio_set_value __gpio_set_value 30#define gpio_set_value __gpio_set_value
diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h
index e76941db2312..a6976619160a 100644
--- a/arch/mips/include/asm/mach-au1x00/au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/au1000.h
@@ -188,7 +188,8 @@ extern unsigned long get_au1x00_uart_baud_base(void);
188extern unsigned long au1xxx_calc_clock(void); 188extern unsigned long au1xxx_calc_clock(void);
189 189
190/* PM: arch/mips/alchemy/common/sleeper.S, power.c, irq.c */ 190/* PM: arch/mips/alchemy/common/sleeper.S, power.c, irq.c */
191void au1xxx_save_and_sleep(void); 191void alchemy_sleep_au1000(void);
192void alchemy_sleep_au1550(void);
192void au_sleep(void); 193void au_sleep(void);
193 194
194 195
diff --git a/arch/mips/include/asm/mach-bcm47xx/nvram.h b/arch/mips/include/asm/mach-bcm47xx/nvram.h
new file mode 100644
index 000000000000..0d8cc146f7a4
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm47xx/nvram.h
@@ -0,0 +1,36 @@
1/*
2 * Copyright (C) 2005, Broadcom Corporation
3 * Copyright (C) 2006, Felix Fietkau <nbd@openwrt.org>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 */
10
11#ifndef __NVRAM_H
12#define __NVRAM_H
13
14#include <linux/types.h>
15
16struct nvram_header {
17 u32 magic;
18 u32 len;
19 u32 crc_ver_init; /* 0:7 crc, 8:15 ver, 16:31 sdram_init */
20 u32 config_refresh; /* 0:15 sdram_config, 16:31 sdram_refresh */
21 u32 config_ncdl; /* ncdl values for memc */
22};
23
24#define NVRAM_HEADER 0x48534C46 /* 'FLSH' */
25#define NVRAM_VERSION 1
26#define NVRAM_HEADER_SIZE 20
27#define NVRAM_SPACE 0x8000
28
29#define FLASH_MIN 0x00020000 /* Minimum flash size */
30
31#define NVRAM_MAX_VALUE_LEN 255
32#define NVRAM_MAX_PARAM_LEN 64
33
34extern int nvram_getenv(char *name, char *val, size_t val_len);
35
36#endif
diff --git a/arch/mips/include/asm/mach-bcm63xx/gpio.h b/arch/mips/include/asm/mach-bcm63xx/gpio.h
index 7cda8c0a3979..1eb534de8e3b 100644
--- a/arch/mips/include/asm/mach-bcm63xx/gpio.h
+++ b/arch/mips/include/asm/mach-bcm63xx/gpio.h
@@ -3,7 +3,7 @@
3 3
4#include <bcm63xx_gpio.h> 4#include <bcm63xx_gpio.h>
5 5
6#define gpio_to_irq(gpio) NULL 6#define gpio_to_irq(gpio) -1
7 7
8#define gpio_get_value __gpio_get_value 8#define gpio_get_value __gpio_get_value
9#define gpio_set_value __gpio_set_value 9#define gpio_set_value __gpio_set_value
diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h
index 1b5a6648eb86..baa318a59c97 100644
--- a/arch/mips/include/asm/unistd.h
+++ b/arch/mips/include/asm/unistd.h
@@ -984,16 +984,17 @@
984#define __NR_perf_event_open (__NR_Linux + 296) 984#define __NR_perf_event_open (__NR_Linux + 296)
985#define __NR_accept4 (__NR_Linux + 297) 985#define __NR_accept4 (__NR_Linux + 297)
986#define __NR_recvmmsg (__NR_Linux + 298) 986#define __NR_recvmmsg (__NR_Linux + 298)
987#define __NR_getdents64 (__NR_Linux + 299)
987 988
988/* 989/*
989 * Offset of the last N32 flavoured syscall 990 * Offset of the last N32 flavoured syscall
990 */ 991 */
991#define __NR_Linux_syscalls 298 992#define __NR_Linux_syscalls 299
992 993
993#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ 994#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
994 995
995#define __NR_N32_Linux 6000 996#define __NR_N32_Linux 6000
996#define __NR_N32_Linux_syscalls 298 997#define __NR_N32_Linux_syscalls 299
997 998
998#ifdef __KERNEL__ 999#ifdef __KERNEL__
999 1000
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-10 00:15:08 -0400