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-rw-r--r--arch/mips/include/asm/cpu.h5
-rw-r--r--arch/mips/include/asm/mach-loongson/spaces.h9
-rw-r--r--arch/mips/include/asm/module.h2
-rw-r--r--arch/mips/include/asm/pgtable-bits.h9
4 files changed, 23 insertions, 2 deletions
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 01d757c83201..530eb8b3a68e 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -231,6 +231,7 @@
231#define PRID_REV_LOONGSON1B 0x0020 231#define PRID_REV_LOONGSON1B 0x0020
232#define PRID_REV_LOONGSON2E 0x0002 232#define PRID_REV_LOONGSON2E 0x0002
233#define PRID_REV_LOONGSON2F 0x0003 233#define PRID_REV_LOONGSON2F 0x0003
234#define PRID_REV_LOONGSON3A 0x0005
234 235
235/* 236/*
236 * Older processors used to encode processor version and revision in two 237 * Older processors used to encode processor version and revision in two
@@ -304,8 +305,8 @@ enum cpu_type_enum {
304 * MIPS64 class processors 305 * MIPS64 class processors
305 */ 306 */
306 CPU_5KC, CPU_5KE, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2, 307 CPU_5KC, CPU_5KE, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2,
307 CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS, CPU_CAVIUM_OCTEON2, 308 CPU_LOONGSON3, CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS,
308 CPU_CAVIUM_OCTEON3, CPU_XLR, CPU_XLP, 309 CPU_CAVIUM_OCTEON2, CPU_CAVIUM_OCTEON3, CPU_XLR, CPU_XLP,
309 310
310 CPU_LAST 311 CPU_LAST
311}; 312};
diff --git a/arch/mips/include/asm/mach-loongson/spaces.h b/arch/mips/include/asm/mach-loongson/spaces.h
new file mode 100644
index 000000000000..e2506ee90044
--- /dev/null
+++ b/arch/mips/include/asm/mach-loongson/spaces.h
@@ -0,0 +1,9 @@
1#ifndef __ASM_MACH_LOONGSON_SPACES_H_
2#define __ASM_MACH_LOONGSON_SPACES_H_
3
4#if defined(CONFIG_64BIT)
5#define CAC_BASE _AC(0x9800000000000000, UL)
6#endif /* CONFIG_64BIT */
7
8#include <asm/mach-generic/spaces.h>
9#endif
diff --git a/arch/mips/include/asm/module.h b/arch/mips/include/asm/module.h
index 44b705d08262..c2edae382d5d 100644
--- a/arch/mips/include/asm/module.h
+++ b/arch/mips/include/asm/module.h
@@ -126,6 +126,8 @@ search_module_dbetables(unsigned long addr)
126#define MODULE_PROC_FAMILY "LOONGSON1 " 126#define MODULE_PROC_FAMILY "LOONGSON1 "
127#elif defined CONFIG_CPU_LOONGSON2 127#elif defined CONFIG_CPU_LOONGSON2
128#define MODULE_PROC_FAMILY "LOONGSON2 " 128#define MODULE_PROC_FAMILY "LOONGSON2 "
129#elif defined CONFIG_CPU_LOONGSON3
130#define MODULE_PROC_FAMILY "LOONGSON3 "
129#elif defined CONFIG_CPU_CAVIUM_OCTEON 131#elif defined CONFIG_CPU_CAVIUM_OCTEON
130#define MODULE_PROC_FAMILY "OCTEON " 132#define MODULE_PROC_FAMILY "OCTEON "
131#elif defined CONFIG_CPU_XLR 133#elif defined CONFIG_CPU_XLR
diff --git a/arch/mips/include/asm/pgtable-bits.h b/arch/mips/include/asm/pgtable-bits.h
index 32aea4852fb0..e592f3687d6f 100644
--- a/arch/mips/include/asm/pgtable-bits.h
+++ b/arch/mips/include/asm/pgtable-bits.h
@@ -235,6 +235,15 @@ static inline uint64_t pte_to_entrylo(unsigned long pte_val)
235#define _CACHE_CACHABLE_NONCOHERENT (5<<_CACHE_SHIFT) 235#define _CACHE_CACHABLE_NONCOHERENT (5<<_CACHE_SHIFT)
236#define _CACHE_UNCACHED_ACCELERATED (7<<_CACHE_SHIFT) 236#define _CACHE_UNCACHED_ACCELERATED (7<<_CACHE_SHIFT)
237 237
238#elif defined(CONFIG_CPU_LOONGSON3)
239
240/* Using COHERENT flag for NONCOHERENT doesn't hurt. */
241
242#define _CACHE_UNCACHED (2<<_CACHE_SHIFT) /* LOONGSON */
243#define _CACHE_CACHABLE_NONCOHERENT (3<<_CACHE_SHIFT) /* LOONGSON */
244#define _CACHE_CACHABLE_COHERENT (3<<_CACHE_SHIFT) /* LOONGSON-3 */
245#define _CACHE_UNCACHED_ACCELERATED (7<<_CACHE_SHIFT) /* LOONGSON */
246
238#else 247#else
239 248
240#define _CACHE_CACHABLE_NO_WA (0<<_CACHE_SHIFT) /* R4600 only */ 249#define _CACHE_CACHABLE_NO_WA (0<<_CACHE_SHIFT) /* R4600 only */