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-rw-r--r--arch/mips/include/asm/cpu-info.h4
-rw-r--r--arch/mips/include/asm/dec/prom.h48
-rw-r--r--arch/mips/include/asm/rm9k-ocd.h56
-rw-r--r--arch/mips/include/asm/syscall.h2
4 files changed, 28 insertions, 82 deletions
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h
index dc2135be2a3a..ff2707ab3295 100644
--- a/arch/mips/include/asm/cpu-info.h
+++ b/arch/mips/include/asm/cpu-info.h
@@ -39,14 +39,14 @@ struct cache_desc {
39#define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */ 39#define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */
40 40
41struct cpuinfo_mips { 41struct cpuinfo_mips {
42 unsigned int udelay_val; 42 unsigned long asid_cache;
43 unsigned int asid_cache;
44 43
45 /* 44 /*
46 * Capability and feature descriptor structure for MIPS CPU 45 * Capability and feature descriptor structure for MIPS CPU
47 */ 46 */
48 unsigned long options; 47 unsigned long options;
49 unsigned long ases; 48 unsigned long ases;
49 unsigned int udelay_val;
50 unsigned int processor_id; 50 unsigned int processor_id;
51 unsigned int fpu_id; 51 unsigned int fpu_id;
52 unsigned int msa_id; 52 unsigned int msa_id;
diff --git a/arch/mips/include/asm/dec/prom.h b/arch/mips/include/asm/dec/prom.h
index c0ead6313845..b59a2103b61a 100644
--- a/arch/mips/include/asm/dec/prom.h
+++ b/arch/mips/include/asm/dec/prom.h
@@ -113,31 +113,31 @@ extern int (*__pmax_close)(int);
113#define __DEC_PROM_O32(fun, arg) fun arg __asm__(#fun); \ 113#define __DEC_PROM_O32(fun, arg) fun arg __asm__(#fun); \
114 __asm__(#fun " = call_o32") 114 __asm__(#fun " = call_o32")
115 115
116int __DEC_PROM_O32(_rex_bootinit, (int (*)(void))); 116int __DEC_PROM_O32(_rex_bootinit, (int (*)(void), void *));
117int __DEC_PROM_O32(_rex_bootread, (int (*)(void))); 117int __DEC_PROM_O32(_rex_bootread, (int (*)(void), void *));
118int __DEC_PROM_O32(_rex_getbitmap, (int (*)(memmap *), memmap *)); 118int __DEC_PROM_O32(_rex_getbitmap, (int (*)(memmap *), void *, memmap *));
119unsigned long *__DEC_PROM_O32(_rex_slot_address, 119unsigned long *__DEC_PROM_O32(_rex_slot_address,
120 (unsigned long *(*)(int), int)); 120 (unsigned long *(*)(int), void *, int));
121void *__DEC_PROM_O32(_rex_gettcinfo, (void *(*)(void))); 121void *__DEC_PROM_O32(_rex_gettcinfo, (void *(*)(void), void *));
122int __DEC_PROM_O32(_rex_getsysid, (int (*)(void))); 122int __DEC_PROM_O32(_rex_getsysid, (int (*)(void), void *));
123void __DEC_PROM_O32(_rex_clear_cache, (void (*)(void))); 123void __DEC_PROM_O32(_rex_clear_cache, (void (*)(void), void *));
124 124
125int __DEC_PROM_O32(_prom_getchar, (int (*)(void))); 125int __DEC_PROM_O32(_prom_getchar, (int (*)(void), void *));
126char *__DEC_PROM_O32(_prom_getenv, (char *(*)(char *), char *)); 126char *__DEC_PROM_O32(_prom_getenv, (char *(*)(char *), void *, char *));
127int __DEC_PROM_O32(_prom_printf, (int (*)(char *, ...), char *, ...)); 127int __DEC_PROM_O32(_prom_printf, (int (*)(char *, ...), void *, char *, ...));
128 128
129 129
130#define rex_bootinit() _rex_bootinit(__rex_bootinit) 130#define rex_bootinit() _rex_bootinit(__rex_bootinit, NULL)
131#define rex_bootread() _rex_bootread(__rex_bootread) 131#define rex_bootread() _rex_bootread(__rex_bootread, NULL)
132#define rex_getbitmap(x) _rex_getbitmap(__rex_getbitmap, x) 132#define rex_getbitmap(x) _rex_getbitmap(__rex_getbitmap, NULL, x)
133#define rex_slot_address(x) _rex_slot_address(__rex_slot_address, x) 133#define rex_slot_address(x) _rex_slot_address(__rex_slot_address, NULL, x)
134#define rex_gettcinfo() _rex_gettcinfo(__rex_gettcinfo) 134#define rex_gettcinfo() _rex_gettcinfo(__rex_gettcinfo, NULL)
135#define rex_getsysid() _rex_getsysid(__rex_getsysid) 135#define rex_getsysid() _rex_getsysid(__rex_getsysid, NULL)
136#define rex_clear_cache() _rex_clear_cache(__rex_clear_cache) 136#define rex_clear_cache() _rex_clear_cache(__rex_clear_cache, NULL)
137 137
138#define prom_getchar() _prom_getchar(__prom_getchar) 138#define prom_getchar() _prom_getchar(__prom_getchar, NULL)
139#define prom_getenv(x) _prom_getenv(__prom_getenv, x) 139#define prom_getenv(x) _prom_getenv(__prom_getenv, NULL, x)
140#define prom_printf(x...) _prom_printf(__prom_printf, x) 140#define prom_printf(x...) _prom_printf(__prom_printf, NULL, x)
141 141
142#else /* !CONFIG_64BIT */ 142#else /* !CONFIG_64BIT */
143 143
diff --git a/arch/mips/include/asm/rm9k-ocd.h b/arch/mips/include/asm/rm9k-ocd.h
deleted file mode 100644
index b0b80d9ecf96..000000000000
--- a/arch/mips/include/asm/rm9k-ocd.h
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * Copyright (C) 2004 by Basler Vision Technologies AG
3 * Author: Thomas Koeller <thomas.koeller@baslerweb.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#if !defined(_ASM_RM9K_OCD_H)
21#define _ASM_RM9K_OCD_H
22
23#include <linux/types.h>
24#include <linux/spinlock.h>
25#include <asm/io.h>
26
27extern volatile void __iomem * const ocd_base;
28extern volatile void __iomem * const titan_base;
29
30#define ocd_addr(__x__) (ocd_base + (__x__))
31#define titan_addr(__x__) (titan_base + (__x__))
32#define scram_addr(__x__) (scram_base + (__x__))
33
34/* OCD register access */
35#define ocd_readl(__offs__) __raw_readl(ocd_addr(__offs__))
36#define ocd_readw(__offs__) __raw_readw(ocd_addr(__offs__))
37#define ocd_readb(__offs__) __raw_readb(ocd_addr(__offs__))
38#define ocd_writel(__val__, __offs__) \
39 __raw_writel((__val__), ocd_addr(__offs__))
40#define ocd_writew(__val__, __offs__) \
41 __raw_writew((__val__), ocd_addr(__offs__))
42#define ocd_writeb(__val__, __offs__) \
43 __raw_writeb((__val__), ocd_addr(__offs__))
44
45/* TITAN register access - 32 bit-wide only */
46#define titan_readl(__offs__) __raw_readl(titan_addr(__offs__))
47#define titan_writel(__val__, __offs__) \
48 __raw_writel((__val__), titan_addr(__offs__))
49
50/* Protect access to shared TITAN registers */
51extern spinlock_t titan_lock;
52extern int titan_irqflags;
53#define lock_titan_regs() spin_lock_irqsave(&titan_lock, titan_irqflags)
54#define unlock_titan_regs() spin_unlock_irqrestore(&titan_lock, titan_irqflags)
55
56#endif /* !defined(_ASM_RM9K_OCD_H) */
diff --git a/arch/mips/include/asm/syscall.h b/arch/mips/include/asm/syscall.h
index c6e9cd2bca8d..17960fe7a8ce 100644
--- a/arch/mips/include/asm/syscall.h
+++ b/arch/mips/include/asm/syscall.h
@@ -133,6 +133,8 @@ static inline int syscall_get_arch(void)
133#ifdef CONFIG_64BIT 133#ifdef CONFIG_64BIT
134 if (!test_thread_flag(TIF_32BIT_REGS)) 134 if (!test_thread_flag(TIF_32BIT_REGS))
135 arch |= __AUDIT_ARCH_64BIT; 135 arch |= __AUDIT_ARCH_64BIT;
136 if (test_thread_flag(TIF_32BIT_ADDR))
137 arch |= __AUDIT_ARCH_CONVENTION_MIPS64_N32;
136#endif 138#endif
137#if defined(__LITTLE_ENDIAN) 139#if defined(__LITTLE_ENDIAN)
138 arch |= __AUDIT_ARCH_LE; 140 arch |= __AUDIT_ARCH_LE;