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-rw-r--r--arch/mips/include/asm/emma/emma2rh.h3
-rw-r--r--arch/mips/include/asm/emma/markeins.h3
-rw-r--r--arch/mips/include/asm/gic.h2
-rw-r--r--arch/mips/include/asm/pgalloc.h15
-rw-r--r--arch/mips/include/asm/pmc-sierra/msp71xx/war.h2
-rw-r--r--arch/mips/include/asm/processor.h5
-rw-r--r--arch/mips/include/asm/thread_info.h4
-rw-r--r--arch/mips/include/asm/unistd.h15
8 files changed, 18 insertions, 31 deletions
diff --git a/arch/mips/include/asm/emma/emma2rh.h b/arch/mips/include/asm/emma/emma2rh.h
index 30aea91de626..2afb2fe11b30 100644
--- a/arch/mips/include/asm/emma/emma2rh.h
+++ b/arch/mips/include/asm/emma/emma2rh.h
@@ -1,7 +1,4 @@
1/* 1/*
2 * arch/mips/include/asm/emma/emma2rh.h
3 * This file is EMMA2RH common header.
4 *
5 * Copyright (C) NEC Electronics Corporation 2005-2006 2 * Copyright (C) NEC Electronics Corporation 2005-2006
6 * 3 *
7 * This file based on include/asm-mips/ddb5xxx/ddb5xxx.h 4 * This file based on include/asm-mips/ddb5xxx/ddb5xxx.h
diff --git a/arch/mips/include/asm/emma/markeins.h b/arch/mips/include/asm/emma/markeins.h
index 973b0628490d..2618bf230248 100644
--- a/arch/mips/include/asm/emma/markeins.h
+++ b/arch/mips/include/asm/emma/markeins.h
@@ -1,7 +1,4 @@
1/* 1/*
2 * include/asm-mips/emma2rh/markeins.h
3 * This file is EMMA2RH board depended header.
4 *
5 * Copyright (C) NEC Electronics Corporation 2005-2006 2 * Copyright (C) NEC Electronics Corporation 2005-2006
6 * 3 *
7 * This file based on include/asm-mips/ddb5xxx/ddb5xxx.h 4 * This file based on include/asm-mips/ddb5xxx/ddb5xxx.h
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h
index 10292e37c1f7..a8f57341f123 100644
--- a/arch/mips/include/asm/gic.h
+++ b/arch/mips/include/asm/gic.h
@@ -20,7 +20,7 @@
20#define GIC_TRIG_EDGE 1 20#define GIC_TRIG_EDGE 1
21#define GIC_TRIG_LEVEL 0 21#define GIC_TRIG_LEVEL 0
22 22
23#if CONFIG_SMP 23#ifdef CONFIG_SMP
24#define GIC_NUM_INTRS (24 + NR_CPUS * 2) 24#define GIC_NUM_INTRS (24 + NR_CPUS * 2)
25#else 25#else
26#define GIC_NUM_INTRS 32 26#define GIC_NUM_INTRS 32
diff --git a/arch/mips/include/asm/pgalloc.h b/arch/mips/include/asm/pgalloc.h
index 1275831dda29..3738f4b48cbd 100644
--- a/arch/mips/include/asm/pgalloc.h
+++ b/arch/mips/include/asm/pgalloc.h
@@ -98,23 +98,12 @@ static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
98 __free_pages(pte, PTE_ORDER); 98 __free_pages(pte, PTE_ORDER);
99} 99}
100 100
101#define __pte_free_tlb(tlb,pte) \ 101#define __pte_free_tlb(tlb,pte,address) \
102do { \ 102do { \
103 pgtable_page_dtor(pte); \ 103 pgtable_page_dtor(pte); \
104 tlb_remove_page((tlb), pte); \ 104 tlb_remove_page((tlb), pte); \
105} while (0) 105} while (0)
106 106
107#ifdef CONFIG_32BIT
108
109/*
110 * allocating and freeing a pmd is trivial: the 1-entry pmd is
111 * inside the pgd, so has no extra memory associated with it.
112 */
113#define pmd_free(mm, x) do { } while (0)
114#define __pmd_free_tlb(tlb, x) do { } while (0)
115
116#endif
117
118#ifdef CONFIG_64BIT 107#ifdef CONFIG_64BIT
119 108
120static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address) 109static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
@@ -132,7 +121,7 @@ static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
132 free_pages((unsigned long)pmd, PMD_ORDER); 121 free_pages((unsigned long)pmd, PMD_ORDER);
133} 122}
134 123
135#define __pmd_free_tlb(tlb, x) pmd_free((tlb)->mm, x) 124#define __pmd_free_tlb(tlb, x, addr) pmd_free((tlb)->mm, x)
136 125
137#endif 126#endif
138 127
diff --git a/arch/mips/include/asm/pmc-sierra/msp71xx/war.h b/arch/mips/include/asm/pmc-sierra/msp71xx/war.h
index 0bf48fc1892b..9e2ee429c529 100644
--- a/arch/mips/include/asm/pmc-sierra/msp71xx/war.h
+++ b/arch/mips/include/asm/pmc-sierra/msp71xx/war.h
@@ -23,6 +23,8 @@
23#if defined(CONFIG_PMC_MSP7120_EVAL) || defined(CONFIG_PMC_MSP7120_GW) || \ 23#if defined(CONFIG_PMC_MSP7120_EVAL) || defined(CONFIG_PMC_MSP7120_GW) || \
24 defined(CONFIG_PMC_MSP7120_FPGA) 24 defined(CONFIG_PMC_MSP7120_FPGA)
25#define MIPS34K_MISSED_ITLB_WAR 1 25#define MIPS34K_MISSED_ITLB_WAR 1
26#else
27#define MIPS34K_MISSED_ITLB_WAR 0
26#endif 28#endif
27 29
28#endif /* __ASM_MIPS_PMC_SIERRA_WAR_H */ 30#endif /* __ASM_MIPS_PMC_SIERRA_WAR_H */
diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
index 0f926aa0cb47..087a8884ef06 100644
--- a/arch/mips/include/asm/processor.h
+++ b/arch/mips/include/asm/processor.h
@@ -311,8 +311,9 @@ extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long
311 311
312unsigned long get_wchan(struct task_struct *p); 312unsigned long get_wchan(struct task_struct *p);
313 313
314#define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + THREAD_SIZE - 32) 314#define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + \
315#define task_pt_regs(tsk) ((struct pt_regs *)__KSTK_TOS(tsk) - 1) 315 THREAD_SIZE - 32 - sizeof(struct pt_regs))
316#define task_pt_regs(tsk) ((struct pt_regs *)__KSTK_TOS(tsk))
316#define KSTK_EIP(tsk) (task_pt_regs(tsk)->cp0_epc) 317#define KSTK_EIP(tsk) (task_pt_regs(tsk)->cp0_epc)
317#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[29]) 318#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[29])
318#define KSTK_STATUS(tsk) (task_pt_regs(tsk)->cp0_status) 319#define KSTK_STATUS(tsk) (task_pt_regs(tsk)->cp0_status)
diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h
index 143a48136a4b..f9df720d2e40 100644
--- a/arch/mips/include/asm/thread_info.h
+++ b/arch/mips/include/asm/thread_info.h
@@ -39,8 +39,6 @@ struct thread_info {
39 39
40/* 40/*
41 * macros/functions for gaining access to the thread information structure 41 * macros/functions for gaining access to the thread information structure
42 *
43 * preempt_count needs to be 1 initially, until the scheduler is functional.
44 */ 42 */
45#define INIT_THREAD_INFO(tsk) \ 43#define INIT_THREAD_INFO(tsk) \
46{ \ 44{ \
@@ -48,7 +46,7 @@ struct thread_info {
48 .exec_domain = &default_exec_domain, \ 46 .exec_domain = &default_exec_domain, \
49 .flags = _TIF_FIXADE, \ 47 .flags = _TIF_FIXADE, \
50 .cpu = 0, \ 48 .cpu = 0, \
51 .preempt_count = 1, \ 49 .preempt_count = INIT_PREEMPT_COUNT, \
52 .addr_limit = KERNEL_DS, \ 50 .addr_limit = KERNEL_DS, \
53 .restart_block = { \ 51 .restart_block = { \
54 .fn = do_no_restart_syscall, \ 52 .fn = do_no_restart_syscall, \
diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h
index b70c49fdda26..e753a777949b 100644
--- a/arch/mips/include/asm/unistd.h
+++ b/arch/mips/include/asm/unistd.h
@@ -354,16 +354,17 @@
354#define __NR_pwritev (__NR_Linux + 331) 354#define __NR_pwritev (__NR_Linux + 331)
355#define __NR_rt_tgsigqueueinfo (__NR_Linux + 332) 355#define __NR_rt_tgsigqueueinfo (__NR_Linux + 332)
356#define __NR_perf_counter_open (__NR_Linux + 333) 356#define __NR_perf_counter_open (__NR_Linux + 333)
357#define __NR_accept4 (__NR_Linux + 334)
357 358
358/* 359/*
359 * Offset of the last Linux o32 flavoured syscall 360 * Offset of the last Linux o32 flavoured syscall
360 */ 361 */
361#define __NR_Linux_syscalls 333 362#define __NR_Linux_syscalls 334
362 363
363#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 364#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
364 365
365#define __NR_O32_Linux 4000 366#define __NR_O32_Linux 4000
366#define __NR_O32_Linux_syscalls 333 367#define __NR_O32_Linux_syscalls 334
367 368
368#if _MIPS_SIM == _MIPS_SIM_ABI64 369#if _MIPS_SIM == _MIPS_SIM_ABI64
369 370
@@ -664,16 +665,17 @@
664#define __NR_pwritev (__NR_Linux + 290) 665#define __NR_pwritev (__NR_Linux + 290)
665#define __NR_rt_tgsigqueueinfo (__NR_Linux + 291) 666#define __NR_rt_tgsigqueueinfo (__NR_Linux + 291)
666#define __NR_perf_counter_open (__NR_Linux + 292) 667#define __NR_perf_counter_open (__NR_Linux + 292)
668#define __NR_accept4 (__NR_Linux + 293)
667 669
668/* 670/*
669 * Offset of the last Linux 64-bit flavoured syscall 671 * Offset of the last Linux 64-bit flavoured syscall
670 */ 672 */
671#define __NR_Linux_syscalls 292 673#define __NR_Linux_syscalls 293
672 674
673#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ 675#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
674 676
675#define __NR_64_Linux 5000 677#define __NR_64_Linux 5000
676#define __NR_64_Linux_syscalls 292 678#define __NR_64_Linux_syscalls 293
677 679
678#if _MIPS_SIM == _MIPS_SIM_NABI32 680#if _MIPS_SIM == _MIPS_SIM_NABI32
679 681
@@ -978,16 +980,17 @@
978#define __NR_pwritev (__NR_Linux + 294) 980#define __NR_pwritev (__NR_Linux + 294)
979#define __NR_rt_tgsigqueueinfo (__NR_Linux + 295) 981#define __NR_rt_tgsigqueueinfo (__NR_Linux + 295)
980#define __NR_perf_counter_open (__NR_Linux + 296) 982#define __NR_perf_counter_open (__NR_Linux + 296)
983#define __NR_accept4 (__NR_Linux + 297)
981 984
982/* 985/*
983 * Offset of the last N32 flavoured syscall 986 * Offset of the last N32 flavoured syscall
984 */ 987 */
985#define __NR_Linux_syscalls 296 988#define __NR_Linux_syscalls 297
986 989
987#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ 990#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
988 991
989#define __NR_N32_Linux 6000 992#define __NR_N32_Linux 6000
990#define __NR_N32_Linux_syscalls 296 993#define __NR_N32_Linux_syscalls 297
991 994
992#ifdef __KERNEL__ 995#ifdef __KERNEL__
993 996