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-rw-r--r--arch/mips/include/asm/bitops.h4
-rw-r--r--arch/mips/include/asm/checksum.h4
-rw-r--r--arch/mips/include/asm/compat.h1
-rw-r--r--arch/mips/include/asm/cpu-features.h9
-rw-r--r--arch/mips/include/asm/cpu-info.h4
-rw-r--r--arch/mips/include/asm/delay.h92
-rw-r--r--arch/mips/include/asm/div64.h142
-rw-r--r--arch/mips/include/asm/dma-mapping.h9
-rw-r--r--arch/mips/include/asm/fixmap.h3
-rw-r--r--arch/mips/include/asm/hazards.h5
-rw-r--r--arch/mips/include/asm/highmem.h6
-rw-r--r--arch/mips/include/asm/ioctl.h4
-rw-r--r--arch/mips/include/asm/mach-au1x00/au1000.h6
-rw-r--r--arch/mips/include/asm/mach-au1x00/au1xxx_ide.h17
-rw-r--r--arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h59
-rw-r--r--arch/mips/include/asm/mipsregs.h38
-rw-r--r--arch/mips/include/asm/page.h3
-rw-r--r--arch/mips/include/asm/pgtable-64.h6
-rw-r--r--arch/mips/include/asm/sn/addrs.h4
-rw-r--r--arch/mips/include/asm/sn/nmi.h4
-rw-r--r--arch/mips/include/asm/thread_info.h3
-rw-r--r--arch/mips/include/asm/time.h6
-rw-r--r--arch/mips/include/asm/uaccess.h68
23 files changed, 249 insertions, 248 deletions
diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h
index bac4a960b24c..b1e9e97a9c78 100644
--- a/arch/mips/include/asm/bitops.h
+++ b/arch/mips/include/asm/bitops.h
@@ -567,7 +567,7 @@ static inline unsigned long __fls(unsigned long word)
567 int num; 567 int num;
568 568
569 if (BITS_PER_LONG == 32 && 569 if (BITS_PER_LONG == 32 &&
570 __builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r) { 570 __builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) {
571 __asm__( 571 __asm__(
572 " .set push \n" 572 " .set push \n"
573 " .set mips32 \n" 573 " .set mips32 \n"
@@ -644,7 +644,7 @@ static inline int fls(int x)
644{ 644{
645 int r; 645 int r;
646 646
647 if (__builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r) { 647 if (__builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) {
648 __asm__("clz %0, %1" : "=r" (x) : "r" (x)); 648 __asm__("clz %0, %1" : "=r" (x) : "r" (x));
649 649
650 return 32 - x; 650 return 32 - x;
diff --git a/arch/mips/include/asm/checksum.h b/arch/mips/include/asm/checksum.h
index 290485ac5407..f2f7c6c264da 100644
--- a/arch/mips/include/asm/checksum.h
+++ b/arch/mips/include/asm/checksum.h
@@ -40,7 +40,7 @@ static inline
40__wsum csum_partial_copy_from_user(const void __user *src, void *dst, int len, 40__wsum csum_partial_copy_from_user(const void __user *src, void *dst, int len,
41 __wsum sum, int *err_ptr) 41 __wsum sum, int *err_ptr)
42{ 42{
43 might_sleep(); 43 might_fault();
44 return __csum_partial_copy_user((__force void *)src, dst, 44 return __csum_partial_copy_user((__force void *)src, dst,
45 len, sum, err_ptr); 45 len, sum, err_ptr);
46} 46}
@@ -53,7 +53,7 @@ static inline
53__wsum csum_and_copy_to_user(const void *src, void __user *dst, int len, 53__wsum csum_and_copy_to_user(const void *src, void __user *dst, int len,
54 __wsum sum, int *err_ptr) 54 __wsum sum, int *err_ptr)
55{ 55{
56 might_sleep(); 56 might_fault();
57 if (access_ok(VERIFY_WRITE, dst, len)) 57 if (access_ok(VERIFY_WRITE, dst, len))
58 return __csum_partial_copy_user(src, (__force void *)dst, 58 return __csum_partial_copy_user(src, (__force void *)dst,
59 len, sum, err_ptr); 59 len, sum, err_ptr);
diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h
index 6c5b40905dd6..f58aed354bfd 100644
--- a/arch/mips/include/asm/compat.h
+++ b/arch/mips/include/asm/compat.h
@@ -3,7 +3,6 @@
3/* 3/*
4 * Architecture specific compatibility types 4 * Architecture specific compatibility types
5 */ 5 */
6#include <linux/seccomp.h>
7#include <linux/thread_info.h> 6#include <linux/thread_info.h>
8#include <linux/types.h> 7#include <linux/types.h>
9#include <asm/page.h> 8#include <asm/page.h>
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index a0d14f85b781..c0047f861337 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -147,6 +147,15 @@
147#define cpu_has_mips_r (cpu_has_mips32r1 | cpu_has_mips32r2 | \ 147#define cpu_has_mips_r (cpu_has_mips32r1 | cpu_has_mips32r2 | \
148 cpu_has_mips64r1 | cpu_has_mips64r2) 148 cpu_has_mips64r1 | cpu_has_mips64r2)
149 149
150/*
151 * MIPS32, MIPS64, VR5500, IDT32332, IDT32334 and maybe a few other
152 * pre-MIPS32/MIPS53 processors have CLO, CLZ. For 64-bit kernels
153 * cpu_has_clo_clz also indicates the availability of DCLO and DCLZ.
154 */
155# ifndef cpu_has_clo_clz
156# define cpu_has_clo_clz cpu_has_mips_r
157# endif
158
150#ifndef cpu_has_dsp 159#ifndef cpu_has_dsp
151#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP) 160#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
152#endif 161#endif
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h
index 744cd8fb107f..126044308dec 100644
--- a/arch/mips/include/asm/cpu-info.h
+++ b/arch/mips/include/asm/cpu-info.h
@@ -39,8 +39,8 @@ struct cache_desc {
39#define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */ 39#define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */
40 40
41struct cpuinfo_mips { 41struct cpuinfo_mips {
42 unsigned long udelay_val; 42 unsigned int udelay_val;
43 unsigned long asid_cache; 43 unsigned int asid_cache;
44 44
45 /* 45 /*
46 * Capability and feature descriptor structure for MIPS CPU 46 * Capability and feature descriptor structure for MIPS CPU
diff --git a/arch/mips/include/asm/delay.h b/arch/mips/include/asm/delay.h
index b0bccd2c4ed5..a07e51b2be13 100644
--- a/arch/mips/include/asm/delay.h
+++ b/arch/mips/include/asm/delay.h
@@ -11,94 +11,12 @@
11#ifndef _ASM_DELAY_H 11#ifndef _ASM_DELAY_H
12#define _ASM_DELAY_H 12#define _ASM_DELAY_H
13 13
14#include <linux/param.h> 14extern void __delay(unsigned int loops);
15#include <linux/smp.h> 15extern void __ndelay(unsigned int ns);
16extern void __udelay(unsigned int us);
16 17
17#include <asm/compiler.h> 18#define ndelay(ns) __udelay(ns)
18#include <asm/war.h> 19#define udelay(us) __udelay(us)
19
20static inline void __delay(unsigned long loops)
21{
22 if (sizeof(long) == 4)
23 __asm__ __volatile__ (
24 " .set noreorder \n"
25 " .align 3 \n"
26 "1: bnez %0, 1b \n"
27 " subu %0, 1 \n"
28 " .set reorder \n"
29 : "=r" (loops)
30 : "0" (loops));
31 else if (sizeof(long) == 8 && !DADDI_WAR)
32 __asm__ __volatile__ (
33 " .set noreorder \n"
34 " .align 3 \n"
35 "1: bnez %0, 1b \n"
36 " dsubu %0, 1 \n"
37 " .set reorder \n"
38 : "=r" (loops)
39 : "0" (loops));
40 else if (sizeof(long) == 8 && DADDI_WAR)
41 __asm__ __volatile__ (
42 " .set noreorder \n"
43 " .align 3 \n"
44 "1: bnez %0, 1b \n"
45 " dsubu %0, %2 \n"
46 " .set reorder \n"
47 : "=r" (loops)
48 : "0" (loops), "r" (1));
49}
50
51
52/*
53 * Division by multiplication: you don't have to worry about
54 * loss of precision.
55 *
56 * Use only for very small delays ( < 1 msec). Should probably use a
57 * lookup table, really, as the multiplications take much too long with
58 * short delays. This is a "reasonable" implementation, though (and the
59 * first constant multiplications gets optimized away if the delay is
60 * a constant)
61 */
62
63static inline void __udelay(unsigned long usecs, unsigned long lpj)
64{
65 unsigned long hi, lo;
66
67 /*
68 * The rates of 128 is rounded wrongly by the catchall case
69 * for 64-bit. Excessive precission? Probably ...
70 */
71#if defined(CONFIG_64BIT) && (HZ == 128)
72 usecs *= 0x0008637bd05af6c7UL; /* 2**64 / (1000000 / HZ) */
73#elif defined(CONFIG_64BIT)
74 usecs *= (0x8000000000000000UL / (500000 / HZ));
75#else /* 32-bit junk follows here */
76 usecs *= (unsigned long) (((0x8000000000000000ULL / (500000 / HZ)) +
77 0x80000000ULL) >> 32);
78#endif
79
80 if (sizeof(long) == 4)
81 __asm__("multu\t%2, %3"
82 : "=h" (usecs), "=l" (lo)
83 : "r" (usecs), "r" (lpj)
84 : GCC_REG_ACCUM);
85 else if (sizeof(long) == 8 && !R4000_WAR)
86 __asm__("dmultu\t%2, %3"
87 : "=h" (usecs), "=l" (lo)
88 : "r" (usecs), "r" (lpj)
89 : GCC_REG_ACCUM);
90 else if (sizeof(long) == 8 && R4000_WAR)
91 __asm__("dmultu\t%3, %4\n\tmfhi\t%0"
92 : "=r" (usecs), "=h" (hi), "=l" (lo)
93 : "r" (usecs), "r" (lpj)
94 : GCC_REG_ACCUM);
95
96 __delay(usecs);
97}
98
99#define __udelay_val cpu_data[raw_smp_processor_id()].udelay_val
100
101#define udelay(usecs) __udelay((usecs), __udelay_val)
102 20
103/* make sure "usecs *= ..." in udelay do not overflow. */ 21/* make sure "usecs *= ..." in udelay do not overflow. */
104#if HZ >= 1000 22#if HZ >= 1000
diff --git a/arch/mips/include/asm/div64.h b/arch/mips/include/asm/div64.h
index d1d699105c11..dc5ea5736440 100644
--- a/arch/mips/include/asm/div64.h
+++ b/arch/mips/include/asm/div64.h
@@ -6,105 +6,63 @@
6 * License. See the file "COPYING" in the main directory of this archive 6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details. 7 * for more details.
8 */ 8 */
9#ifndef _ASM_DIV64_H 9#ifndef __ASM_DIV64_H
10#define _ASM_DIV64_H 10#define __ASM_DIV64_H
11 11
12#include <linux/types.h> 12#include <asm-generic/div64.h>
13 13
14#if (_MIPS_SZLONG == 32) 14#if BITS_PER_LONG == 64
15 15
16#include <asm/compiler.h> 16#include <linux/types.h>
17 17
18/* 18/*
19 * No traps on overflows for any of these... 19 * No traps on overflows for any of these...
20 */ 20 */
21 21
22#define do_div64_32(res, high, low, base) ({ \ 22#define __div64_32(n, base) \
23 unsigned long __quot32, __mod32; \ 23({ \
24 unsigned long __cf, __tmp, __tmp2, __i; \ 24 unsigned long __cf, __tmp, __tmp2, __i; \
25 \ 25 unsigned long __quot32, __mod32; \
26 __asm__(".set push\n\t" \ 26 unsigned long __high, __low; \
27 ".set noat\n\t" \ 27 unsigned long long __n; \
28 ".set noreorder\n\t" \ 28 \
29 "move %2, $0\n\t" \ 29 __high = *__n >> 32; \
30 "move %3, $0\n\t" \ 30 __low = __n; \
31 "b 1f\n\t" \ 31 __asm__( \
32 " li %4, 0x21\n" \ 32 " .set push \n" \
33 "0:\n\t" \ 33 " .set noat \n" \
34 "sll $1, %0, 0x1\n\t" \ 34 " .set noreorder \n" \
35 "srl %3, %0, 0x1f\n\t" \ 35 " move %2, $0 \n" \
36 "or %0, $1, %5\n\t" \ 36 " move %3, $0 \n" \
37 "sll %1, %1, 0x1\n\t" \ 37 " b 1f \n" \
38 "sll %2, %2, 0x1\n" \ 38 " li %4, 0x21 \n" \
39 "1:\n\t" \ 39 "0: \n" \
40 "bnez %3, 2f\n\t" \ 40 " sll $1, %0, 0x1 \n" \
41 " sltu %5, %0, %z6\n\t" \ 41 " srl %3, %0, 0x1f \n" \
42 "bnez %5, 3f\n" \ 42 " or %0, $1, %5 \n" \
43 "2:\n\t" \ 43 " sll %1, %1, 0x1 \n" \
44 " addiu %4, %4, -1\n\t" \ 44 " sll %2, %2, 0x1 \n" \
45 "subu %0, %0, %z6\n\t" \ 45 "1: \n" \
46 "addiu %2, %2, 1\n" \ 46 " bnez %3, 2f \n" \
47 "3:\n\t" \ 47 " sltu %5, %0, %z6 \n" \
48 "bnez %4, 0b\n\t" \ 48 " bnez %5, 3f \n" \
49 " srl %5, %1, 0x1f\n\t" \ 49 "2: \n" \
50 ".set pop" \ 50 " addiu %4, %4, -1 \n" \
51 : "=&r" (__mod32), "=&r" (__tmp), \ 51 " subu %0, %0, %z6 \n" \
52 "=&r" (__quot32), "=&r" (__cf), \ 52 " addiu %2, %2, 1 \n" \
53 "=&r" (__i), "=&r" (__tmp2) \ 53 "3: \n" \
54 : "Jr" (base), "0" (high), "1" (low)); \ 54 " bnez %4, 0b\n\t" \
55 \ 55 " srl %5, %1, 0x1f\n\t" \
56 (res) = __quot32; \ 56 " .set pop" \
57 __mod32; }) 57 : "=&r" (__mod32), "=&r" (__tmp), \
58 58 "=&r" (__quot32), "=&r" (__cf), \
59#define do_div(n, base) ({ \ 59 "=&r" (__i), "=&r" (__tmp2) \
60 unsigned long long __quot; \ 60 : "Jr" (base), "0" (__high), "1" (__low)); \
61 unsigned long __mod; \ 61 \
62 unsigned long long __div; \ 62 (__n) = __quot32; \
63 unsigned long __upper, __low, __high, __base; \ 63 __mod32; \
64 \ 64})
65 __div = (n); \
66 __base = (base); \
67 \
68 __high = __div >> 32; \
69 __low = __div; \
70 __upper = __high; \
71 \
72 if (__high) \
73 __asm__("divu $0, %z2, %z3" \
74 : "=h" (__upper), "=l" (__high) \
75 : "Jr" (__high), "Jr" (__base) \
76 : GCC_REG_ACCUM); \
77 \
78 __mod = do_div64_32(__low, __upper, __low, __base); \
79 \
80 __quot = __high; \
81 __quot = __quot << 32 | __low; \
82 (n) = __quot; \
83 __mod; })
84
85#endif /* (_MIPS_SZLONG == 32) */
86
87#if (_MIPS_SZLONG == 64)
88
89/*
90 * Hey, we're already 64-bit, no
91 * need to play games..
92 */
93#define do_div(n, base) ({ \
94 unsigned long __quot; \
95 unsigned int __mod; \
96 unsigned long __div; \
97 unsigned int __base; \
98 \
99 __div = (n); \
100 __base = (base); \
101 \
102 __mod = __div % __base; \
103 __quot = __div / __base; \
104 \
105 (n) = __quot; \
106 __mod; })
107 65
108#endif /* (_MIPS_SZLONG == 64) */ 66#endif /* BITS_PER_LONG == 64 */
109 67
110#endif /* _ASM_DIV64_H */ 68#endif /* __ASM_DIV64_H */
diff --git a/arch/mips/include/asm/dma-mapping.h b/arch/mips/include/asm/dma-mapping.h
index c64afb40cd06..d16afddb09a9 100644
--- a/arch/mips/include/asm/dma-mapping.h
+++ b/arch/mips/include/asm/dma-mapping.h
@@ -24,8 +24,13 @@ extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
24 enum dma_data_direction direction); 24 enum dma_data_direction direction);
25extern dma_addr_t dma_map_page(struct device *dev, struct page *page, 25extern dma_addr_t dma_map_page(struct device *dev, struct page *page,
26 unsigned long offset, size_t size, enum dma_data_direction direction); 26 unsigned long offset, size_t size, enum dma_data_direction direction);
27extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address, 27
28 size_t size, enum dma_data_direction direction); 28static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
29 size_t size, enum dma_data_direction direction)
30{
31 dma_unmap_single(dev, dma_address, size, direction);
32}
33
29extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg, 34extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
30 int nhwentries, enum dma_data_direction direction); 35 int nhwentries, enum dma_data_direction direction);
31extern void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, 36extern void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
diff --git a/arch/mips/include/asm/fixmap.h b/arch/mips/include/asm/fixmap.h
index 9cc8522a394f..0f5caa1307f1 100644
--- a/arch/mips/include/asm/fixmap.h
+++ b/arch/mips/include/asm/fixmap.h
@@ -108,6 +108,9 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr)
108 return __virt_to_fix(vaddr); 108 return __virt_to_fix(vaddr);
109} 109}
110 110
111#define kmap_get_fixmap_pte(vaddr) \
112 pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)), (vaddr))
113
111/* 114/*
112 * Called from pgtable_init() 115 * Called from pgtable_init()
113 */ 116 */
diff --git a/arch/mips/include/asm/hazards.h b/arch/mips/include/asm/hazards.h
index a12d971db4f9..0eaf77ffbc4f 100644
--- a/arch/mips/include/asm/hazards.h
+++ b/arch/mips/include/asm/hazards.h
@@ -138,8 +138,9 @@ do { \
138 __instruction_hazard(); \ 138 __instruction_hazard(); \
139} while (0) 139} while (0)
140 140
141#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \ 141#elif defined(CONFIG_MACH_ALCHEMY) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \
142 defined(CONFIG_CPU_R5500) || defined(CONFIG_MACH_ALCHEMY) 142 defined(CONFIG_CPU_LOONGSON2) || defined(CONFIG_CPU_R10000) || \
143 defined(CONFIG_CPU_R5500)
143 144
144/* 145/*
145 * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer. 146 * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
diff --git a/arch/mips/include/asm/highmem.h b/arch/mips/include/asm/highmem.h
index 4374ab2adc75..25adfb02923d 100644
--- a/arch/mips/include/asm/highmem.h
+++ b/arch/mips/include/asm/highmem.h
@@ -30,8 +30,6 @@
30/* declarations for highmem.c */ 30/* declarations for highmem.c */
31extern unsigned long highstart_pfn, highend_pfn; 31extern unsigned long highstart_pfn, highend_pfn;
32 32
33extern pte_t *kmap_pte;
34extern pgprot_t kmap_prot;
35extern pte_t *pkmap_page_table; 33extern pte_t *pkmap_page_table;
36 34
37/* 35/*
@@ -62,6 +60,10 @@ extern struct page *__kmap_atomic_to_page(void *ptr);
62 60
63#define flush_cache_kmaps() flush_cache_all() 61#define flush_cache_kmaps() flush_cache_all()
64 62
63extern void kmap_init(void);
64
65#define kmap_prot PAGE_KERNEL
66
65#endif /* __KERNEL__ */ 67#endif /* __KERNEL__ */
66 68
67#endif /* _ASM_HIGHMEM_H */ 69#endif /* _ASM_HIGHMEM_H */
diff --git a/arch/mips/include/asm/ioctl.h b/arch/mips/include/asm/ioctl.h
index 85067e248a83..916163401b2c 100644
--- a/arch/mips/include/asm/ioctl.h
+++ b/arch/mips/include/asm/ioctl.h
@@ -60,12 +60,16 @@
60 ((nr) << _IOC_NRSHIFT) | \ 60 ((nr) << _IOC_NRSHIFT) | \
61 ((size) << _IOC_SIZESHIFT)) 61 ((size) << _IOC_SIZESHIFT))
62 62
63#ifdef __KERNEL__
63/* provoke compile error for invalid uses of size argument */ 64/* provoke compile error for invalid uses of size argument */
64extern unsigned int __invalid_size_argument_for_IOC; 65extern unsigned int __invalid_size_argument_for_IOC;
65#define _IOC_TYPECHECK(t) \ 66#define _IOC_TYPECHECK(t) \
66 ((sizeof(t) == sizeof(t[1]) && \ 67 ((sizeof(t) == sizeof(t[1]) && \
67 sizeof(t) < (1 << _IOC_SIZEBITS)) ? \ 68 sizeof(t) < (1 << _IOC_SIZEBITS)) ? \
68 sizeof(t) : __invalid_size_argument_for_IOC) 69 sizeof(t) : __invalid_size_argument_for_IOC)
70#else
71#define _IOC_TYPECHECK(t) (sizeof(t))
72#endif
69 73
70/* used to create numbers */ 74/* used to create numbers */
71#define _IO(type, nr) _IOC(_IOC_NONE, (type), (nr), 0) 75#define _IO(type, nr) _IOC(_IOC_NONE, (type), (nr), 0)
diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h
index 62f91f50b5b5..854e95f1b07c 100644
--- a/arch/mips/include/asm/mach-au1x00/au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/au1000.h
@@ -715,7 +715,7 @@ enum soc_au1500_ints {
715#ifdef CONFIG_SOC_AU1100 715#ifdef CONFIG_SOC_AU1100
716enum soc_au1100_ints { 716enum soc_au1100_ints {
717 AU1100_FIRST_INT = MIPS_CPU_IRQ_BASE + 8, 717 AU1100_FIRST_INT = MIPS_CPU_IRQ_BASE + 8,
718 AU1100_UART0_INT, 718 AU1100_UART0_INT = AU1100_FIRST_INT,
719 AU1100_UART1_INT, 719 AU1100_UART1_INT,
720 AU1100_SD_INT, 720 AU1100_SD_INT,
721 AU1100_UART3_INT, 721 AU1100_UART3_INT,
@@ -902,8 +902,8 @@ enum soc_au1200_ints {
902 AU1000_RTC_MATCH0_INT, 902 AU1000_RTC_MATCH0_INT,
903 AU1000_RTC_MATCH1_INT, 903 AU1000_RTC_MATCH1_INT,
904 AU1000_RTC_MATCH2_INT, 904 AU1000_RTC_MATCH2_INT,
905 905 AU1200_GPIO_203,
906 AU1200_NAND_INT = AU1200_FIRST_INT + 23, 906 AU1200_NAND_INT,
907 AU1200_GPIO_204, 907 AU1200_GPIO_204,
908 AU1200_GPIO_205, 908 AU1200_GPIO_205,
909 AU1200_GPIO_206, 909 AU1200_GPIO_206,
diff --git a/arch/mips/include/asm/mach-au1x00/au1xxx_ide.h b/arch/mips/include/asm/mach-au1x00/au1xxx_ide.h
index 60638b8969ba..5656c72de6d3 100644
--- a/arch/mips/include/asm/mach-au1x00/au1xxx_ide.h
+++ b/arch/mips/include/asm/mach-au1x00/au1xxx_ide.h
@@ -46,20 +46,6 @@
46#define CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON 0 46#define CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON 0
47#endif 47#endif
48 48
49#ifdef CONFIG_PM
50/*
51 * This will enable the device to be powered up when write() or read()
52 * is called. If this is not defined, the driver will return -EBUSY.
53 */
54#define WAKE_ON_ACCESS 1
55
56typedef struct {
57 spinlock_t lock; /* Used to block on state transitions */
58 au1xxx_power_dev_t *dev; /* Power Managers device structure */
59 unsigned stopped; /* Used to signal device is stopped */
60} pm_state;
61#endif
62
63typedef struct { 49typedef struct {
64 u32 tx_dev_id, rx_dev_id, target_dev_id; 50 u32 tx_dev_id, rx_dev_id, target_dev_id;
65 u32 tx_chan, rx_chan; 51 u32 tx_chan, rx_chan;
@@ -72,9 +58,6 @@ typedef struct {
72#endif 58#endif
73 int irq; 59 int irq;
74 u32 regbase; 60 u32 regbase;
75#ifdef CONFIG_PM
76 pm_state pm;
77#endif
78} _auide_hwif; 61} _auide_hwif;
79 62
80/******************************************************************************/ 63/******************************************************************************/
diff --git a/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h b/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h
new file mode 100644
index 000000000000..550a10dc9dba
--- /dev/null
+++ b/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h
@@ -0,0 +1,59 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2009 Wu Zhangjin <wuzj@lemote.com>
7 * Copyright (C) 2009 Philippe Vachon <philippe@cowpig.ca>
8 * Copyright (C) 2009 Zhang Le <r0bertz@gentoo.org>
9 *
10 * reference: /proc/cpuinfo,
11 * arch/mips/kernel/cpu-probe.c(cpu_probe_legacy),
12 * arch/mips/kernel/proc.c(show_cpuinfo),
13 * loongson2f user manual.
14 */
15
16#ifndef __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H
17#define __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H
18
19#define cpu_dcache_line_size() 32
20#define cpu_icache_line_size() 32
21#define cpu_scache_line_size() 32
22
23
24#define cpu_has_32fpr 1
25#define cpu_has_3k_cache 0
26#define cpu_has_4k_cache 1
27#define cpu_has_4kex 1
28#define cpu_has_64bits 1
29#define cpu_has_cache_cdex_p 0
30#define cpu_has_cache_cdex_s 0
31#define cpu_has_counter 1
32#define cpu_has_dc_aliases 1
33#define cpu_has_divec 0
34#define cpu_has_dsp 0
35#define cpu_has_ejtag 0
36#define cpu_has_fpu 1
37#define cpu_has_ic_fills_f_dc 0
38#define cpu_has_inclusive_pcaches 1
39#define cpu_has_llsc 1
40#define cpu_has_mcheck 0
41#define cpu_has_mdmx 0
42#define cpu_has_mips16 0
43#define cpu_has_mips32r1 0
44#define cpu_has_mips32r2 0
45#define cpu_has_mips3d 0
46#define cpu_has_mips64r1 0
47#define cpu_has_mips64r2 0
48#define cpu_has_mipsmt 0
49#define cpu_has_prefetch 0
50#define cpu_has_smartmips 0
51#define cpu_has_tlb 1
52#define cpu_has_tx39_cache 0
53#define cpu_has_userlocal 0
54#define cpu_has_vce 0
55#define cpu_has_vtag_icache 0
56#define cpu_has_watch 1
57#define cpu_icache_snoops_remote_store 1
58
59#endif /* __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H */
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 526f327475ce..32ef8bec5c85 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -184,12 +184,19 @@
184#else 184#else
185 185
186#define PM_4K 0x00000000 186#define PM_4K 0x00000000
187#define PM_8K 0x00002000
187#define PM_16K 0x00006000 188#define PM_16K 0x00006000
189#define PM_32K 0x0000e000
188#define PM_64K 0x0001e000 190#define PM_64K 0x0001e000
191#define PM_128K 0x0003e000
189#define PM_256K 0x0007e000 192#define PM_256K 0x0007e000
193#define PM_512K 0x000fe000
190#define PM_1M 0x001fe000 194#define PM_1M 0x001fe000
195#define PM_2M 0x003fe000
191#define PM_4M 0x007fe000 196#define PM_4M 0x007fe000
197#define PM_8M 0x00ffe000
192#define PM_16M 0x01ffe000 198#define PM_16M 0x01ffe000
199#define PM_32M 0x03ffe000
193#define PM_64M 0x07ffe000 200#define PM_64M 0x07ffe000
194#define PM_256M 0x1fffe000 201#define PM_256M 0x1fffe000
195#define PM_1G 0x7fffe000 202#define PM_1G 0x7fffe000
@@ -201,8 +208,12 @@
201 */ 208 */
202#ifdef CONFIG_PAGE_SIZE_4KB 209#ifdef CONFIG_PAGE_SIZE_4KB
203#define PM_DEFAULT_MASK PM_4K 210#define PM_DEFAULT_MASK PM_4K
211#elif defined(CONFIG_PAGE_SIZE_8KB)
212#define PM_DEFAULT_MASK PM_8K
204#elif defined(CONFIG_PAGE_SIZE_16KB) 213#elif defined(CONFIG_PAGE_SIZE_16KB)
205#define PM_DEFAULT_MASK PM_16K 214#define PM_DEFAULT_MASK PM_16K
215#elif defined(CONFIG_PAGE_SIZE_32KB)
216#define PM_DEFAULT_MASK PM_32K
206#elif defined(CONFIG_PAGE_SIZE_64KB) 217#elif defined(CONFIG_PAGE_SIZE_64KB)
207#define PM_DEFAULT_MASK PM_64K 218#define PM_DEFAULT_MASK PM_64K
208#else 219#else
@@ -717,8 +728,8 @@ do { \
717 ".set\tmips64\n\t" \ 728 ".set\tmips64\n\t" \
718 "dmfc0\t%M0, " #source "\n\t" \ 729 "dmfc0\t%M0, " #source "\n\t" \
719 "dsll\t%L0, %M0, 32\n\t" \ 730 "dsll\t%L0, %M0, 32\n\t" \
720 "dsrl\t%M0, %M0, 32\n\t" \ 731 "dsra\t%M0, %M0, 32\n\t" \
721 "dsrl\t%L0, %L0, 32\n\t" \ 732 "dsra\t%L0, %L0, 32\n\t" \
722 ".set\tmips0" \ 733 ".set\tmips0" \
723 : "=r" (__val)); \ 734 : "=r" (__val)); \
724 else \ 735 else \
@@ -726,8 +737,8 @@ do { \
726 ".set\tmips64\n\t" \ 737 ".set\tmips64\n\t" \
727 "dmfc0\t%M0, " #source ", " #sel "\n\t" \ 738 "dmfc0\t%M0, " #source ", " #sel "\n\t" \
728 "dsll\t%L0, %M0, 32\n\t" \ 739 "dsll\t%L0, %M0, 32\n\t" \
729 "dsrl\t%M0, %M0, 32\n\t" \ 740 "dsra\t%M0, %M0, 32\n\t" \
730 "dsrl\t%L0, %L0, 32\n\t" \ 741 "dsra\t%L0, %L0, 32\n\t" \
731 ".set\tmips0" \ 742 ".set\tmips0" \
732 : "=r" (__val)); \ 743 : "=r" (__val)); \
733 local_irq_restore(__flags); \ 744 local_irq_restore(__flags); \
@@ -1484,14 +1495,15 @@ static inline unsigned int \
1484set_c0_##name(unsigned int set) \ 1495set_c0_##name(unsigned int set) \
1485{ \ 1496{ \
1486 unsigned int res; \ 1497 unsigned int res; \
1498 unsigned int new; \
1487 unsigned int omt; \ 1499 unsigned int omt; \
1488 unsigned long flags; \ 1500 unsigned long flags; \
1489 \ 1501 \
1490 local_irq_save(flags); \ 1502 local_irq_save(flags); \
1491 omt = __dmt(); \ 1503 omt = __dmt(); \
1492 res = read_c0_##name(); \ 1504 res = read_c0_##name(); \
1493 res |= set; \ 1505 new = res | set; \
1494 write_c0_##name(res); \ 1506 write_c0_##name(new); \
1495 __emt(omt); \ 1507 __emt(omt); \
1496 local_irq_restore(flags); \ 1508 local_irq_restore(flags); \
1497 \ 1509 \
@@ -1502,14 +1514,15 @@ static inline unsigned int \
1502clear_c0_##name(unsigned int clear) \ 1514clear_c0_##name(unsigned int clear) \
1503{ \ 1515{ \
1504 unsigned int res; \ 1516 unsigned int res; \
1517 unsigned int new; \
1505 unsigned int omt; \ 1518 unsigned int omt; \
1506 unsigned long flags; \ 1519 unsigned long flags; \
1507 \ 1520 \
1508 local_irq_save(flags); \ 1521 local_irq_save(flags); \
1509 omt = __dmt(); \ 1522 omt = __dmt(); \
1510 res = read_c0_##name(); \ 1523 res = read_c0_##name(); \
1511 res &= ~clear; \ 1524 new = res & ~clear; \
1512 write_c0_##name(res); \ 1525 write_c0_##name(new); \
1513 __emt(omt); \ 1526 __emt(omt); \
1514 local_irq_restore(flags); \ 1527 local_irq_restore(flags); \
1515 \ 1528 \
@@ -1517,9 +1530,10 @@ clear_c0_##name(unsigned int clear) \
1517} \ 1530} \
1518 \ 1531 \
1519static inline unsigned int \ 1532static inline unsigned int \
1520change_c0_##name(unsigned int change, unsigned int new) \ 1533change_c0_##name(unsigned int change, unsigned int newbits) \
1521{ \ 1534{ \
1522 unsigned int res; \ 1535 unsigned int res; \
1536 unsigned int new; \
1523 unsigned int omt; \ 1537 unsigned int omt; \
1524 unsigned long flags; \ 1538 unsigned long flags; \
1525 \ 1539 \
@@ -1527,9 +1541,9 @@ change_c0_##name(unsigned int change, unsigned int new) \
1527 \ 1541 \
1528 omt = __dmt(); \ 1542 omt = __dmt(); \
1529 res = read_c0_##name(); \ 1543 res = read_c0_##name(); \
1530 res &= ~change; \ 1544 new = res & ~change; \
1531 res |= (new & change); \ 1545 new |= (newbits & change); \
1532 write_c0_##name(res); \ 1546 write_c0_##name(new); \
1533 __emt(omt); \ 1547 __emt(omt); \
1534 local_irq_restore(flags); \ 1548 local_irq_restore(flags); \
1535 \ 1549 \
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
index fe7a88ea066e..9f946e4ca057 100644
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -23,6 +23,9 @@
23#ifdef CONFIG_PAGE_SIZE_16KB 23#ifdef CONFIG_PAGE_SIZE_16KB
24#define PAGE_SHIFT 14 24#define PAGE_SHIFT 14
25#endif 25#endif
26#ifdef CONFIG_PAGE_SIZE_32KB
27#define PAGE_SHIFT 15
28#endif
26#ifdef CONFIG_PAGE_SIZE_64KB 29#ifdef CONFIG_PAGE_SIZE_64KB
27#define PAGE_SHIFT 16 30#define PAGE_SHIFT 16
28#endif 31#endif
diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h
index 943515f0ef87..4ed9d1bba2ba 100644
--- a/arch/mips/include/asm/pgtable-64.h
+++ b/arch/mips/include/asm/pgtable-64.h
@@ -83,6 +83,12 @@
83#define PMD_ORDER 0 83#define PMD_ORDER 0
84#define PTE_ORDER 0 84#define PTE_ORDER 0
85#endif 85#endif
86#ifdef CONFIG_PAGE_SIZE_32KB
87#define PGD_ORDER 0
88#define PUD_ORDER aieeee_attempt_to_allocate_pud
89#define PMD_ORDER 0
90#define PTE_ORDER 0
91#endif
86#ifdef CONFIG_PAGE_SIZE_64KB 92#ifdef CONFIG_PAGE_SIZE_64KB
87#define PGD_ORDER 0 93#define PGD_ORDER 0
88#define PUD_ORDER aieeee_attempt_to_allocate_pud 94#define PUD_ORDER aieeee_attempt_to_allocate_pud
diff --git a/arch/mips/include/asm/sn/addrs.h b/arch/mips/include/asm/sn/addrs.h
index fec9bdd34913..3a56d90abfa6 100644
--- a/arch/mips/include/asm/sn/addrs.h
+++ b/arch/mips/include/asm/sn/addrs.h
@@ -359,11 +359,11 @@
359 TO_NODE_UNCAC((nasid), LAUNCH_OFFSET(nasid, slice)) 359 TO_NODE_UNCAC((nasid), LAUNCH_OFFSET(nasid, slice))
360#define LAUNCH_SIZE(nasid) KLD_LAUNCH(nasid)->size 360#define LAUNCH_SIZE(nasid) KLD_LAUNCH(nasid)->size
361 361
362#define NMI_OFFSET(nasid, slice) \ 362#define SN_NMI_OFFSET(nasid, slice) \
363 (KLD_NMI(nasid)->offset + \ 363 (KLD_NMI(nasid)->offset + \
364 KLD_NMI(nasid)->stride * (slice)) 364 KLD_NMI(nasid)->stride * (slice))
365#define NMI_ADDR(nasid, slice) \ 365#define NMI_ADDR(nasid, slice) \
366 TO_NODE_UNCAC((nasid), NMI_OFFSET(nasid, slice)) 366 TO_NODE_UNCAC((nasid), SN_NMI_OFFSET(nasid, slice))
367#define NMI_SIZE(nasid) KLD_NMI(nasid)->size 367#define NMI_SIZE(nasid) KLD_NMI(nasid)->size
368 368
369#define KLCONFIG_OFFSET(nasid) KLD_KLCONFIG(nasid)->offset 369#define KLCONFIG_OFFSET(nasid) KLD_KLCONFIG(nasid)->offset
diff --git a/arch/mips/include/asm/sn/nmi.h b/arch/mips/include/asm/sn/nmi.h
index 6b7b0b5f3729..1af49897d4e1 100644
--- a/arch/mips/include/asm/sn/nmi.h
+++ b/arch/mips/include/asm/sn/nmi.h
@@ -3,13 +3,13 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Derived from IRIX <sys/SN/nmi.h>, Revision 1.5.
7 *
6 * Copyright (C) 1992 - 1997 Silicon Graphics, Inc. 8 * Copyright (C) 1992 - 1997 Silicon Graphics, Inc.
7 */ 9 */
8#ifndef __ASM_SN_NMI_H 10#ifndef __ASM_SN_NMI_H
9#define __ASM_SN_NMI_H 11#define __ASM_SN_NMI_H
10 12
11#ident "$Revision: 1.5 $"
12
13#include <asm/sn/addrs.h> 13#include <asm/sn/addrs.h>
14 14
15/* 15/*
diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h
index 676aa2ae1913..143a48136a4b 100644
--- a/arch/mips/include/asm/thread_info.h
+++ b/arch/mips/include/asm/thread_info.h
@@ -75,6 +75,9 @@ register struct thread_info *__current_thread_info __asm__("$28");
75#ifdef CONFIG_PAGE_SIZE_16KB 75#ifdef CONFIG_PAGE_SIZE_16KB
76#define THREAD_SIZE_ORDER (0) 76#define THREAD_SIZE_ORDER (0)
77#endif 77#endif
78#ifdef CONFIG_PAGE_SIZE_32KB
79#define THREAD_SIZE_ORDER (0)
80#endif
78#ifdef CONFIG_PAGE_SIZE_64KB 81#ifdef CONFIG_PAGE_SIZE_64KB
79#define THREAD_SIZE_ORDER (0) 82#define THREAD_SIZE_ORDER (0)
80#endif 83#endif
diff --git a/arch/mips/include/asm/time.h b/arch/mips/include/asm/time.h
index 38a30d2ee959..df6a430de5eb 100644
--- a/arch/mips/include/asm/time.h
+++ b/arch/mips/include/asm/time.h
@@ -57,7 +57,11 @@ extern int r4k_clockevent_init(void);
57 57
58static inline int mips_clockevent_init(void) 58static inline int mips_clockevent_init(void)
59{ 59{
60#ifdef CONFIG_CEVT_R4K 60#ifdef CONFIG_MIPS_MT_SMTC
61 extern int smtc_clockevent_init(void);
62
63 return smtc_clockevent_init();
64#elif defined(CONFIG_CEVT_R4K)
61 return r4k_clockevent_init(); 65 return r4k_clockevent_init();
62#else 66#else
63 return -ENXIO; 67 return -ENXIO;
diff --git a/arch/mips/include/asm/uaccess.h b/arch/mips/include/asm/uaccess.h
index 09ff5bb17445..c2d53c18fd36 100644
--- a/arch/mips/include/asm/uaccess.h
+++ b/arch/mips/include/asm/uaccess.h
@@ -105,10 +105,20 @@
105#define __access_mask get_fs().seg 105#define __access_mask get_fs().seg
106 106
107#define __access_ok(addr, size, mask) \ 107#define __access_ok(addr, size, mask) \
108 (((signed long)((mask) & ((addr) | ((addr) + (size)) | __ua_size(size)))) == 0) 108({ \
109 unsigned long __addr = (unsigned long) (addr); \
110 unsigned long __size = size; \
111 unsigned long __mask = mask; \
112 unsigned long __ok; \
113 \
114 __chk_user_ptr(addr); \
115 __ok = (signed long)(__mask & (__addr | (__addr + __size) | \
116 __ua_size(__size))); \
117 __ok == 0; \
118})
109 119
110#define access_ok(type, addr, size) \ 120#define access_ok(type, addr, size) \
111 likely(__access_ok((unsigned long)(addr), (size), __access_mask)) 121 likely(__access_ok((addr), (size), __access_mask))
112 122
113/* 123/*
114 * put_user: - Write a simple value into user space. 124 * put_user: - Write a simple value into user space.
@@ -225,6 +235,7 @@ do { \
225({ \ 235({ \
226 int __gu_err; \ 236 int __gu_err; \
227 \ 237 \
238 __chk_user_ptr(ptr); \
228 __get_user_common((x), size, ptr); \ 239 __get_user_common((x), size, ptr); \
229 __gu_err; \ 240 __gu_err; \
230}) 241})
@@ -234,6 +245,7 @@ do { \
234 int __gu_err = -EFAULT; \ 245 int __gu_err = -EFAULT; \
235 const __typeof__(*(ptr)) __user * __gu_ptr = (ptr); \ 246 const __typeof__(*(ptr)) __user * __gu_ptr = (ptr); \
236 \ 247 \
248 might_fault(); \
237 if (likely(access_ok(VERIFY_READ, __gu_ptr, size))) \ 249 if (likely(access_ok(VERIFY_READ, __gu_ptr, size))) \
238 __get_user_common((x), size, __gu_ptr); \ 250 __get_user_common((x), size, __gu_ptr); \
239 \ 251 \
@@ -305,6 +317,7 @@ do { \
305 __typeof__(*(ptr)) __pu_val; \ 317 __typeof__(*(ptr)) __pu_val; \
306 int __pu_err = 0; \ 318 int __pu_err = 0; \
307 \ 319 \
320 __chk_user_ptr(ptr); \
308 __pu_val = (x); \ 321 __pu_val = (x); \
309 switch (size) { \ 322 switch (size) { \
310 case 1: __put_user_asm("sb", ptr); break; \ 323 case 1: __put_user_asm("sb", ptr); break; \
@@ -322,6 +335,7 @@ do { \
322 __typeof__(*(ptr)) __pu_val = (x); \ 335 __typeof__(*(ptr)) __pu_val = (x); \
323 int __pu_err = -EFAULT; \ 336 int __pu_err = -EFAULT; \
324 \ 337 \
338 might_fault(); \
325 if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) { \ 339 if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) { \
326 switch (size) { \ 340 switch (size) { \
327 case 1: __put_user_asm("sb", __pu_addr); break; \ 341 case 1: __put_user_asm("sb", __pu_addr); break; \
@@ -696,10 +710,10 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n);
696 const void *__cu_from; \ 710 const void *__cu_from; \
697 long __cu_len; \ 711 long __cu_len; \
698 \ 712 \
699 might_sleep(); \
700 __cu_to = (to); \ 713 __cu_to = (to); \
701 __cu_from = (from); \ 714 __cu_from = (from); \
702 __cu_len = (n); \ 715 __cu_len = (n); \
716 might_fault(); \
703 __cu_len = __invoke_copy_to_user(__cu_to, __cu_from, __cu_len); \ 717 __cu_len = __invoke_copy_to_user(__cu_to, __cu_from, __cu_len); \
704 __cu_len; \ 718 __cu_len; \
705}) 719})
@@ -752,13 +766,14 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
752 const void *__cu_from; \ 766 const void *__cu_from; \
753 long __cu_len; \ 767 long __cu_len; \
754 \ 768 \
755 might_sleep(); \
756 __cu_to = (to); \ 769 __cu_to = (to); \
757 __cu_from = (from); \ 770 __cu_from = (from); \
758 __cu_len = (n); \ 771 __cu_len = (n); \
759 if (access_ok(VERIFY_WRITE, __cu_to, __cu_len)) \ 772 if (access_ok(VERIFY_WRITE, __cu_to, __cu_len)) { \
773 might_fault(); \
760 __cu_len = __invoke_copy_to_user(__cu_to, __cu_from, \ 774 __cu_len = __invoke_copy_to_user(__cu_to, __cu_from, \
761 __cu_len); \ 775 __cu_len); \
776 } \
762 __cu_len; \ 777 __cu_len; \
763}) 778})
764 779
@@ -831,10 +846,10 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
831 const void __user *__cu_from; \ 846 const void __user *__cu_from; \
832 long __cu_len; \ 847 long __cu_len; \
833 \ 848 \
834 might_sleep(); \
835 __cu_to = (to); \ 849 __cu_to = (to); \
836 __cu_from = (from); \ 850 __cu_from = (from); \
837 __cu_len = (n); \ 851 __cu_len = (n); \
852 might_fault(); \
838 __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \ 853 __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \
839 __cu_len); \ 854 __cu_len); \
840 __cu_len; \ 855 __cu_len; \
@@ -862,17 +877,31 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
862 const void __user *__cu_from; \ 877 const void __user *__cu_from; \
863 long __cu_len; \ 878 long __cu_len; \
864 \ 879 \
865 might_sleep(); \
866 __cu_to = (to); \ 880 __cu_to = (to); \
867 __cu_from = (from); \ 881 __cu_from = (from); \
868 __cu_len = (n); \ 882 __cu_len = (n); \
869 if (access_ok(VERIFY_READ, __cu_from, __cu_len)) \ 883 if (access_ok(VERIFY_READ, __cu_from, __cu_len)) { \
884 might_fault(); \
870 __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \ 885 __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \
871 __cu_len); \ 886 __cu_len); \
887 } \
872 __cu_len; \ 888 __cu_len; \
873}) 889})
874 890
875#define __copy_in_user(to, from, n) __copy_from_user(to, from, n) 891#define __copy_in_user(to, from, n) \
892({ \
893 void __user *__cu_to; \
894 const void __user *__cu_from; \
895 long __cu_len; \
896 \
897 __cu_to = (to); \
898 __cu_from = (from); \
899 __cu_len = (n); \
900 might_fault(); \
901 __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \
902 __cu_len); \
903 __cu_len; \
904})
876 905
877#define copy_in_user(to, from, n) \ 906#define copy_in_user(to, from, n) \
878({ \ 907({ \
@@ -880,14 +909,15 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
880 const void __user *__cu_from; \ 909 const void __user *__cu_from; \
881 long __cu_len; \ 910 long __cu_len; \
882 \ 911 \
883 might_sleep(); \
884 __cu_to = (to); \ 912 __cu_to = (to); \
885 __cu_from = (from); \ 913 __cu_from = (from); \
886 __cu_len = (n); \ 914 __cu_len = (n); \
887 if (likely(access_ok(VERIFY_READ, __cu_from, __cu_len) && \ 915 if (likely(access_ok(VERIFY_READ, __cu_from, __cu_len) && \
888 access_ok(VERIFY_WRITE, __cu_to, __cu_len))) \ 916 access_ok(VERIFY_WRITE, __cu_to, __cu_len))) { \
917 might_fault(); \
889 __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \ 918 __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \
890 __cu_len); \ 919 __cu_len); \
920 } \
891 __cu_len; \ 921 __cu_len; \
892}) 922})
893 923
@@ -907,7 +937,7 @@ __clear_user(void __user *addr, __kernel_size_t size)
907{ 937{
908 __kernel_size_t res; 938 __kernel_size_t res;
909 939
910 might_sleep(); 940 might_fault();
911 __asm__ __volatile__( 941 __asm__ __volatile__(
912 "move\t$4, %1\n\t" 942 "move\t$4, %1\n\t"
913 "move\t$5, $0\n\t" 943 "move\t$5, $0\n\t"
@@ -926,7 +956,7 @@ __clear_user(void __user *addr, __kernel_size_t size)
926 void __user * __cl_addr = (addr); \ 956 void __user * __cl_addr = (addr); \
927 unsigned long __cl_size = (n); \ 957 unsigned long __cl_size = (n); \
928 if (__cl_size && access_ok(VERIFY_WRITE, \ 958 if (__cl_size && access_ok(VERIFY_WRITE, \
929 ((unsigned long)(__cl_addr)), __cl_size)) \ 959 __cl_addr, __cl_size)) \
930 __cl_size = __clear_user(__cl_addr, __cl_size); \ 960 __cl_size = __clear_user(__cl_addr, __cl_size); \
931 __cl_size; \ 961 __cl_size; \
932}) 962})
@@ -956,7 +986,7 @@ __strncpy_from_user(char *__to, const char __user *__from, long __len)
956{ 986{
957 long res; 987 long res;
958 988
959 might_sleep(); 989 might_fault();
960 __asm__ __volatile__( 990 __asm__ __volatile__(
961 "move\t$4, %1\n\t" 991 "move\t$4, %1\n\t"
962 "move\t$5, %2\n\t" 992 "move\t$5, %2\n\t"
@@ -993,7 +1023,7 @@ strncpy_from_user(char *__to, const char __user *__from, long __len)
993{ 1023{
994 long res; 1024 long res;
995 1025
996 might_sleep(); 1026 might_fault();
997 __asm__ __volatile__( 1027 __asm__ __volatile__(
998 "move\t$4, %1\n\t" 1028 "move\t$4, %1\n\t"
999 "move\t$5, %2\n\t" 1029 "move\t$5, %2\n\t"
@@ -1012,7 +1042,7 @@ static inline long __strlen_user(const char __user *s)
1012{ 1042{
1013 long res; 1043 long res;
1014 1044
1015 might_sleep(); 1045 might_fault();
1016 __asm__ __volatile__( 1046 __asm__ __volatile__(
1017 "move\t$4, %1\n\t" 1047 "move\t$4, %1\n\t"
1018 __MODULE_JAL(__strlen_user_nocheck_asm) 1048 __MODULE_JAL(__strlen_user_nocheck_asm)
@@ -1042,7 +1072,7 @@ static inline long strlen_user(const char __user *s)
1042{ 1072{
1043 long res; 1073 long res;
1044 1074
1045 might_sleep(); 1075 might_fault();
1046 __asm__ __volatile__( 1076 __asm__ __volatile__(
1047 "move\t$4, %1\n\t" 1077 "move\t$4, %1\n\t"
1048 __MODULE_JAL(__strlen_user_asm) 1078 __MODULE_JAL(__strlen_user_asm)
@@ -1059,7 +1089,7 @@ static inline long __strnlen_user(const char __user *s, long n)
1059{ 1089{
1060 long res; 1090 long res;
1061 1091
1062 might_sleep(); 1092 might_fault();
1063 __asm__ __volatile__( 1093 __asm__ __volatile__(
1064 "move\t$4, %1\n\t" 1094 "move\t$4, %1\n\t"
1065 "move\t$5, %2\n\t" 1095 "move\t$5, %2\n\t"
@@ -1090,7 +1120,7 @@ static inline long strnlen_user(const char __user *s, long n)
1090{ 1120{
1091 long res; 1121 long res;
1092 1122
1093 might_sleep(); 1123 might_fault();
1094 __asm__ __volatile__( 1124 __asm__ __volatile__(
1095 "move\t$4, %1\n\t" 1125 "move\t$4, %1\n\t"
1096 "move\t$5, %2\n\t" 1126 "move\t$5, %2\n\t"
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-13 01:53:10 -0500