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-rw-r--r--arch/mips/include/asm/cevt-r4k.h46
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/gpio.h41
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/war.h6
-rw-r--r--arch/mips/include/asm/mach-ip22/ds1286.h18
-rw-r--r--arch/mips/include/asm/mach-ip28/ds1286.h4
-rw-r--r--arch/mips/include/asm/spinlock.h2
6 files changed, 70 insertions, 47 deletions
diff --git a/arch/mips/include/asm/cevt-r4k.h b/arch/mips/include/asm/cevt-r4k.h
new file mode 100644
index 000000000000..fa4328f9124f
--- /dev/null
+++ b/arch/mips/include/asm/cevt-r4k.h
@@ -0,0 +1,46 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2008 Kevin D. Kissell
7 */
8
9/*
10 * Definitions used for common event timer implementation
11 * for MIPS 4K-type processors and their MIPS MT variants.
12 * Avoids unsightly extern declarations in C files.
13 */
14#ifndef __ASM_CEVT_R4K_H
15#define __ASM_CEVT_R4K_H
16
17DECLARE_PER_CPU(struct clock_event_device, mips_clockevent_device);
18
19void mips_event_handler(struct clock_event_device *dev);
20int c0_compare_int_usable(void);
21void mips_set_clock_mode(enum clock_event_mode, struct clock_event_device *);
22irqreturn_t c0_compare_interrupt(int, void *);
23
24extern struct irqaction c0_compare_irqaction;
25extern int cp0_timer_irq_installed;
26
27/*
28 * Possibly handle a performance counter interrupt.
29 * Return true if the timer interrupt should not be checked
30 */
31
32static inline int handle_perf_irq(int r2)
33{
34 /*
35 * The performance counter overflow interrupt may be shared with the
36 * timer interrupt (cp0_perfcount_irq < 0). If it is and a
37 * performance counter has overflowed (perf_irq() == IRQ_HANDLED)
38 * and we can't reliably determine if a counter interrupt has also
39 * happened (!r2) then don't check for a timer interrupt.
40 */
41 return (cp0_perfcount_irq < 0) &&
42 perf_irq() == IRQ_HANDLED &&
43 !r2;
44}
45
46#endif /* __ASM_CEVT_R4K_H */
diff --git a/arch/mips/include/asm/mach-bcm47xx/gpio.h b/arch/mips/include/asm/mach-bcm47xx/gpio.h
index cfc8f4d618ce..d8ff4cd89ab5 100644
--- a/arch/mips/include/asm/mach-bcm47xx/gpio.h
+++ b/arch/mips/include/asm/mach-bcm47xx/gpio.h
@@ -9,47 +9,46 @@
9#ifndef __BCM47XX_GPIO_H 9#ifndef __BCM47XX_GPIO_H
10#define __BCM47XX_GPIO_H 10#define __BCM47XX_GPIO_H
11 11
12#include <linux/ssb/ssb_embedded.h>
13#include <asm/mach-bcm47xx/bcm47xx.h>
14
12#define BCM47XX_EXTIF_GPIO_LINES 5 15#define BCM47XX_EXTIF_GPIO_LINES 5
13#define BCM47XX_CHIPCO_GPIO_LINES 16 16#define BCM47XX_CHIPCO_GPIO_LINES 16
14 17
15extern int bcm47xx_gpio_to_irq(unsigned gpio); 18extern int gpio_request(unsigned gpio, const char *label);
16extern int bcm47xx_gpio_get_value(unsigned gpio); 19extern void gpio_free(unsigned gpio);
17extern void bcm47xx_gpio_set_value(unsigned gpio, int value); 20extern int gpio_to_irq(unsigned gpio);
18extern int bcm47xx_gpio_direction_input(unsigned gpio);
19extern int bcm47xx_gpio_direction_output(unsigned gpio, int value);
20
21static inline int gpio_request(unsigned gpio, const char *label)
22{
23 return 0;
24}
25 21
26static inline void gpio_free(unsigned gpio) 22static inline int gpio_get_value(unsigned gpio)
27{ 23{
24 return ssb_gpio_in(&ssb_bcm47xx, 1 << gpio);
28} 25}
29 26
30static inline int gpio_to_irq(unsigned gpio) 27static inline void gpio_set_value(unsigned gpio, int value)
31{ 28{
32 return bcm47xx_gpio_to_irq(gpio); 29 ssb_gpio_out(&ssb_bcm47xx, 1 << gpio, value ? 1 << gpio : 0);
33} 30}
34 31
35static inline int gpio_get_value(unsigned gpio) 32static inline int gpio_direction_input(unsigned gpio)
36{ 33{
37 return bcm47xx_gpio_get_value(gpio); 34 return ssb_gpio_outen(&ssb_bcm47xx, 1 << gpio, 0);
38} 35}
39 36
40static inline void gpio_set_value(unsigned gpio, int value) 37static inline int gpio_direction_output(unsigned gpio, int value)
41{ 38{
42 bcm47xx_gpio_set_value(gpio, value); 39 return ssb_gpio_outen(&ssb_bcm47xx, 1 << gpio, 1 << gpio);
43} 40}
44 41
45static inline int gpio_direction_input(unsigned gpio) 42static int gpio_intmask(unsigned gpio, int value)
46{ 43{
47 return bcm47xx_gpio_direction_input(gpio); 44 return ssb_gpio_intmask(&ssb_bcm47xx, 1 << gpio,
45 value ? 1 << gpio : 0);
48} 46}
49 47
50static inline int gpio_direction_output(unsigned gpio, int value) 48static int gpio_polarity(unsigned gpio, int value)
51{ 49{
52 return bcm47xx_gpio_direction_output(gpio, value); 50 return ssb_gpio_polarity(&ssb_bcm47xx, 1 << gpio,
51 value ? 1 << gpio : 0);
53} 52}
54 53
55 54
diff --git a/arch/mips/include/asm/mach-bcm47xx/war.h b/arch/mips/include/asm/mach-bcm47xx/war.h
index 4a2b7986b582..87cd4651dda3 100644
--- a/arch/mips/include/asm/mach-bcm47xx/war.h
+++ b/arch/mips/include/asm/mach-bcm47xx/war.h
@@ -5,8 +5,8 @@
5 * 5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> 6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */ 7 */
8#ifndef __ASM_MIPS_MACH_BCM947XX_WAR_H 8#ifndef __ASM_MIPS_MACH_BCM47XX_WAR_H
9#define __ASM_MIPS_MACH_BCM947XX_WAR_H 9#define __ASM_MIPS_MACH_BCM47XX_WAR_H
10 10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0 11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0 12#define R4600_V1_HIT_CACHEOP_WAR 0
@@ -22,4 +22,4 @@
22#define R10000_LLSC_WAR 0 22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0 23#define MIPS34K_MISSED_ITLB_WAR 0
24 24
25#endif /* __ASM_MIPS_MACH_BCM947XX_WAR_H */ 25#endif /* __ASM_MIPS_MACH_BCM47XX_WAR_H */
diff --git a/arch/mips/include/asm/mach-ip22/ds1286.h b/arch/mips/include/asm/mach-ip22/ds1286.h
deleted file mode 100644
index f19f1eafbc71..000000000000
--- a/arch/mips/include/asm/mach-ip22/ds1286.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1998, 2001, 03 by Ralf Baechle
7 *
8 * RTC routines for PC style attached Dallas chip.
9 */
10#ifndef __ASM_MACH_IP22_DS1286_H
11#define __ASM_MACH_IP22_DS1286_H
12
13#include <asm/sgi/hpc3.h>
14
15#define rtc_read(reg) (hpc3c0->rtcregs[(reg)] & 0xff)
16#define rtc_write(data, reg) do { hpc3c0->rtcregs[(reg)] = (data); } while(0)
17
18#endif /* __ASM_MACH_IP22_DS1286_H */
diff --git a/arch/mips/include/asm/mach-ip28/ds1286.h b/arch/mips/include/asm/mach-ip28/ds1286.h
deleted file mode 100644
index 471bb9a33e0f..000000000000
--- a/arch/mips/include/asm/mach-ip28/ds1286.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef __ASM_MACH_IP28_DS1286_H
2#define __ASM_MACH_IP28_DS1286_H
3#include <asm/mach-ip22/ds1286.h>
4#endif /* __ASM_MACH_IP28_DS1286_H */
diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h
index 5d98a3cb85b7..1a1f320c30d8 100644
--- a/arch/mips/include/asm/spinlock.h
+++ b/arch/mips/include/asm/spinlock.h
@@ -147,7 +147,7 @@ static inline void __raw_spin_unlock(raw_spinlock_t *lock)
147 " ori %[ticket], %[ticket], 0x2000 \n" 147 " ori %[ticket], %[ticket], 0x2000 \n"
148 " xori %[ticket], %[ticket], 0x2000 \n" 148 " xori %[ticket], %[ticket], 0x2000 \n"
149 " sc %[ticket], %[ticket_ptr] \n" 149 " sc %[ticket], %[ticket_ptr] \n"
150 " beqzl %[ticket], 2f \n" 150 " beqzl %[ticket], 1b \n"
151 : [ticket_ptr] "+m" (lock->lock), 151 : [ticket_ptr] "+m" (lock->lock),
152 [ticket] "=&r" (tmp)); 152 [ticket] "=&r" (tmp));
153 } else { 153 } else {