diff options
Diffstat (limited to 'arch/mips/include/asm/spinlock.h')
-rw-r--r-- | arch/mips/include/asm/spinlock.h | 50 |
1 files changed, 26 insertions, 24 deletions
diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h index 78d201fb6c87..c6d06d383ef9 100644 --- a/arch/mips/include/asm/spinlock.h +++ b/arch/mips/include/asm/spinlock.h | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/compiler.h> | 12 | #include <linux/compiler.h> |
13 | 13 | ||
14 | #include <asm/barrier.h> | 14 | #include <asm/barrier.h> |
15 | #include <asm/compiler.h> | ||
15 | #include <asm/war.h> | 16 | #include <asm/war.h> |
16 | 17 | ||
17 | /* | 18 | /* |
@@ -88,7 +89,7 @@ static inline void arch_spin_lock(arch_spinlock_t *lock) | |||
88 | " subu %[ticket], %[ticket], 1 \n" | 89 | " subu %[ticket], %[ticket], 1 \n" |
89 | " .previous \n" | 90 | " .previous \n" |
90 | " .set pop \n" | 91 | " .set pop \n" |
91 | : [ticket_ptr] "+m" (lock->lock), | 92 | : [ticket_ptr] "+" GCC_OFF12_ASM() (lock->lock), |
92 | [serving_now_ptr] "+m" (lock->h.serving_now), | 93 | [serving_now_ptr] "+m" (lock->h.serving_now), |
93 | [ticket] "=&r" (tmp), | 94 | [ticket] "=&r" (tmp), |
94 | [my_ticket] "=&r" (my_ticket) | 95 | [my_ticket] "=&r" (my_ticket) |
@@ -121,7 +122,7 @@ static inline void arch_spin_lock(arch_spinlock_t *lock) | |||
121 | " subu %[ticket], %[ticket], 1 \n" | 122 | " subu %[ticket], %[ticket], 1 \n" |
122 | " .previous \n" | 123 | " .previous \n" |
123 | " .set pop \n" | 124 | " .set pop \n" |
124 | : [ticket_ptr] "+m" (lock->lock), | 125 | : [ticket_ptr] "+" GCC_OFF12_ASM() (lock->lock), |
125 | [serving_now_ptr] "+m" (lock->h.serving_now), | 126 | [serving_now_ptr] "+m" (lock->h.serving_now), |
126 | [ticket] "=&r" (tmp), | 127 | [ticket] "=&r" (tmp), |
127 | [my_ticket] "=&r" (my_ticket) | 128 | [my_ticket] "=&r" (my_ticket) |
@@ -163,7 +164,7 @@ static inline unsigned int arch_spin_trylock(arch_spinlock_t *lock) | |||
163 | " li %[ticket], 0 \n" | 164 | " li %[ticket], 0 \n" |
164 | " .previous \n" | 165 | " .previous \n" |
165 | " .set pop \n" | 166 | " .set pop \n" |
166 | : [ticket_ptr] "+m" (lock->lock), | 167 | : [ticket_ptr] "+" GCC_OFF12_ASM() (lock->lock), |
167 | [ticket] "=&r" (tmp), | 168 | [ticket] "=&r" (tmp), |
168 | [my_ticket] "=&r" (tmp2), | 169 | [my_ticket] "=&r" (tmp2), |
169 | [now_serving] "=&r" (tmp3) | 170 | [now_serving] "=&r" (tmp3) |
@@ -187,7 +188,7 @@ static inline unsigned int arch_spin_trylock(arch_spinlock_t *lock) | |||
187 | " li %[ticket], 0 \n" | 188 | " li %[ticket], 0 \n" |
188 | " .previous \n" | 189 | " .previous \n" |
189 | " .set pop \n" | 190 | " .set pop \n" |
190 | : [ticket_ptr] "+m" (lock->lock), | 191 | : [ticket_ptr] "+" GCC_OFF12_ASM() (lock->lock), |
191 | [ticket] "=&r" (tmp), | 192 | [ticket] "=&r" (tmp), |
192 | [my_ticket] "=&r" (tmp2), | 193 | [my_ticket] "=&r" (tmp2), |
193 | [now_serving] "=&r" (tmp3) | 194 | [now_serving] "=&r" (tmp3) |
@@ -234,8 +235,8 @@ static inline void arch_read_lock(arch_rwlock_t *rw) | |||
234 | " beqzl %1, 1b \n" | 235 | " beqzl %1, 1b \n" |
235 | " nop \n" | 236 | " nop \n" |
236 | " .set reorder \n" | 237 | " .set reorder \n" |
237 | : "=m" (rw->lock), "=&r" (tmp) | 238 | : "=" GCC_OFF12_ASM() (rw->lock), "=&r" (tmp) |
238 | : "m" (rw->lock) | 239 | : GCC_OFF12_ASM() (rw->lock) |
239 | : "memory"); | 240 | : "memory"); |
240 | } else { | 241 | } else { |
241 | do { | 242 | do { |
@@ -244,8 +245,8 @@ static inline void arch_read_lock(arch_rwlock_t *rw) | |||
244 | " bltz %1, 1b \n" | 245 | " bltz %1, 1b \n" |
245 | " addu %1, 1 \n" | 246 | " addu %1, 1 \n" |
246 | "2: sc %1, %0 \n" | 247 | "2: sc %1, %0 \n" |
247 | : "=m" (rw->lock), "=&r" (tmp) | 248 | : "=" GCC_OFF12_ASM() (rw->lock), "=&r" (tmp) |
248 | : "m" (rw->lock) | 249 | : GCC_OFF12_ASM() (rw->lock) |
249 | : "memory"); | 250 | : "memory"); |
250 | } while (unlikely(!tmp)); | 251 | } while (unlikely(!tmp)); |
251 | } | 252 | } |
@@ -268,8 +269,8 @@ static inline void arch_read_unlock(arch_rwlock_t *rw) | |||
268 | " sub %1, 1 \n" | 269 | " sub %1, 1 \n" |
269 | " sc %1, %0 \n" | 270 | " sc %1, %0 \n" |
270 | " beqzl %1, 1b \n" | 271 | " beqzl %1, 1b \n" |
271 | : "=m" (rw->lock), "=&r" (tmp) | 272 | : "=" GCC_OFF12_ASM() (rw->lock), "=&r" (tmp) |
272 | : "m" (rw->lock) | 273 | : GCC_OFF12_ASM() (rw->lock) |
273 | : "memory"); | 274 | : "memory"); |
274 | } else { | 275 | } else { |
275 | do { | 276 | do { |
@@ -277,8 +278,8 @@ static inline void arch_read_unlock(arch_rwlock_t *rw) | |||
277 | "1: ll %1, %2 # arch_read_unlock \n" | 278 | "1: ll %1, %2 # arch_read_unlock \n" |
278 | " sub %1, 1 \n" | 279 | " sub %1, 1 \n" |
279 | " sc %1, %0 \n" | 280 | " sc %1, %0 \n" |
280 | : "=m" (rw->lock), "=&r" (tmp) | 281 | : "=" GCC_OFF12_ASM() (rw->lock), "=&r" (tmp) |
281 | : "m" (rw->lock) | 282 | : GCC_OFF12_ASM() (rw->lock) |
282 | : "memory"); | 283 | : "memory"); |
283 | } while (unlikely(!tmp)); | 284 | } while (unlikely(!tmp)); |
284 | } | 285 | } |
@@ -298,8 +299,8 @@ static inline void arch_write_lock(arch_rwlock_t *rw) | |||
298 | " beqzl %1, 1b \n" | 299 | " beqzl %1, 1b \n" |
299 | " nop \n" | 300 | " nop \n" |
300 | " .set reorder \n" | 301 | " .set reorder \n" |
301 | : "=m" (rw->lock), "=&r" (tmp) | 302 | : "=" GCC_OFF12_ASM() (rw->lock), "=&r" (tmp) |
302 | : "m" (rw->lock) | 303 | : GCC_OFF12_ASM() (rw->lock) |
303 | : "memory"); | 304 | : "memory"); |
304 | } else { | 305 | } else { |
305 | do { | 306 | do { |
@@ -308,8 +309,8 @@ static inline void arch_write_lock(arch_rwlock_t *rw) | |||
308 | " bnez %1, 1b \n" | 309 | " bnez %1, 1b \n" |
309 | " lui %1, 0x8000 \n" | 310 | " lui %1, 0x8000 \n" |
310 | "2: sc %1, %0 \n" | 311 | "2: sc %1, %0 \n" |
311 | : "=m" (rw->lock), "=&r" (tmp) | 312 | : "=" GCC_OFF12_ASM() (rw->lock), "=&r" (tmp) |
312 | : "m" (rw->lock) | 313 | : GCC_OFF12_ASM() (rw->lock) |
313 | : "memory"); | 314 | : "memory"); |
314 | } while (unlikely(!tmp)); | 315 | } while (unlikely(!tmp)); |
315 | } | 316 | } |
@@ -348,8 +349,8 @@ static inline int arch_read_trylock(arch_rwlock_t *rw) | |||
348 | __WEAK_LLSC_MB | 349 | __WEAK_LLSC_MB |
349 | " li %2, 1 \n" | 350 | " li %2, 1 \n" |
350 | "2: \n" | 351 | "2: \n" |
351 | : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret) | 352 | : "=" GCC_OFF12_ASM() (rw->lock), "=&r" (tmp), "=&r" (ret) |
352 | : "m" (rw->lock) | 353 | : GCC_OFF12_ASM() (rw->lock) |
353 | : "memory"); | 354 | : "memory"); |
354 | } else { | 355 | } else { |
355 | __asm__ __volatile__( | 356 | __asm__ __volatile__( |
@@ -365,8 +366,8 @@ static inline int arch_read_trylock(arch_rwlock_t *rw) | |||
365 | __WEAK_LLSC_MB | 366 | __WEAK_LLSC_MB |
366 | " li %2, 1 \n" | 367 | " li %2, 1 \n" |
367 | "2: \n" | 368 | "2: \n" |
368 | : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret) | 369 | : "=" GCC_OFF12_ASM() (rw->lock), "=&r" (tmp), "=&r" (ret) |
369 | : "m" (rw->lock) | 370 | : GCC_OFF12_ASM() (rw->lock) |
370 | : "memory"); | 371 | : "memory"); |
371 | } | 372 | } |
372 | 373 | ||
@@ -392,8 +393,8 @@ static inline int arch_write_trylock(arch_rwlock_t *rw) | |||
392 | " li %2, 1 \n" | 393 | " li %2, 1 \n" |
393 | " .set reorder \n" | 394 | " .set reorder \n" |
394 | "2: \n" | 395 | "2: \n" |
395 | : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret) | 396 | : "=" GCC_OFF12_ASM() (rw->lock), "=&r" (tmp), "=&r" (ret) |
396 | : "m" (rw->lock) | 397 | : GCC_OFF12_ASM() (rw->lock) |
397 | : "memory"); | 398 | : "memory"); |
398 | } else { | 399 | } else { |
399 | do { | 400 | do { |
@@ -405,8 +406,9 @@ static inline int arch_write_trylock(arch_rwlock_t *rw) | |||
405 | " sc %1, %0 \n" | 406 | " sc %1, %0 \n" |
406 | " li %2, 1 \n" | 407 | " li %2, 1 \n" |
407 | "2: \n" | 408 | "2: \n" |
408 | : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret) | 409 | : "=" GCC_OFF12_ASM() (rw->lock), "=&r" (tmp), |
409 | : "m" (rw->lock) | 410 | "=&r" (ret) |
411 | : GCC_OFF12_ASM() (rw->lock) | ||
410 | : "memory"); | 412 | : "memory"); |
411 | } while (unlikely(!tmp)); | 413 | } while (unlikely(!tmp)); |
412 | 414 | ||