diff options
Diffstat (limited to 'arch/mips/include/asm/sibyte/swarm.h')
-rw-r--r-- | arch/mips/include/asm/sibyte/swarm.h | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/arch/mips/include/asm/sibyte/swarm.h b/arch/mips/include/asm/sibyte/swarm.h index 114d9d29ca9d..187cfb1f67cb 100644 --- a/arch/mips/include/asm/sibyte/swarm.h +++ b/arch/mips/include/asm/sibyte/swarm.h | |||
@@ -24,41 +24,41 @@ | |||
24 | #ifdef CONFIG_SIBYTE_SWARM | 24 | #ifdef CONFIG_SIBYTE_SWARM |
25 | #define SIBYTE_BOARD_NAME "BCM91250A (SWARM)" | 25 | #define SIBYTE_BOARD_NAME "BCM91250A (SWARM)" |
26 | #define SIBYTE_HAVE_PCMCIA 1 | 26 | #define SIBYTE_HAVE_PCMCIA 1 |
27 | #define SIBYTE_HAVE_IDE 1 | 27 | #define SIBYTE_HAVE_IDE 1 |
28 | #endif | 28 | #endif |
29 | #ifdef CONFIG_SIBYTE_LITTLESUR | 29 | #ifdef CONFIG_SIBYTE_LITTLESUR |
30 | #define SIBYTE_BOARD_NAME "BCM91250C2 (LittleSur)" | 30 | #define SIBYTE_BOARD_NAME "BCM91250C2 (LittleSur)" |
31 | #define SIBYTE_HAVE_PCMCIA 0 | 31 | #define SIBYTE_HAVE_PCMCIA 0 |
32 | #define SIBYTE_HAVE_IDE 1 | 32 | #define SIBYTE_HAVE_IDE 1 |
33 | #define SIBYTE_DEFAULT_CONSOLE "cfe0" | 33 | #define SIBYTE_DEFAULT_CONSOLE "cfe0" |
34 | #endif | 34 | #endif |
35 | #ifdef CONFIG_SIBYTE_CRHONE | 35 | #ifdef CONFIG_SIBYTE_CRHONE |
36 | #define SIBYTE_BOARD_NAME "BCM91125C (CRhone)" | 36 | #define SIBYTE_BOARD_NAME "BCM91125C (CRhone)" |
37 | #define SIBYTE_HAVE_PCMCIA 0 | 37 | #define SIBYTE_HAVE_PCMCIA 0 |
38 | #define SIBYTE_HAVE_IDE 0 | 38 | #define SIBYTE_HAVE_IDE 0 |
39 | #endif | 39 | #endif |
40 | #ifdef CONFIG_SIBYTE_CRHINE | 40 | #ifdef CONFIG_SIBYTE_CRHINE |
41 | #define SIBYTE_BOARD_NAME "BCM91120C (CRhine)" | 41 | #define SIBYTE_BOARD_NAME "BCM91120C (CRhine)" |
42 | #define SIBYTE_HAVE_PCMCIA 0 | 42 | #define SIBYTE_HAVE_PCMCIA 0 |
43 | #define SIBYTE_HAVE_IDE 0 | 43 | #define SIBYTE_HAVE_IDE 0 |
44 | #endif | 44 | #endif |
45 | 45 | ||
46 | /* Generic bus chip selects */ | 46 | /* Generic bus chip selects */ |
47 | #define LEDS_CS 3 | 47 | #define LEDS_CS 3 |
48 | #define LEDS_PHYS 0x100a0000 | 48 | #define LEDS_PHYS 0x100a0000 |
49 | 49 | ||
50 | #ifdef SIBYTE_HAVE_IDE | 50 | #ifdef SIBYTE_HAVE_IDE |
51 | #define IDE_CS 4 | 51 | #define IDE_CS 4 |
52 | #define IDE_PHYS 0x100b0000 | 52 | #define IDE_PHYS 0x100b0000 |
53 | #define K_GPIO_GB_IDE 4 | 53 | #define K_GPIO_GB_IDE 4 |
54 | #define K_INT_GB_IDE (K_INT_GPIO_0 + K_GPIO_GB_IDE) | 54 | #define K_INT_GB_IDE (K_INT_GPIO_0 + K_GPIO_GB_IDE) |
55 | #endif | 55 | #endif |
56 | 56 | ||
57 | #ifdef SIBYTE_HAVE_PCMCIA | 57 | #ifdef SIBYTE_HAVE_PCMCIA |
58 | #define PCMCIA_CS 6 | 58 | #define PCMCIA_CS 6 |
59 | #define PCMCIA_PHYS 0x11000000 | 59 | #define PCMCIA_PHYS 0x11000000 |
60 | #define K_GPIO_PC_READY 9 | 60 | #define K_GPIO_PC_READY 9 |
61 | #define K_INT_PC_READY (K_INT_GPIO_0 + K_GPIO_PC_READY) | 61 | #define K_INT_PC_READY (K_INT_GPIO_0 + K_GPIO_PC_READY) |
62 | #endif | 62 | #endif |
63 | 63 | ||
64 | #endif /* __ASM_SIBYTE_SWARM_H */ | 64 | #endif /* __ASM_SIBYTE_SWARM_H */ |