aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/include/asm/r4kcache.h
diff options
context:
space:
mode:
Diffstat (limited to 'arch/mips/include/asm/r4kcache.h')
-rw-r--r--arch/mips/include/asm/r4kcache.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h
index 54ea47da59a1..a0b2650516ac 100644
--- a/arch/mips/include/asm/r4kcache.h
+++ b/arch/mips/include/asm/r4kcache.h
@@ -22,10 +22,10 @@
22 * for indexed cache operations. Two issues here: 22 * for indexed cache operations. Two issues here:
23 * 23 *
24 * - The MIPS32 and MIPS64 specs permit an implementation to directly derive 24 * - The MIPS32 and MIPS64 specs permit an implementation to directly derive
25 * the index bits from the virtual address. This breaks with tradition 25 * the index bits from the virtual address. This breaks with tradition
26 * set by the R4000. To keep unpleasant surprises from happening we pick 26 * set by the R4000. To keep unpleasant surprises from happening we pick
27 * an address in KSEG0 / CKSEG0. 27 * an address in KSEG0 / CKSEG0.
28 * - We need a properly sign extended address for 64-bit code. To get away 28 * - We need a properly sign extended address for 64-bit code. To get away
29 * without ifdefs we let the compiler do it by a type cast. 29 * without ifdefs we let the compiler do it by a type cast.
30 */ 30 */
31#define INDEX_BASE CKSEG0 31#define INDEX_BASE CKSEG0
@@ -347,7 +347,7 @@ static inline void blast_##pfx##cache##lsize(void) \
347 unsigned long end = start + current_cpu_data.desc.waysize; \ 347 unsigned long end = start + current_cpu_data.desc.waysize; \
348 unsigned long ws_inc = 1UL << current_cpu_data.desc.waybit; \ 348 unsigned long ws_inc = 1UL << current_cpu_data.desc.waybit; \
349 unsigned long ws_end = current_cpu_data.desc.ways << \ 349 unsigned long ws_end = current_cpu_data.desc.ways << \
350 current_cpu_data.desc.waybit; \ 350 current_cpu_data.desc.waybit; \
351 unsigned long ws, addr; \ 351 unsigned long ws, addr; \
352 \ 352 \
353 __##pfx##flush_prologue \ 353 __##pfx##flush_prologue \
@@ -359,7 +359,7 @@ static inline void blast_##pfx##cache##lsize(void) \
359 __##pfx##flush_epilogue \ 359 __##pfx##flush_epilogue \
360} \ 360} \
361 \ 361 \
362static inline void blast_##pfx##cache##lsize##_page(unsigned long page) \ 362static inline void blast_##pfx##cache##lsize##_page(unsigned long page) \
363{ \ 363{ \
364 unsigned long start = page; \ 364 unsigned long start = page; \
365 unsigned long end = page + PAGE_SIZE; \ 365 unsigned long end = page + PAGE_SIZE; \
@@ -381,7 +381,7 @@ static inline void blast_##pfx##cache##lsize##_page_indexed(unsigned long page)
381 unsigned long end = start + PAGE_SIZE; \ 381 unsigned long end = start + PAGE_SIZE; \
382 unsigned long ws_inc = 1UL << current_cpu_data.desc.waybit; \ 382 unsigned long ws_inc = 1UL << current_cpu_data.desc.waybit; \
383 unsigned long ws_end = current_cpu_data.desc.ways << \ 383 unsigned long ws_end = current_cpu_data.desc.ways << \
384 current_cpu_data.desc.waybit; \ 384 current_cpu_data.desc.waybit; \
385 unsigned long ws, addr; \ 385 unsigned long ws, addr; \
386 \ 386 \
387 __##pfx##flush_prologue \ 387 __##pfx##flush_prologue \