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1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003 by Ralf Baechle
7 */
8#ifndef __ASM_PREFETCH_H
9#define __ASM_PREFETCH_H
10
11
12/*
13 * R5000 and RM5200 implements pref and prefx instructions but they're nops, so
14 * rather than wasting time we pretend these processors don't support
15 * prefetching at all.
16 *
17 * R5432 implements Load, Store, LoadStreamed, StoreStreamed, LoadRetained,
18 * StoreRetained and WriteBackInvalidate but not Pref_PrepareForStore.
19 *
20 * Hell (and the book on my shelf I can't open ...) know what the R8000 does.
21 *
22 * RM7000 version 1.0 interprets all hints as Pref_Load; version 2.0 implements
23 * Pref_PrepareForStore also.
24 *
25 * RM9000 is MIPS IV but implements prefetching like MIPS32/MIPS64; it's
26 * Pref_WriteBackInvalidate is a nop and Pref_PrepareForStore is broken in
27 * current versions due to erratum G105.
28 *
29 * VR7701 only implements the Load prefetch.
30 *
31 * Finally MIPS32 and MIPS64 implement all of the following hints.
32 */
33
34#define Pref_Load 0
35#define Pref_Store 1
36 /* 2 and 3 are reserved */
37#define Pref_LoadStreamed 4
38#define Pref_StoreStreamed 5
39#define Pref_LoadRetained 6
40#define Pref_StoreRetained 7
41 /* 8 ... 24 are reserved */
42#define Pref_WriteBackInvalidate 25
43#define Pref_PrepareForStore 30
44
45#ifdef __ASSEMBLY__
46
47 .macro __pref hint addr
48#ifdef CONFIG_CPU_HAS_PREFETCH
49 pref \hint, \addr
50#endif
51 .endm
52
53 .macro pref_load addr
54 __pref Pref_Load, \addr
55 .endm
56
57 .macro pref_store addr
58 __pref Pref_Store, \addr
59 .endm
60
61 .macro pref_load_streamed addr
62 __pref Pref_LoadStreamed, \addr
63 .endm
64
65 .macro pref_store_streamed addr
66 __pref Pref_StoreStreamed, \addr
67 .endm
68
69 .macro pref_load_retained addr
70 __pref Pref_LoadRetained, \addr
71 .endm
72
73 .macro pref_store_retained addr
74 __pref Pref_StoreRetained, \addr
75 .endm
76
77 .macro pref_wback_inv addr
78 __pref Pref_WriteBackInvalidate, \addr
79 .endm
80
81 .macro pref_prepare_for_store addr
82 __pref Pref_PrepareForStore, \addr
83 .endm
84
85#endif
86
87#endif /* __ASM_PREFETCH_H */