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-rw-r--r--arch/mips/include/asm/pgtable-32.h18
1 files changed, 1 insertions, 17 deletions
diff --git a/arch/mips/include/asm/pgtable-32.h b/arch/mips/include/asm/pgtable-32.h
index 8a153d2fa62a..5d56bb230345 100644
--- a/arch/mips/include/asm/pgtable-32.h
+++ b/arch/mips/include/asm/pgtable-32.h
@@ -19,23 +19,7 @@
19#include <asm-generic/pgtable-nopmd.h> 19#include <asm-generic/pgtable-nopmd.h>
20 20
21/* 21/*
22 * - add_wired_entry() add a fixed TLB entry, and move wired register 22 * Basically we have the same two-level (which is the logical three level
23 */
24extern void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
25 unsigned long entryhi, unsigned long pagemask);
26
27/*
28 * - add_temporary_entry() add a temporary TLB entry. We use TLB entries
29 * starting at the top and working down. This is for populating the
30 * TLB before trap_init() puts the TLB miss handler in place. It
31 * should be used only for entries matching the actual page tables,
32 * to prevent inconsistencies.
33 */
34extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
35 unsigned long entryhi, unsigned long pagemask);
36
37
38/* Basically we have the same two-level (which is the logical three level
39 * Linux page table layout folded) page tables as the i386. Some day 23 * Linux page table layout folded) page tables as the i386. Some day
40 * when we have proper page coloring support we can have a 1% quicker 24 * when we have proper page coloring support we can have a 1% quicker
41 * tlb refill handling mechanism, but for now it is a bit slower but 25 * tlb refill handling mechanism, but for now it is a bit slower but