diff options
Diffstat (limited to 'arch/mips/include/asm/octeon/cvmx-pciercx-defs.h')
-rw-r--r-- | arch/mips/include/asm/octeon/cvmx-pciercx-defs.h | 1288 |
1 files changed, 1245 insertions, 43 deletions
diff --git a/arch/mips/include/asm/octeon/cvmx-pciercx-defs.h b/arch/mips/include/asm/octeon/cvmx-pciercx-defs.h index 7b1dc8b74e5b..4bce393391e2 100644 --- a/arch/mips/include/asm/octeon/cvmx-pciercx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-pciercx-defs.h | |||
@@ -4,7 +4,7 @@ | |||
4 | * Contact: support@caviumnetworks.com | 4 | * Contact: support@caviumnetworks.com |
5 | * This file is part of the OCTEON SDK | 5 | * This file is part of the OCTEON SDK |
6 | * | 6 | * |
7 | * Copyright (c) 2003-2011 Cavium Networks | 7 | * Copyright (c) 2003-2012 Cavium Networks |
8 | * | 8 | * |
9 | * This file is free software; you can redistribute it and/or modify | 9 | * This file is free software; you can redistribute it and/or modify |
10 | * it under the terms of the GNU General Public License, Version 2, as | 10 | * it under the terms of the GNU General Public License, Version 2, as |
@@ -109,8 +109,13 @@ | |||
109 | union cvmx_pciercx_cfg000 { | 109 | union cvmx_pciercx_cfg000 { |
110 | uint32_t u32; | 110 | uint32_t u32; |
111 | struct cvmx_pciercx_cfg000_s { | 111 | struct cvmx_pciercx_cfg000_s { |
112 | #ifdef __BIG_ENDIAN_BITFIELD | ||
112 | uint32_t devid:16; | 113 | uint32_t devid:16; |
113 | uint32_t vendid:16; | 114 | uint32_t vendid:16; |
115 | #else | ||
116 | uint32_t vendid:16; | ||
117 | uint32_t devid:16; | ||
118 | #endif | ||
114 | } s; | 119 | } s; |
115 | struct cvmx_pciercx_cfg000_s cn52xx; | 120 | struct cvmx_pciercx_cfg000_s cn52xx; |
116 | struct cvmx_pciercx_cfg000_s cn52xxp1; | 121 | struct cvmx_pciercx_cfg000_s cn52xxp1; |
@@ -122,11 +127,13 @@ union cvmx_pciercx_cfg000 { | |||
122 | struct cvmx_pciercx_cfg000_s cn66xx; | 127 | struct cvmx_pciercx_cfg000_s cn66xx; |
123 | struct cvmx_pciercx_cfg000_s cn68xx; | 128 | struct cvmx_pciercx_cfg000_s cn68xx; |
124 | struct cvmx_pciercx_cfg000_s cn68xxp1; | 129 | struct cvmx_pciercx_cfg000_s cn68xxp1; |
130 | struct cvmx_pciercx_cfg000_s cnf71xx; | ||
125 | }; | 131 | }; |
126 | 132 | ||
127 | union cvmx_pciercx_cfg001 { | 133 | union cvmx_pciercx_cfg001 { |
128 | uint32_t u32; | 134 | uint32_t u32; |
129 | struct cvmx_pciercx_cfg001_s { | 135 | struct cvmx_pciercx_cfg001_s { |
136 | #ifdef __BIG_ENDIAN_BITFIELD | ||
130 | uint32_t dpe:1; | 137 | uint32_t dpe:1; |
131 | uint32_t sse:1; | 138 | uint32_t sse:1; |
132 | uint32_t rma:1; | 139 | uint32_t rma:1; |
@@ -151,6 +158,32 @@ union cvmx_pciercx_cfg001 { | |||
151 | uint32_t me:1; | 158 | uint32_t me:1; |
152 | uint32_t msae:1; | 159 | uint32_t msae:1; |
153 | uint32_t isae:1; | 160 | uint32_t isae:1; |
161 | #else | ||
162 | uint32_t isae:1; | ||
163 | uint32_t msae:1; | ||
164 | uint32_t me:1; | ||
165 | uint32_t scse:1; | ||
166 | uint32_t mwice:1; | ||
167 | uint32_t vps:1; | ||
168 | uint32_t per:1; | ||
169 | uint32_t ids_wcc:1; | ||
170 | uint32_t see:1; | ||
171 | uint32_t fbbe:1; | ||
172 | uint32_t i_dis:1; | ||
173 | uint32_t reserved_11_18:8; | ||
174 | uint32_t i_stat:1; | ||
175 | uint32_t cl:1; | ||
176 | uint32_t m66:1; | ||
177 | uint32_t reserved_22_22:1; | ||
178 | uint32_t fbb:1; | ||
179 | uint32_t mdpe:1; | ||
180 | uint32_t devt:2; | ||
181 | uint32_t sta:1; | ||
182 | uint32_t rta:1; | ||
183 | uint32_t rma:1; | ||
184 | uint32_t sse:1; | ||
185 | uint32_t dpe:1; | ||
186 | #endif | ||
154 | } s; | 187 | } s; |
155 | struct cvmx_pciercx_cfg001_s cn52xx; | 188 | struct cvmx_pciercx_cfg001_s cn52xx; |
156 | struct cvmx_pciercx_cfg001_s cn52xxp1; | 189 | struct cvmx_pciercx_cfg001_s cn52xxp1; |
@@ -162,15 +195,23 @@ union cvmx_pciercx_cfg001 { | |||
162 | struct cvmx_pciercx_cfg001_s cn66xx; | 195 | struct cvmx_pciercx_cfg001_s cn66xx; |
163 | struct cvmx_pciercx_cfg001_s cn68xx; | 196 | struct cvmx_pciercx_cfg001_s cn68xx; |
164 | struct cvmx_pciercx_cfg001_s cn68xxp1; | 197 | struct cvmx_pciercx_cfg001_s cn68xxp1; |
198 | struct cvmx_pciercx_cfg001_s cnf71xx; | ||
165 | }; | 199 | }; |
166 | 200 | ||
167 | union cvmx_pciercx_cfg002 { | 201 | union cvmx_pciercx_cfg002 { |
168 | uint32_t u32; | 202 | uint32_t u32; |
169 | struct cvmx_pciercx_cfg002_s { | 203 | struct cvmx_pciercx_cfg002_s { |
204 | #ifdef __BIG_ENDIAN_BITFIELD | ||
170 | uint32_t bcc:8; | 205 | uint32_t bcc:8; |
171 | uint32_t sc:8; | 206 | uint32_t sc:8; |
172 | uint32_t pi:8; | 207 | uint32_t pi:8; |
173 | uint32_t rid:8; | 208 | uint32_t rid:8; |
209 | #else | ||
210 | uint32_t rid:8; | ||
211 | uint32_t pi:8; | ||
212 | uint32_t sc:8; | ||
213 | uint32_t bcc:8; | ||
214 | #endif | ||
174 | } s; | 215 | } s; |
175 | struct cvmx_pciercx_cfg002_s cn52xx; | 216 | struct cvmx_pciercx_cfg002_s cn52xx; |
176 | struct cvmx_pciercx_cfg002_s cn52xxp1; | 217 | struct cvmx_pciercx_cfg002_s cn52xxp1; |
@@ -182,16 +223,25 @@ union cvmx_pciercx_cfg002 { | |||
182 | struct cvmx_pciercx_cfg002_s cn66xx; | 223 | struct cvmx_pciercx_cfg002_s cn66xx; |
183 | struct cvmx_pciercx_cfg002_s cn68xx; | 224 | struct cvmx_pciercx_cfg002_s cn68xx; |
184 | struct cvmx_pciercx_cfg002_s cn68xxp1; | 225 | struct cvmx_pciercx_cfg002_s cn68xxp1; |
226 | struct cvmx_pciercx_cfg002_s cnf71xx; | ||
185 | }; | 227 | }; |
186 | 228 | ||
187 | union cvmx_pciercx_cfg003 { | 229 | union cvmx_pciercx_cfg003 { |
188 | uint32_t u32; | 230 | uint32_t u32; |
189 | struct cvmx_pciercx_cfg003_s { | 231 | struct cvmx_pciercx_cfg003_s { |
232 | #ifdef __BIG_ENDIAN_BITFIELD | ||
190 | uint32_t bist:8; | 233 | uint32_t bist:8; |
191 | uint32_t mfd:1; | 234 | uint32_t mfd:1; |
192 | uint32_t chf:7; | 235 | uint32_t chf:7; |
193 | uint32_t lt:8; | 236 | uint32_t lt:8; |
194 | uint32_t cls:8; | 237 | uint32_t cls:8; |
238 | #else | ||
239 | uint32_t cls:8; | ||
240 | uint32_t lt:8; | ||
241 | uint32_t chf:7; | ||
242 | uint32_t mfd:1; | ||
243 | uint32_t bist:8; | ||
244 | #endif | ||
195 | } s; | 245 | } s; |
196 | struct cvmx_pciercx_cfg003_s cn52xx; | 246 | struct cvmx_pciercx_cfg003_s cn52xx; |
197 | struct cvmx_pciercx_cfg003_s cn52xxp1; | 247 | struct cvmx_pciercx_cfg003_s cn52xxp1; |
@@ -203,12 +253,17 @@ union cvmx_pciercx_cfg003 { | |||
203 | struct cvmx_pciercx_cfg003_s cn66xx; | 253 | struct cvmx_pciercx_cfg003_s cn66xx; |
204 | struct cvmx_pciercx_cfg003_s cn68xx; | 254 | struct cvmx_pciercx_cfg003_s cn68xx; |
205 | struct cvmx_pciercx_cfg003_s cn68xxp1; | 255 | struct cvmx_pciercx_cfg003_s cn68xxp1; |
256 | struct cvmx_pciercx_cfg003_s cnf71xx; | ||
206 | }; | 257 | }; |
207 | 258 | ||
208 | union cvmx_pciercx_cfg004 { | 259 | union cvmx_pciercx_cfg004 { |
209 | uint32_t u32; | 260 | uint32_t u32; |
210 | struct cvmx_pciercx_cfg004_s { | 261 | struct cvmx_pciercx_cfg004_s { |
262 | #ifdef __BIG_ENDIAN_BITFIELD | ||
263 | uint32_t reserved_0_31:32; | ||
264 | #else | ||
211 | uint32_t reserved_0_31:32; | 265 | uint32_t reserved_0_31:32; |
266 | #endif | ||
212 | } s; | 267 | } s; |
213 | struct cvmx_pciercx_cfg004_s cn52xx; | 268 | struct cvmx_pciercx_cfg004_s cn52xx; |
214 | struct cvmx_pciercx_cfg004_s cn52xxp1; | 269 | struct cvmx_pciercx_cfg004_s cn52xxp1; |
@@ -220,12 +275,17 @@ union cvmx_pciercx_cfg004 { | |||
220 | struct cvmx_pciercx_cfg004_s cn66xx; | 275 | struct cvmx_pciercx_cfg004_s cn66xx; |
221 | struct cvmx_pciercx_cfg004_s cn68xx; | 276 | struct cvmx_pciercx_cfg004_s cn68xx; |
222 | struct cvmx_pciercx_cfg004_s cn68xxp1; | 277 | struct cvmx_pciercx_cfg004_s cn68xxp1; |
278 | struct cvmx_pciercx_cfg004_s cnf71xx; | ||
223 | }; | 279 | }; |
224 | 280 | ||
225 | union cvmx_pciercx_cfg005 { | 281 | union cvmx_pciercx_cfg005 { |
226 | uint32_t u32; | 282 | uint32_t u32; |
227 | struct cvmx_pciercx_cfg005_s { | 283 | struct cvmx_pciercx_cfg005_s { |
284 | #ifdef __BIG_ENDIAN_BITFIELD | ||
285 | uint32_t reserved_0_31:32; | ||
286 | #else | ||
228 | uint32_t reserved_0_31:32; | 287 | uint32_t reserved_0_31:32; |
288 | #endif | ||
229 | } s; | 289 | } s; |
230 | struct cvmx_pciercx_cfg005_s cn52xx; | 290 | struct cvmx_pciercx_cfg005_s cn52xx; |
231 | struct cvmx_pciercx_cfg005_s cn52xxp1; | 291 | struct cvmx_pciercx_cfg005_s cn52xxp1; |
@@ -237,15 +297,23 @@ union cvmx_pciercx_cfg005 { | |||
237 | struct cvmx_pciercx_cfg005_s cn66xx; | 297 | struct cvmx_pciercx_cfg005_s cn66xx; |
238 | struct cvmx_pciercx_cfg005_s cn68xx; | 298 | struct cvmx_pciercx_cfg005_s cn68xx; |
239 | struct cvmx_pciercx_cfg005_s cn68xxp1; | 299 | struct cvmx_pciercx_cfg005_s cn68xxp1; |
300 | struct cvmx_pciercx_cfg005_s cnf71xx; | ||
240 | }; | 301 | }; |
241 | 302 | ||
242 | union cvmx_pciercx_cfg006 { | 303 | union cvmx_pciercx_cfg006 { |
243 | uint32_t u32; | 304 | uint32_t u32; |
244 | struct cvmx_pciercx_cfg006_s { | 305 | struct cvmx_pciercx_cfg006_s { |
306 | #ifdef __BIG_ENDIAN_BITFIELD | ||
245 | uint32_t slt:8; | 307 | uint32_t slt:8; |
246 | uint32_t subbnum:8; | 308 | uint32_t subbnum:8; |
247 | uint32_t sbnum:8; | 309 | uint32_t sbnum:8; |
248 | uint32_t pbnum:8; | 310 | uint32_t pbnum:8; |
311 | #else | ||
312 | uint32_t pbnum:8; | ||
313 | uint32_t sbnum:8; | ||
314 | uint32_t subbnum:8; | ||
315 | uint32_t slt:8; | ||
316 | #endif | ||
249 | } s; | 317 | } s; |
250 | struct cvmx_pciercx_cfg006_s cn52xx; | 318 | struct cvmx_pciercx_cfg006_s cn52xx; |
251 | struct cvmx_pciercx_cfg006_s cn52xxp1; | 319 | struct cvmx_pciercx_cfg006_s cn52xxp1; |
@@ -257,11 +325,13 @@ union cvmx_pciercx_cfg006 { | |||
257 | struct cvmx_pciercx_cfg006_s cn66xx; | 325 | struct cvmx_pciercx_cfg006_s cn66xx; |
258 | struct cvmx_pciercx_cfg006_s cn68xx; | 326 | struct cvmx_pciercx_cfg006_s cn68xx; |
259 | struct cvmx_pciercx_cfg006_s cn68xxp1; | 327 | struct cvmx_pciercx_cfg006_s cn68xxp1; |
328 | struct cvmx_pciercx_cfg006_s cnf71xx; | ||
260 | }; | 329 | }; |
261 | 330 | ||
262 | union cvmx_pciercx_cfg007 { | 331 | union cvmx_pciercx_cfg007 { |
263 | uint32_t u32; | 332 | uint32_t u32; |
264 | struct cvmx_pciercx_cfg007_s { | 333 | struct cvmx_pciercx_cfg007_s { |
334 | #ifdef __BIG_ENDIAN_BITFIELD | ||
265 | uint32_t dpe:1; | 335 | uint32_t dpe:1; |
266 | uint32_t sse:1; | 336 | uint32_t sse:1; |
267 | uint32_t rma:1; | 337 | uint32_t rma:1; |
@@ -279,6 +349,25 @@ union cvmx_pciercx_cfg007 { | |||
279 | uint32_t lio_base:4; | 349 | uint32_t lio_base:4; |
280 | uint32_t reserved_1_3:3; | 350 | uint32_t reserved_1_3:3; |
281 | uint32_t io32a:1; | 351 | uint32_t io32a:1; |
352 | #else | ||
353 | uint32_t io32a:1; | ||
354 | uint32_t reserved_1_3:3; | ||
355 | uint32_t lio_base:4; | ||
356 | uint32_t io32b:1; | ||
357 | uint32_t reserved_9_11:3; | ||
358 | uint32_t lio_limi:4; | ||
359 | uint32_t reserved_16_20:5; | ||
360 | uint32_t m66:1; | ||
361 | uint32_t reserved_22_22:1; | ||
362 | uint32_t fbb:1; | ||
363 | uint32_t mdpe:1; | ||
364 | uint32_t devt:2; | ||
365 | uint32_t sta:1; | ||
366 | uint32_t rta:1; | ||
367 | uint32_t rma:1; | ||
368 | uint32_t sse:1; | ||
369 | uint32_t dpe:1; | ||
370 | #endif | ||
282 | } s; | 371 | } s; |
283 | struct cvmx_pciercx_cfg007_s cn52xx; | 372 | struct cvmx_pciercx_cfg007_s cn52xx; |
284 | struct cvmx_pciercx_cfg007_s cn52xxp1; | 373 | struct cvmx_pciercx_cfg007_s cn52xxp1; |
@@ -290,15 +379,23 @@ union cvmx_pciercx_cfg007 { | |||
290 | struct cvmx_pciercx_cfg007_s cn66xx; | 379 | struct cvmx_pciercx_cfg007_s cn66xx; |
291 | struct cvmx_pciercx_cfg007_s cn68xx; | 380 | struct cvmx_pciercx_cfg007_s cn68xx; |
292 | struct cvmx_pciercx_cfg007_s cn68xxp1; | 381 | struct cvmx_pciercx_cfg007_s cn68xxp1; |
382 | struct cvmx_pciercx_cfg007_s cnf71xx; | ||
293 | }; | 383 | }; |
294 | 384 | ||
295 | union cvmx_pciercx_cfg008 { | 385 | union cvmx_pciercx_cfg008 { |
296 | uint32_t u32; | 386 | uint32_t u32; |
297 | struct cvmx_pciercx_cfg008_s { | 387 | struct cvmx_pciercx_cfg008_s { |
388 | #ifdef __BIG_ENDIAN_BITFIELD | ||
298 | uint32_t ml_addr:12; | 389 | uint32_t ml_addr:12; |
299 | uint32_t reserved_16_19:4; | 390 | uint32_t reserved_16_19:4; |
300 | uint32_t mb_addr:12; | 391 | uint32_t mb_addr:12; |
301 | uint32_t reserved_0_3:4; | 392 | uint32_t reserved_0_3:4; |
393 | #else | ||
394 | uint32_t reserved_0_3:4; | ||
395 | uint32_t mb_addr:12; | ||
396 | uint32_t reserved_16_19:4; | ||
397 | uint32_t ml_addr:12; | ||
398 | #endif | ||
302 | } s; | 399 | } s; |
303 | struct cvmx_pciercx_cfg008_s cn52xx; | 400 | struct cvmx_pciercx_cfg008_s cn52xx; |
304 | struct cvmx_pciercx_cfg008_s cn52xxp1; | 401 | struct cvmx_pciercx_cfg008_s cn52xxp1; |
@@ -310,17 +407,27 @@ union cvmx_pciercx_cfg008 { | |||
310 | struct cvmx_pciercx_cfg008_s cn66xx; | 407 | struct cvmx_pciercx_cfg008_s cn66xx; |
311 | struct cvmx_pciercx_cfg008_s cn68xx; | 408 | struct cvmx_pciercx_cfg008_s cn68xx; |
312 | struct cvmx_pciercx_cfg008_s cn68xxp1; | 409 | struct cvmx_pciercx_cfg008_s cn68xxp1; |
410 | struct cvmx_pciercx_cfg008_s cnf71xx; | ||
313 | }; | 411 | }; |
314 | 412 | ||
315 | union cvmx_pciercx_cfg009 { | 413 | union cvmx_pciercx_cfg009 { |
316 | uint32_t u32; | 414 | uint32_t u32; |
317 | struct cvmx_pciercx_cfg009_s { | 415 | struct cvmx_pciercx_cfg009_s { |
416 | #ifdef __BIG_ENDIAN_BITFIELD | ||
318 | uint32_t lmem_limit:12; | 417 | uint32_t lmem_limit:12; |
319 | uint32_t reserved_17_19:3; | 418 | uint32_t reserved_17_19:3; |
320 | uint32_t mem64b:1; | 419 | uint32_t mem64b:1; |
321 | uint32_t lmem_base:12; | 420 | uint32_t lmem_base:12; |
322 | uint32_t reserved_1_3:3; | 421 | uint32_t reserved_1_3:3; |
323 | uint32_t mem64a:1; | 422 | uint32_t mem64a:1; |
423 | #else | ||
424 | uint32_t mem64a:1; | ||
425 | uint32_t reserved_1_3:3; | ||
426 | uint32_t lmem_base:12; | ||
427 | uint32_t mem64b:1; | ||
428 | uint32_t reserved_17_19:3; | ||
429 | uint32_t lmem_limit:12; | ||
430 | #endif | ||
324 | } s; | 431 | } s; |
325 | struct cvmx_pciercx_cfg009_s cn52xx; | 432 | struct cvmx_pciercx_cfg009_s cn52xx; |
326 | struct cvmx_pciercx_cfg009_s cn52xxp1; | 433 | struct cvmx_pciercx_cfg009_s cn52xxp1; |
@@ -332,12 +439,17 @@ union cvmx_pciercx_cfg009 { | |||
332 | struct cvmx_pciercx_cfg009_s cn66xx; | 439 | struct cvmx_pciercx_cfg009_s cn66xx; |
333 | struct cvmx_pciercx_cfg009_s cn68xx; | 440 | struct cvmx_pciercx_cfg009_s cn68xx; |
334 | struct cvmx_pciercx_cfg009_s cn68xxp1; | 441 | struct cvmx_pciercx_cfg009_s cn68xxp1; |
442 | struct cvmx_pciercx_cfg009_s cnf71xx; | ||
335 | }; | 443 | }; |
336 | 444 | ||
337 | union cvmx_pciercx_cfg010 { | 445 | union cvmx_pciercx_cfg010 { |
338 | uint32_t u32; | 446 | uint32_t u32; |
339 | struct cvmx_pciercx_cfg010_s { | 447 | struct cvmx_pciercx_cfg010_s { |
448 | #ifdef __BIG_ENDIAN_BITFIELD | ||
340 | uint32_t umem_base:32; | 449 | uint32_t umem_base:32; |
450 | #else | ||
451 | uint32_t umem_base:32; | ||
452 | #endif | ||
341 | } s; | 453 | } s; |
342 | struct cvmx_pciercx_cfg010_s cn52xx; | 454 | struct cvmx_pciercx_cfg010_s cn52xx; |
343 | struct cvmx_pciercx_cfg010_s cn52xxp1; | 455 | struct cvmx_pciercx_cfg010_s cn52xxp1; |
@@ -349,12 +461,17 @@ union cvmx_pciercx_cfg010 { | |||
349 | struct cvmx_pciercx_cfg010_s cn66xx; | 461 | struct cvmx_pciercx_cfg010_s cn66xx; |
350 | struct cvmx_pciercx_cfg010_s cn68xx; | 462 | struct cvmx_pciercx_cfg010_s cn68xx; |
351 | struct cvmx_pciercx_cfg010_s cn68xxp1; | 463 | struct cvmx_pciercx_cfg010_s cn68xxp1; |
464 | struct cvmx_pciercx_cfg010_s cnf71xx; | ||
352 | }; | 465 | }; |
353 | 466 | ||
354 | union cvmx_pciercx_cfg011 { | 467 | union cvmx_pciercx_cfg011 { |
355 | uint32_t u32; | 468 | uint32_t u32; |
356 | struct cvmx_pciercx_cfg011_s { | 469 | struct cvmx_pciercx_cfg011_s { |
470 | #ifdef __BIG_ENDIAN_BITFIELD | ||
357 | uint32_t umem_limit:32; | 471 | uint32_t umem_limit:32; |
472 | #else | ||
473 | uint32_t umem_limit:32; | ||
474 | #endif | ||
358 | } s; | 475 | } s; |
359 | struct cvmx_pciercx_cfg011_s cn52xx; | 476 | struct cvmx_pciercx_cfg011_s cn52xx; |
360 | struct cvmx_pciercx_cfg011_s cn52xxp1; | 477 | struct cvmx_pciercx_cfg011_s cn52xxp1; |
@@ -366,13 +483,19 @@ union cvmx_pciercx_cfg011 { | |||
366 | struct cvmx_pciercx_cfg011_s cn66xx; | 483 | struct cvmx_pciercx_cfg011_s cn66xx; |
367 | struct cvmx_pciercx_cfg011_s cn68xx; | 484 | struct cvmx_pciercx_cfg011_s cn68xx; |
368 | struct cvmx_pciercx_cfg011_s cn68xxp1; | 485 | struct cvmx_pciercx_cfg011_s cn68xxp1; |
486 | struct cvmx_pciercx_cfg011_s cnf71xx; | ||
369 | }; | 487 | }; |
370 | 488 | ||
371 | union cvmx_pciercx_cfg012 { | 489 | union cvmx_pciercx_cfg012 { |
372 | uint32_t u32; | 490 | uint32_t u32; |
373 | struct cvmx_pciercx_cfg012_s { | 491 | struct cvmx_pciercx_cfg012_s { |
492 | #ifdef __BIG_ENDIAN_BITFIELD | ||
374 | uint32_t uio_limit:16; | 493 | uint32_t uio_limit:16; |
375 | uint32_t uio_base:16; | 494 | uint32_t uio_base:16; |
495 | #else | ||
496 | uint32_t uio_base:16; | ||
497 | uint32_t uio_limit:16; | ||
498 | #endif | ||
376 | } s; | 499 | } s; |
377 | struct cvmx_pciercx_cfg012_s cn52xx; | 500 | struct cvmx_pciercx_cfg012_s cn52xx; |
378 | struct cvmx_pciercx_cfg012_s cn52xxp1; | 501 | struct cvmx_pciercx_cfg012_s cn52xxp1; |
@@ -384,13 +507,19 @@ union cvmx_pciercx_cfg012 { | |||
384 | struct cvmx_pciercx_cfg012_s cn66xx; | 507 | struct cvmx_pciercx_cfg012_s cn66xx; |
385 | struct cvmx_pciercx_cfg012_s cn68xx; | 508 | struct cvmx_pciercx_cfg012_s cn68xx; |
386 | struct cvmx_pciercx_cfg012_s cn68xxp1; | 509 | struct cvmx_pciercx_cfg012_s cn68xxp1; |
510 | struct cvmx_pciercx_cfg012_s cnf71xx; | ||
387 | }; | 511 | }; |
388 | 512 | ||
389 | union cvmx_pciercx_cfg013 { | 513 | union cvmx_pciercx_cfg013 { |
390 | uint32_t u32; | 514 | uint32_t u32; |
391 | struct cvmx_pciercx_cfg013_s { | 515 | struct cvmx_pciercx_cfg013_s { |
516 | #ifdef __BIG_ENDIAN_BITFIELD | ||
392 | uint32_t reserved_8_31:24; | 517 | uint32_t reserved_8_31:24; |
393 | uint32_t cp:8; | 518 | uint32_t cp:8; |
519 | #else | ||
520 | uint32_t cp:8; | ||
521 | uint32_t reserved_8_31:24; | ||
522 | #endif | ||
394 | } s; | 523 | } s; |
395 | struct cvmx_pciercx_cfg013_s cn52xx; | 524 | struct cvmx_pciercx_cfg013_s cn52xx; |
396 | struct cvmx_pciercx_cfg013_s cn52xxp1; | 525 | struct cvmx_pciercx_cfg013_s cn52xxp1; |
@@ -402,12 +531,17 @@ union cvmx_pciercx_cfg013 { | |||
402 | struct cvmx_pciercx_cfg013_s cn66xx; | 531 | struct cvmx_pciercx_cfg013_s cn66xx; |
403 | struct cvmx_pciercx_cfg013_s cn68xx; | 532 | struct cvmx_pciercx_cfg013_s cn68xx; |
404 | struct cvmx_pciercx_cfg013_s cn68xxp1; | 533 | struct cvmx_pciercx_cfg013_s cn68xxp1; |
534 | struct cvmx_pciercx_cfg013_s cnf71xx; | ||
405 | }; | 535 | }; |
406 | 536 | ||
407 | union cvmx_pciercx_cfg014 { | 537 | union cvmx_pciercx_cfg014 { |
408 | uint32_t u32; | 538 | uint32_t u32; |
409 | struct cvmx_pciercx_cfg014_s { | 539 | struct cvmx_pciercx_cfg014_s { |
540 | #ifdef __BIG_ENDIAN_BITFIELD | ||
541 | uint32_t reserved_0_31:32; | ||
542 | #else | ||
410 | uint32_t reserved_0_31:32; | 543 | uint32_t reserved_0_31:32; |
544 | #endif | ||
411 | } s; | 545 | } s; |
412 | struct cvmx_pciercx_cfg014_s cn52xx; | 546 | struct cvmx_pciercx_cfg014_s cn52xx; |
413 | struct cvmx_pciercx_cfg014_s cn52xxp1; | 547 | struct cvmx_pciercx_cfg014_s cn52xxp1; |
@@ -419,11 +553,13 @@ union cvmx_pciercx_cfg014 { | |||
419 | struct cvmx_pciercx_cfg014_s cn66xx; | 553 | struct cvmx_pciercx_cfg014_s cn66xx; |
420 | struct cvmx_pciercx_cfg014_s cn68xx; | 554 | struct cvmx_pciercx_cfg014_s cn68xx; |
421 | struct cvmx_pciercx_cfg014_s cn68xxp1; | 555 | struct cvmx_pciercx_cfg014_s cn68xxp1; |
556 | struct cvmx_pciercx_cfg014_s cnf71xx; | ||
422 | }; | 557 | }; |
423 | 558 | ||
424 | union cvmx_pciercx_cfg015 { | 559 | union cvmx_pciercx_cfg015 { |
425 | uint32_t u32; | 560 | uint32_t u32; |
426 | struct cvmx_pciercx_cfg015_s { | 561 | struct cvmx_pciercx_cfg015_s { |
562 | #ifdef __BIG_ENDIAN_BITFIELD | ||
427 | uint32_t reserved_28_31:4; | 563 | uint32_t reserved_28_31:4; |
428 | uint32_t dtsees:1; | 564 | uint32_t dtsees:1; |
429 | uint32_t dts:1; | 565 | uint32_t dts:1; |
@@ -439,6 +575,23 @@ union cvmx_pciercx_cfg015 { | |||
439 | uint32_t pere:1; | 575 | uint32_t pere:1; |
440 | uint32_t inta:8; | 576 | uint32_t inta:8; |
441 | uint32_t il:8; | 577 | uint32_t il:8; |
578 | #else | ||
579 | uint32_t il:8; | ||
580 | uint32_t inta:8; | ||
581 | uint32_t pere:1; | ||
582 | uint32_t see:1; | ||
583 | uint32_t isae:1; | ||
584 | uint32_t vgae:1; | ||
585 | uint32_t vga16d:1; | ||
586 | uint32_t mam:1; | ||
587 | uint32_t sbrst:1; | ||
588 | uint32_t fbbe:1; | ||
589 | uint32_t pdt:1; | ||
590 | uint32_t sdt:1; | ||
591 | uint32_t dts:1; | ||
592 | uint32_t dtsees:1; | ||
593 | uint32_t reserved_28_31:4; | ||
594 | #endif | ||
442 | } s; | 595 | } s; |
443 | struct cvmx_pciercx_cfg015_s cn52xx; | 596 | struct cvmx_pciercx_cfg015_s cn52xx; |
444 | struct cvmx_pciercx_cfg015_s cn52xxp1; | 597 | struct cvmx_pciercx_cfg015_s cn52xxp1; |
@@ -450,11 +603,13 @@ union cvmx_pciercx_cfg015 { | |||
450 | struct cvmx_pciercx_cfg015_s cn66xx; | 603 | struct cvmx_pciercx_cfg015_s cn66xx; |
451 | struct cvmx_pciercx_cfg015_s cn68xx; | 604 | struct cvmx_pciercx_cfg015_s cn68xx; |
452 | struct cvmx_pciercx_cfg015_s cn68xxp1; | 605 | struct cvmx_pciercx_cfg015_s cn68xxp1; |
606 | struct cvmx_pciercx_cfg015_s cnf71xx; | ||
453 | }; | 607 | }; |
454 | 608 | ||
455 | union cvmx_pciercx_cfg016 { | 609 | union cvmx_pciercx_cfg016 { |
456 | uint32_t u32; | 610 | uint32_t u32; |
457 | struct cvmx_pciercx_cfg016_s { | 611 | struct cvmx_pciercx_cfg016_s { |
612 | #ifdef __BIG_ENDIAN_BITFIELD | ||
458 | uint32_t pmes:5; | 613 | uint32_t pmes:5; |
459 | uint32_t d2s:1; | 614 | uint32_t d2s:1; |
460 | uint32_t d1s:1; | 615 | uint32_t d1s:1; |
@@ -465,6 +620,18 @@ union cvmx_pciercx_cfg016 { | |||
465 | uint32_t pmsv:3; | 620 | uint32_t pmsv:3; |
466 | uint32_t ncp:8; | 621 | uint32_t ncp:8; |
467 | uint32_t pmcid:8; | 622 | uint32_t pmcid:8; |
623 | #else | ||
624 | uint32_t pmcid:8; | ||
625 | uint32_t ncp:8; | ||
626 | uint32_t pmsv:3; | ||
627 | uint32_t pme_clock:1; | ||
628 | uint32_t reserved_20_20:1; | ||
629 | uint32_t dsi:1; | ||
630 | uint32_t auxc:3; | ||
631 | uint32_t d1s:1; | ||
632 | uint32_t d2s:1; | ||
633 | uint32_t pmes:5; | ||
634 | #endif | ||
468 | } s; | 635 | } s; |
469 | struct cvmx_pciercx_cfg016_s cn52xx; | 636 | struct cvmx_pciercx_cfg016_s cn52xx; |
470 | struct cvmx_pciercx_cfg016_s cn52xxp1; | 637 | struct cvmx_pciercx_cfg016_s cn52xxp1; |
@@ -476,11 +643,13 @@ union cvmx_pciercx_cfg016 { | |||
476 | struct cvmx_pciercx_cfg016_s cn66xx; | 643 | struct cvmx_pciercx_cfg016_s cn66xx; |
477 | struct cvmx_pciercx_cfg016_s cn68xx; | 644 | struct cvmx_pciercx_cfg016_s cn68xx; |
478 | struct cvmx_pciercx_cfg016_s cn68xxp1; | 645 | struct cvmx_pciercx_cfg016_s cn68xxp1; |
646 | struct cvmx_pciercx_cfg016_s cnf71xx; | ||
479 | }; | 647 | }; |
480 | 648 | ||
481 | union cvmx_pciercx_cfg017 { | 649 | union cvmx_pciercx_cfg017 { |
482 | uint32_t u32; | 650 | uint32_t u32; |
483 | struct cvmx_pciercx_cfg017_s { | 651 | struct cvmx_pciercx_cfg017_s { |
652 | #ifdef __BIG_ENDIAN_BITFIELD | ||
484 | uint32_t pmdia:8; | 653 | uint32_t pmdia:8; |
485 | uint32_t bpccee:1; | 654 | uint32_t bpccee:1; |
486 | uint32_t bd3h:1; | 655 | uint32_t bd3h:1; |
@@ -493,6 +662,20 @@ union cvmx_pciercx_cfg017 { | |||
493 | uint32_t nsr:1; | 662 | uint32_t nsr:1; |
494 | uint32_t reserved_2_2:1; | 663 | uint32_t reserved_2_2:1; |
495 | uint32_t ps:2; | 664 | uint32_t ps:2; |
665 | #else | ||
666 | uint32_t ps:2; | ||
667 | uint32_t reserved_2_2:1; | ||
668 | uint32_t nsr:1; | ||
669 | uint32_t reserved_4_7:4; | ||
670 | uint32_t pmeens:1; | ||
671 | uint32_t pmds:4; | ||
672 | uint32_t pmedsia:2; | ||
673 | uint32_t pmess:1; | ||
674 | uint32_t reserved_16_21:6; | ||
675 | uint32_t bd3h:1; | ||
676 | uint32_t bpccee:1; | ||
677 | uint32_t pmdia:8; | ||
678 | #endif | ||
496 | } s; | 679 | } s; |
497 | struct cvmx_pciercx_cfg017_s cn52xx; | 680 | struct cvmx_pciercx_cfg017_s cn52xx; |
498 | struct cvmx_pciercx_cfg017_s cn52xxp1; | 681 | struct cvmx_pciercx_cfg017_s cn52xxp1; |
@@ -504,11 +687,13 @@ union cvmx_pciercx_cfg017 { | |||
504 | struct cvmx_pciercx_cfg017_s cn66xx; | 687 | struct cvmx_pciercx_cfg017_s cn66xx; |
505 | struct cvmx_pciercx_cfg017_s cn68xx; | 688 | struct cvmx_pciercx_cfg017_s cn68xx; |
506 | struct cvmx_pciercx_cfg017_s cn68xxp1; | 689 | struct cvmx_pciercx_cfg017_s cn68xxp1; |
690 | struct cvmx_pciercx_cfg017_s cnf71xx; | ||
507 | }; | 691 | }; |
508 | 692 | ||
509 | union cvmx_pciercx_cfg020 { | 693 | union cvmx_pciercx_cfg020 { |
510 | uint32_t u32; | 694 | uint32_t u32; |
511 | struct cvmx_pciercx_cfg020_s { | 695 | struct cvmx_pciercx_cfg020_s { |
696 | #ifdef __BIG_ENDIAN_BITFIELD | ||
512 | uint32_t reserved_25_31:7; | 697 | uint32_t reserved_25_31:7; |
513 | uint32_t pvm:1; | 698 | uint32_t pvm:1; |
514 | uint32_t m64:1; | 699 | uint32_t m64:1; |
@@ -517,8 +702,19 @@ union cvmx_pciercx_cfg020 { | |||
517 | uint32_t msien:1; | 702 | uint32_t msien:1; |
518 | uint32_t ncp:8; | 703 | uint32_t ncp:8; |
519 | uint32_t msicid:8; | 704 | uint32_t msicid:8; |
705 | #else | ||
706 | uint32_t msicid:8; | ||
707 | uint32_t ncp:8; | ||
708 | uint32_t msien:1; | ||
709 | uint32_t mmc:3; | ||
710 | uint32_t mme:3; | ||
711 | uint32_t m64:1; | ||
712 | uint32_t pvm:1; | ||
713 | uint32_t reserved_25_31:7; | ||
714 | #endif | ||
520 | } s; | 715 | } s; |
521 | struct cvmx_pciercx_cfg020_cn52xx { | 716 | struct cvmx_pciercx_cfg020_cn52xx { |
717 | #ifdef __BIG_ENDIAN_BITFIELD | ||
522 | uint32_t reserved_24_31:8; | 718 | uint32_t reserved_24_31:8; |
523 | uint32_t m64:1; | 719 | uint32_t m64:1; |
524 | uint32_t mme:3; | 720 | uint32_t mme:3; |
@@ -526,6 +722,15 @@ union cvmx_pciercx_cfg020 { | |||
526 | uint32_t msien:1; | 722 | uint32_t msien:1; |
527 | uint32_t ncp:8; | 723 | uint32_t ncp:8; |
528 | uint32_t msicid:8; | 724 | uint32_t msicid:8; |
725 | #else | ||
726 | uint32_t msicid:8; | ||
727 | uint32_t ncp:8; | ||
728 | uint32_t msien:1; | ||
729 | uint32_t mmc:3; | ||
730 | uint32_t mme:3; | ||
731 | uint32_t m64:1; | ||
732 | uint32_t reserved_24_31:8; | ||
733 | #endif | ||
529 | } cn52xx; | 734 | } cn52xx; |
530 | struct cvmx_pciercx_cfg020_cn52xx cn52xxp1; | 735 | struct cvmx_pciercx_cfg020_cn52xx cn52xxp1; |
531 | struct cvmx_pciercx_cfg020_cn52xx cn56xx; | 736 | struct cvmx_pciercx_cfg020_cn52xx cn56xx; |
@@ -536,13 +741,19 @@ union cvmx_pciercx_cfg020 { | |||
536 | struct cvmx_pciercx_cfg020_cn52xx cn66xx; | 741 | struct cvmx_pciercx_cfg020_cn52xx cn66xx; |
537 | struct cvmx_pciercx_cfg020_cn52xx cn68xx; | 742 | struct cvmx_pciercx_cfg020_cn52xx cn68xx; |
538 | struct cvmx_pciercx_cfg020_cn52xx cn68xxp1; | 743 | struct cvmx_pciercx_cfg020_cn52xx cn68xxp1; |
744 | struct cvmx_pciercx_cfg020_s cnf71xx; | ||
539 | }; | 745 | }; |
540 | 746 | ||
541 | union cvmx_pciercx_cfg021 { | 747 | union cvmx_pciercx_cfg021 { |
542 | uint32_t u32; | 748 | uint32_t u32; |
543 | struct cvmx_pciercx_cfg021_s { | 749 | struct cvmx_pciercx_cfg021_s { |
750 | #ifdef __BIG_ENDIAN_BITFIELD | ||
544 | uint32_t lmsi:30; | 751 | uint32_t lmsi:30; |
545 | uint32_t reserved_0_1:2; | 752 | uint32_t reserved_0_1:2; |
753 | #else | ||
754 | uint32_t reserved_0_1:2; | ||
755 | uint32_t lmsi:30; | ||
756 | #endif | ||
546 | } s; | 757 | } s; |
547 | struct cvmx_pciercx_cfg021_s cn52xx; | 758 | struct cvmx_pciercx_cfg021_s cn52xx; |
548 | struct cvmx_pciercx_cfg021_s cn52xxp1; | 759 | struct cvmx_pciercx_cfg021_s cn52xxp1; |
@@ -554,12 +765,17 @@ union cvmx_pciercx_cfg021 { | |||
554 | struct cvmx_pciercx_cfg021_s cn66xx; | 765 | struct cvmx_pciercx_cfg021_s cn66xx; |
555 | struct cvmx_pciercx_cfg021_s cn68xx; | 766 | struct cvmx_pciercx_cfg021_s cn68xx; |
556 | struct cvmx_pciercx_cfg021_s cn68xxp1; | 767 | struct cvmx_pciercx_cfg021_s cn68xxp1; |
768 | struct cvmx_pciercx_cfg021_s cnf71xx; | ||
557 | }; | 769 | }; |
558 | 770 | ||
559 | union cvmx_pciercx_cfg022 { | 771 | union cvmx_pciercx_cfg022 { |
560 | uint32_t u32; | 772 | uint32_t u32; |
561 | struct cvmx_pciercx_cfg022_s { | 773 | struct cvmx_pciercx_cfg022_s { |
774 | #ifdef __BIG_ENDIAN_BITFIELD | ||
562 | uint32_t umsi:32; | 775 | uint32_t umsi:32; |
776 | #else | ||
777 | uint32_t umsi:32; | ||
778 | #endif | ||
563 | } s; | 779 | } s; |
564 | struct cvmx_pciercx_cfg022_s cn52xx; | 780 | struct cvmx_pciercx_cfg022_s cn52xx; |
565 | struct cvmx_pciercx_cfg022_s cn52xxp1; | 781 | struct cvmx_pciercx_cfg022_s cn52xxp1; |
@@ -571,13 +787,19 @@ union cvmx_pciercx_cfg022 { | |||
571 | struct cvmx_pciercx_cfg022_s cn66xx; | 787 | struct cvmx_pciercx_cfg022_s cn66xx; |
572 | struct cvmx_pciercx_cfg022_s cn68xx; | 788 | struct cvmx_pciercx_cfg022_s cn68xx; |
573 | struct cvmx_pciercx_cfg022_s cn68xxp1; | 789 | struct cvmx_pciercx_cfg022_s cn68xxp1; |
790 | struct cvmx_pciercx_cfg022_s cnf71xx; | ||
574 | }; | 791 | }; |
575 | 792 | ||
576 | union cvmx_pciercx_cfg023 { | 793 | union cvmx_pciercx_cfg023 { |
577 | uint32_t u32; | 794 | uint32_t u32; |
578 | struct cvmx_pciercx_cfg023_s { | 795 | struct cvmx_pciercx_cfg023_s { |
796 | #ifdef __BIG_ENDIAN_BITFIELD | ||
579 | uint32_t reserved_16_31:16; | 797 | uint32_t reserved_16_31:16; |
580 | uint32_t msimd:16; | 798 | uint32_t msimd:16; |
799 | #else | ||
800 | uint32_t msimd:16; | ||
801 | uint32_t reserved_16_31:16; | ||
802 | #endif | ||
581 | } s; | 803 | } s; |
582 | struct cvmx_pciercx_cfg023_s cn52xx; | 804 | struct cvmx_pciercx_cfg023_s cn52xx; |
583 | struct cvmx_pciercx_cfg023_s cn52xxp1; | 805 | struct cvmx_pciercx_cfg023_s cn52xxp1; |
@@ -589,11 +811,13 @@ union cvmx_pciercx_cfg023 { | |||
589 | struct cvmx_pciercx_cfg023_s cn66xx; | 811 | struct cvmx_pciercx_cfg023_s cn66xx; |
590 | struct cvmx_pciercx_cfg023_s cn68xx; | 812 | struct cvmx_pciercx_cfg023_s cn68xx; |
591 | struct cvmx_pciercx_cfg023_s cn68xxp1; | 813 | struct cvmx_pciercx_cfg023_s cn68xxp1; |
814 | struct cvmx_pciercx_cfg023_s cnf71xx; | ||
592 | }; | 815 | }; |
593 | 816 | ||
594 | union cvmx_pciercx_cfg028 { | 817 | union cvmx_pciercx_cfg028 { |
595 | uint32_t u32; | 818 | uint32_t u32; |
596 | struct cvmx_pciercx_cfg028_s { | 819 | struct cvmx_pciercx_cfg028_s { |
820 | #ifdef __BIG_ENDIAN_BITFIELD | ||
597 | uint32_t reserved_30_31:2; | 821 | uint32_t reserved_30_31:2; |
598 | uint32_t imn:5; | 822 | uint32_t imn:5; |
599 | uint32_t si:1; | 823 | uint32_t si:1; |
@@ -601,6 +825,15 @@ union cvmx_pciercx_cfg028 { | |||
601 | uint32_t pciecv:4; | 825 | uint32_t pciecv:4; |
602 | uint32_t ncp:8; | 826 | uint32_t ncp:8; |
603 | uint32_t pcieid:8; | 827 | uint32_t pcieid:8; |
828 | #else | ||
829 | uint32_t pcieid:8; | ||
830 | uint32_t ncp:8; | ||
831 | uint32_t pciecv:4; | ||
832 | uint32_t dpt:4; | ||
833 | uint32_t si:1; | ||
834 | uint32_t imn:5; | ||
835 | uint32_t reserved_30_31:2; | ||
836 | #endif | ||
604 | } s; | 837 | } s; |
605 | struct cvmx_pciercx_cfg028_s cn52xx; | 838 | struct cvmx_pciercx_cfg028_s cn52xx; |
606 | struct cvmx_pciercx_cfg028_s cn52xxp1; | 839 | struct cvmx_pciercx_cfg028_s cn52xxp1; |
@@ -612,11 +845,13 @@ union cvmx_pciercx_cfg028 { | |||
612 | struct cvmx_pciercx_cfg028_s cn66xx; | 845 | struct cvmx_pciercx_cfg028_s cn66xx; |
613 | struct cvmx_pciercx_cfg028_s cn68xx; | 846 | struct cvmx_pciercx_cfg028_s cn68xx; |
614 | struct cvmx_pciercx_cfg028_s cn68xxp1; | 847 | struct cvmx_pciercx_cfg028_s cn68xxp1; |
848 | struct cvmx_pciercx_cfg028_s cnf71xx; | ||
615 | }; | 849 | }; |
616 | 850 | ||
617 | union cvmx_pciercx_cfg029 { | 851 | union cvmx_pciercx_cfg029 { |
618 | uint32_t u32; | 852 | uint32_t u32; |
619 | struct cvmx_pciercx_cfg029_s { | 853 | struct cvmx_pciercx_cfg029_s { |
854 | #ifdef __BIG_ENDIAN_BITFIELD | ||
620 | uint32_t reserved_28_31:4; | 855 | uint32_t reserved_28_31:4; |
621 | uint32_t cspls:2; | 856 | uint32_t cspls:2; |
622 | uint32_t csplv:8; | 857 | uint32_t csplv:8; |
@@ -628,6 +863,19 @@ union cvmx_pciercx_cfg029 { | |||
628 | uint32_t etfs:1; | 863 | uint32_t etfs:1; |
629 | uint32_t pfs:2; | 864 | uint32_t pfs:2; |
630 | uint32_t mpss:3; | 865 | uint32_t mpss:3; |
866 | #else | ||
867 | uint32_t mpss:3; | ||
868 | uint32_t pfs:2; | ||
869 | uint32_t etfs:1; | ||
870 | uint32_t el0al:3; | ||
871 | uint32_t el1al:3; | ||
872 | uint32_t reserved_12_14:3; | ||
873 | uint32_t rber:1; | ||
874 | uint32_t reserved_16_17:2; | ||
875 | uint32_t csplv:8; | ||
876 | uint32_t cspls:2; | ||
877 | uint32_t reserved_28_31:4; | ||
878 | #endif | ||
631 | } s; | 879 | } s; |
632 | struct cvmx_pciercx_cfg029_s cn52xx; | 880 | struct cvmx_pciercx_cfg029_s cn52xx; |
633 | struct cvmx_pciercx_cfg029_s cn52xxp1; | 881 | struct cvmx_pciercx_cfg029_s cn52xxp1; |
@@ -639,11 +887,13 @@ union cvmx_pciercx_cfg029 { | |||
639 | struct cvmx_pciercx_cfg029_s cn66xx; | 887 | struct cvmx_pciercx_cfg029_s cn66xx; |
640 | struct cvmx_pciercx_cfg029_s cn68xx; | 888 | struct cvmx_pciercx_cfg029_s cn68xx; |
641 | struct cvmx_pciercx_cfg029_s cn68xxp1; | 889 | struct cvmx_pciercx_cfg029_s cn68xxp1; |
890 | struct cvmx_pciercx_cfg029_s cnf71xx; | ||
642 | }; | 891 | }; |
643 | 892 | ||
644 | union cvmx_pciercx_cfg030 { | 893 | union cvmx_pciercx_cfg030 { |
645 | uint32_t u32; | 894 | uint32_t u32; |
646 | struct cvmx_pciercx_cfg030_s { | 895 | struct cvmx_pciercx_cfg030_s { |
896 | #ifdef __BIG_ENDIAN_BITFIELD | ||
647 | uint32_t reserved_22_31:10; | 897 | uint32_t reserved_22_31:10; |
648 | uint32_t tp:1; | 898 | uint32_t tp:1; |
649 | uint32_t ap_d:1; | 899 | uint32_t ap_d:1; |
@@ -663,6 +913,27 @@ union cvmx_pciercx_cfg030 { | |||
663 | uint32_t fe_en:1; | 913 | uint32_t fe_en:1; |
664 | uint32_t nfe_en:1; | 914 | uint32_t nfe_en:1; |
665 | uint32_t ce_en:1; | 915 | uint32_t ce_en:1; |
916 | #else | ||
917 | uint32_t ce_en:1; | ||
918 | uint32_t nfe_en:1; | ||
919 | uint32_t fe_en:1; | ||
920 | uint32_t ur_en:1; | ||
921 | uint32_t ro_en:1; | ||
922 | uint32_t mps:3; | ||
923 | uint32_t etf_en:1; | ||
924 | uint32_t pf_en:1; | ||
925 | uint32_t ap_en:1; | ||
926 | uint32_t ns_en:1; | ||
927 | uint32_t mrrs:3; | ||
928 | uint32_t reserved_15_15:1; | ||
929 | uint32_t ce_d:1; | ||
930 | uint32_t nfe_d:1; | ||
931 | uint32_t fe_d:1; | ||
932 | uint32_t ur_d:1; | ||
933 | uint32_t ap_d:1; | ||
934 | uint32_t tp:1; | ||
935 | uint32_t reserved_22_31:10; | ||
936 | #endif | ||
666 | } s; | 937 | } s; |
667 | struct cvmx_pciercx_cfg030_s cn52xx; | 938 | struct cvmx_pciercx_cfg030_s cn52xx; |
668 | struct cvmx_pciercx_cfg030_s cn52xxp1; | 939 | struct cvmx_pciercx_cfg030_s cn52xxp1; |
@@ -674,11 +945,13 @@ union cvmx_pciercx_cfg030 { | |||
674 | struct cvmx_pciercx_cfg030_s cn66xx; | 945 | struct cvmx_pciercx_cfg030_s cn66xx; |
675 | struct cvmx_pciercx_cfg030_s cn68xx; | 946 | struct cvmx_pciercx_cfg030_s cn68xx; |
676 | struct cvmx_pciercx_cfg030_s cn68xxp1; | 947 | struct cvmx_pciercx_cfg030_s cn68xxp1; |
948 | struct cvmx_pciercx_cfg030_s cnf71xx; | ||
677 | }; | 949 | }; |
678 | 950 | ||
679 | union cvmx_pciercx_cfg031 { | 951 | union cvmx_pciercx_cfg031 { |
680 | uint32_t u32; | 952 | uint32_t u32; |
681 | struct cvmx_pciercx_cfg031_s { | 953 | struct cvmx_pciercx_cfg031_s { |
954 | #ifdef __BIG_ENDIAN_BITFIELD | ||
682 | uint32_t pnum:8; | 955 | uint32_t pnum:8; |
683 | uint32_t reserved_23_23:1; | 956 | uint32_t reserved_23_23:1; |
684 | uint32_t aspm:1; | 957 | uint32_t aspm:1; |
@@ -691,8 +964,23 @@ union cvmx_pciercx_cfg031 { | |||
691 | uint32_t aslpms:2; | 964 | uint32_t aslpms:2; |
692 | uint32_t mlw:6; | 965 | uint32_t mlw:6; |
693 | uint32_t mls:4; | 966 | uint32_t mls:4; |
967 | #else | ||
968 | uint32_t mls:4; | ||
969 | uint32_t mlw:6; | ||
970 | uint32_t aslpms:2; | ||
971 | uint32_t l0el:3; | ||
972 | uint32_t l1el:3; | ||
973 | uint32_t cpm:1; | ||
974 | uint32_t sderc:1; | ||
975 | uint32_t dllarc:1; | ||
976 | uint32_t lbnc:1; | ||
977 | uint32_t aspm:1; | ||
978 | uint32_t reserved_23_23:1; | ||
979 | uint32_t pnum:8; | ||
980 | #endif | ||
694 | } s; | 981 | } s; |
695 | struct cvmx_pciercx_cfg031_cn52xx { | 982 | struct cvmx_pciercx_cfg031_cn52xx { |
983 | #ifdef __BIG_ENDIAN_BITFIELD | ||
696 | uint32_t pnum:8; | 984 | uint32_t pnum:8; |
697 | uint32_t reserved_22_23:2; | 985 | uint32_t reserved_22_23:2; |
698 | uint32_t lbnc:1; | 986 | uint32_t lbnc:1; |
@@ -704,6 +992,19 @@ union cvmx_pciercx_cfg031 { | |||
704 | uint32_t aslpms:2; | 992 | uint32_t aslpms:2; |
705 | uint32_t mlw:6; | 993 | uint32_t mlw:6; |
706 | uint32_t mls:4; | 994 | uint32_t mls:4; |
995 | #else | ||
996 | uint32_t mls:4; | ||
997 | uint32_t mlw:6; | ||
998 | uint32_t aslpms:2; | ||
999 | uint32_t l0el:3; | ||
1000 | uint32_t l1el:3; | ||
1001 | uint32_t cpm:1; | ||
1002 | uint32_t sderc:1; | ||
1003 | uint32_t dllarc:1; | ||
1004 | uint32_t lbnc:1; | ||
1005 | uint32_t reserved_22_23:2; | ||
1006 | uint32_t pnum:8; | ||
1007 | #endif | ||
707 | } cn52xx; | 1008 | } cn52xx; |
708 | struct cvmx_pciercx_cfg031_cn52xx cn52xxp1; | 1009 | struct cvmx_pciercx_cfg031_cn52xx cn52xxp1; |
709 | struct cvmx_pciercx_cfg031_cn52xx cn56xx; | 1010 | struct cvmx_pciercx_cfg031_cn52xx cn56xx; |
@@ -714,11 +1015,13 @@ union cvmx_pciercx_cfg031 { | |||
714 | struct cvmx_pciercx_cfg031_s cn66xx; | 1015 | struct cvmx_pciercx_cfg031_s cn66xx; |
715 | struct cvmx_pciercx_cfg031_s cn68xx; | 1016 | struct cvmx_pciercx_cfg031_s cn68xx; |
716 | struct cvmx_pciercx_cfg031_cn52xx cn68xxp1; | 1017 | struct cvmx_pciercx_cfg031_cn52xx cn68xxp1; |
1018 | struct cvmx_pciercx_cfg031_s cnf71xx; | ||
717 | }; | 1019 | }; |
718 | 1020 | ||
719 | union cvmx_pciercx_cfg032 { | 1021 | union cvmx_pciercx_cfg032 { |
720 | uint32_t u32; | 1022 | uint32_t u32; |
721 | struct cvmx_pciercx_cfg032_s { | 1023 | struct cvmx_pciercx_cfg032_s { |
1024 | #ifdef __BIG_ENDIAN_BITFIELD | ||
722 | uint32_t lab:1; | 1025 | uint32_t lab:1; |
723 | uint32_t lbm:1; | 1026 | uint32_t lbm:1; |
724 | uint32_t dlla:1; | 1027 | uint32_t dlla:1; |
@@ -739,6 +1042,28 @@ union cvmx_pciercx_cfg032 { | |||
739 | uint32_t rcb:1; | 1042 | uint32_t rcb:1; |
740 | uint32_t reserved_2_2:1; | 1043 | uint32_t reserved_2_2:1; |
741 | uint32_t aslpc:2; | 1044 | uint32_t aslpc:2; |
1045 | #else | ||
1046 | uint32_t aslpc:2; | ||
1047 | uint32_t reserved_2_2:1; | ||
1048 | uint32_t rcb:1; | ||
1049 | uint32_t ld:1; | ||
1050 | uint32_t rl:1; | ||
1051 | uint32_t ccc:1; | ||
1052 | uint32_t es:1; | ||
1053 | uint32_t ecpm:1; | ||
1054 | uint32_t hawd:1; | ||
1055 | uint32_t lbm_int_enb:1; | ||
1056 | uint32_t lab_int_enb:1; | ||
1057 | uint32_t reserved_12_15:4; | ||
1058 | uint32_t ls:4; | ||
1059 | uint32_t nlw:6; | ||
1060 | uint32_t reserved_26_26:1; | ||
1061 | uint32_t lt:1; | ||
1062 | uint32_t scc:1; | ||
1063 | uint32_t dlla:1; | ||
1064 | uint32_t lbm:1; | ||
1065 | uint32_t lab:1; | ||
1066 | #endif | ||
742 | } s; | 1067 | } s; |
743 | struct cvmx_pciercx_cfg032_s cn52xx; | 1068 | struct cvmx_pciercx_cfg032_s cn52xx; |
744 | struct cvmx_pciercx_cfg032_s cn52xxp1; | 1069 | struct cvmx_pciercx_cfg032_s cn52xxp1; |
@@ -750,11 +1075,13 @@ union cvmx_pciercx_cfg032 { | |||
750 | struct cvmx_pciercx_cfg032_s cn66xx; | 1075 | struct cvmx_pciercx_cfg032_s cn66xx; |
751 | struct cvmx_pciercx_cfg032_s cn68xx; | 1076 | struct cvmx_pciercx_cfg032_s cn68xx; |
752 | struct cvmx_pciercx_cfg032_s cn68xxp1; | 1077 | struct cvmx_pciercx_cfg032_s cn68xxp1; |
1078 | struct cvmx_pciercx_cfg032_s cnf71xx; | ||
753 | }; | 1079 | }; |
754 | 1080 | ||
755 | union cvmx_pciercx_cfg033 { | 1081 | union cvmx_pciercx_cfg033 { |
756 | uint32_t u32; | 1082 | uint32_t u32; |
757 | struct cvmx_pciercx_cfg033_s { | 1083 | struct cvmx_pciercx_cfg033_s { |
1084 | #ifdef __BIG_ENDIAN_BITFIELD | ||
758 | uint32_t ps_num:13; | 1085 | uint32_t ps_num:13; |
759 | uint32_t nccs:1; | 1086 | uint32_t nccs:1; |
760 | uint32_t emip:1; | 1087 | uint32_t emip:1; |
@@ -767,6 +1094,20 @@ union cvmx_pciercx_cfg033 { | |||
767 | uint32_t mrlsp:1; | 1094 | uint32_t mrlsp:1; |
768 | uint32_t pcp:1; | 1095 | uint32_t pcp:1; |
769 | uint32_t abp:1; | 1096 | uint32_t abp:1; |
1097 | #else | ||
1098 | uint32_t abp:1; | ||
1099 | uint32_t pcp:1; | ||
1100 | uint32_t mrlsp:1; | ||
1101 | uint32_t aip:1; | ||
1102 | uint32_t pip:1; | ||
1103 | uint32_t hp_s:1; | ||
1104 | uint32_t hp_c:1; | ||
1105 | uint32_t sp_lv:8; | ||
1106 | uint32_t sp_ls:2; | ||
1107 | uint32_t emip:1; | ||
1108 | uint32_t nccs:1; | ||
1109 | uint32_t ps_num:13; | ||
1110 | #endif | ||
770 | } s; | 1111 | } s; |
771 | struct cvmx_pciercx_cfg033_s cn52xx; | 1112 | struct cvmx_pciercx_cfg033_s cn52xx; |
772 | struct cvmx_pciercx_cfg033_s cn52xxp1; | 1113 | struct cvmx_pciercx_cfg033_s cn52xxp1; |
@@ -778,11 +1119,13 @@ union cvmx_pciercx_cfg033 { | |||
778 | struct cvmx_pciercx_cfg033_s cn66xx; | 1119 | struct cvmx_pciercx_cfg033_s cn66xx; |
779 | struct cvmx_pciercx_cfg033_s cn68xx; | 1120 | struct cvmx_pciercx_cfg033_s cn68xx; |
780 | struct cvmx_pciercx_cfg033_s cn68xxp1; | 1121 | struct cvmx_pciercx_cfg033_s cn68xxp1; |
1122 | struct cvmx_pciercx_cfg033_s cnf71xx; | ||
781 | }; | 1123 | }; |
782 | 1124 | ||
783 | union cvmx_pciercx_cfg034 { | 1125 | union cvmx_pciercx_cfg034 { |
784 | uint32_t u32; | 1126 | uint32_t u32; |
785 | struct cvmx_pciercx_cfg034_s { | 1127 | struct cvmx_pciercx_cfg034_s { |
1128 | #ifdef __BIG_ENDIAN_BITFIELD | ||
786 | uint32_t reserved_25_31:7; | 1129 | uint32_t reserved_25_31:7; |
787 | uint32_t dlls_c:1; | 1130 | uint32_t dlls_c:1; |
788 | uint32_t emis:1; | 1131 | uint32_t emis:1; |
@@ -805,6 +1148,30 @@ union cvmx_pciercx_cfg034 { | |||
805 | uint32_t mrls_en:1; | 1148 | uint32_t mrls_en:1; |
806 | uint32_t pf_en:1; | 1149 | uint32_t pf_en:1; |
807 | uint32_t abp_en:1; | 1150 | uint32_t abp_en:1; |
1151 | #else | ||
1152 | uint32_t abp_en:1; | ||
1153 | uint32_t pf_en:1; | ||
1154 | uint32_t mrls_en:1; | ||
1155 | uint32_t pd_en:1; | ||
1156 | uint32_t ccint_en:1; | ||
1157 | uint32_t hpint_en:1; | ||
1158 | uint32_t aic:2; | ||
1159 | uint32_t pic:2; | ||
1160 | uint32_t pcc:1; | ||
1161 | uint32_t emic:1; | ||
1162 | uint32_t dlls_en:1; | ||
1163 | uint32_t reserved_13_15:3; | ||
1164 | uint32_t abp_d:1; | ||
1165 | uint32_t pf_d:1; | ||
1166 | uint32_t mrls_c:1; | ||
1167 | uint32_t pd_c:1; | ||
1168 | uint32_t ccint_d:1; | ||
1169 | uint32_t mrlss:1; | ||
1170 | uint32_t pds:1; | ||
1171 | uint32_t emis:1; | ||
1172 | uint32_t dlls_c:1; | ||
1173 | uint32_t reserved_25_31:7; | ||
1174 | #endif | ||
808 | } s; | 1175 | } s; |
809 | struct cvmx_pciercx_cfg034_s cn52xx; | 1176 | struct cvmx_pciercx_cfg034_s cn52xx; |
810 | struct cvmx_pciercx_cfg034_s cn52xxp1; | 1177 | struct cvmx_pciercx_cfg034_s cn52xxp1; |
@@ -816,11 +1183,13 @@ union cvmx_pciercx_cfg034 { | |||
816 | struct cvmx_pciercx_cfg034_s cn66xx; | 1183 | struct cvmx_pciercx_cfg034_s cn66xx; |
817 | struct cvmx_pciercx_cfg034_s cn68xx; | 1184 | struct cvmx_pciercx_cfg034_s cn68xx; |
818 | struct cvmx_pciercx_cfg034_s cn68xxp1; | 1185 | struct cvmx_pciercx_cfg034_s cn68xxp1; |
1186 | struct cvmx_pciercx_cfg034_s cnf71xx; | ||
819 | }; | 1187 | }; |
820 | 1188 | ||
821 | union cvmx_pciercx_cfg035 { | 1189 | union cvmx_pciercx_cfg035 { |
822 | uint32_t u32; | 1190 | uint32_t u32; |
823 | struct cvmx_pciercx_cfg035_s { | 1191 | struct cvmx_pciercx_cfg035_s { |
1192 | #ifdef __BIG_ENDIAN_BITFIELD | ||
824 | uint32_t reserved_17_31:15; | 1193 | uint32_t reserved_17_31:15; |
825 | uint32_t crssv:1; | 1194 | uint32_t crssv:1; |
826 | uint32_t reserved_5_15:11; | 1195 | uint32_t reserved_5_15:11; |
@@ -829,6 +1198,16 @@ union cvmx_pciercx_cfg035 { | |||
829 | uint32_t sefee:1; | 1198 | uint32_t sefee:1; |
830 | uint32_t senfee:1; | 1199 | uint32_t senfee:1; |
831 | uint32_t secee:1; | 1200 | uint32_t secee:1; |
1201 | #else | ||
1202 | uint32_t secee:1; | ||
1203 | uint32_t senfee:1; | ||
1204 | uint32_t sefee:1; | ||
1205 | uint32_t pmeie:1; | ||
1206 | uint32_t crssve:1; | ||
1207 | uint32_t reserved_5_15:11; | ||
1208 | uint32_t crssv:1; | ||
1209 | uint32_t reserved_17_31:15; | ||
1210 | #endif | ||
832 | } s; | 1211 | } s; |
833 | struct cvmx_pciercx_cfg035_s cn52xx; | 1212 | struct cvmx_pciercx_cfg035_s cn52xx; |
834 | struct cvmx_pciercx_cfg035_s cn52xxp1; | 1213 | struct cvmx_pciercx_cfg035_s cn52xxp1; |
@@ -840,15 +1219,23 @@ union cvmx_pciercx_cfg035 { | |||
840 | struct cvmx_pciercx_cfg035_s cn66xx; | 1219 | struct cvmx_pciercx_cfg035_s cn66xx; |
841 | struct cvmx_pciercx_cfg035_s cn68xx; | 1220 | struct cvmx_pciercx_cfg035_s cn68xx; |
842 | struct cvmx_pciercx_cfg035_s cn68xxp1; | 1221 | struct cvmx_pciercx_cfg035_s cn68xxp1; |
1222 | struct cvmx_pciercx_cfg035_s cnf71xx; | ||
843 | }; | 1223 | }; |
844 | 1224 | ||
845 | union cvmx_pciercx_cfg036 { | 1225 | union cvmx_pciercx_cfg036 { |
846 | uint32_t u32; | 1226 | uint32_t u32; |
847 | struct cvmx_pciercx_cfg036_s { | 1227 | struct cvmx_pciercx_cfg036_s { |
1228 | #ifdef __BIG_ENDIAN_BITFIELD | ||
848 | uint32_t reserved_18_31:14; | 1229 | uint32_t reserved_18_31:14; |
849 | uint32_t pme_pend:1; | 1230 | uint32_t pme_pend:1; |
850 | uint32_t pme_stat:1; | 1231 | uint32_t pme_stat:1; |
851 | uint32_t pme_rid:16; | 1232 | uint32_t pme_rid:16; |
1233 | #else | ||
1234 | uint32_t pme_rid:16; | ||
1235 | uint32_t pme_stat:1; | ||
1236 | uint32_t pme_pend:1; | ||
1237 | uint32_t reserved_18_31:14; | ||
1238 | #endif | ||
852 | } s; | 1239 | } s; |
853 | struct cvmx_pciercx_cfg036_s cn52xx; | 1240 | struct cvmx_pciercx_cfg036_s cn52xx; |
854 | struct cvmx_pciercx_cfg036_s cn52xxp1; | 1241 | struct cvmx_pciercx_cfg036_s cn52xxp1; |
@@ -860,14 +1247,17 @@ union cvmx_pciercx_cfg036 { | |||
860 | struct cvmx_pciercx_cfg036_s cn66xx; | 1247 | struct cvmx_pciercx_cfg036_s cn66xx; |
861 | struct cvmx_pciercx_cfg036_s cn68xx; | 1248 | struct cvmx_pciercx_cfg036_s cn68xx; |
862 | struct cvmx_pciercx_cfg036_s cn68xxp1; | 1249 | struct cvmx_pciercx_cfg036_s cn68xxp1; |
1250 | struct cvmx_pciercx_cfg036_s cnf71xx; | ||
863 | }; | 1251 | }; |
864 | 1252 | ||
865 | union cvmx_pciercx_cfg037 { | 1253 | union cvmx_pciercx_cfg037 { |
866 | uint32_t u32; | 1254 | uint32_t u32; |
867 | struct cvmx_pciercx_cfg037_s { | 1255 | struct cvmx_pciercx_cfg037_s { |
868 | uint32_t reserved_14_31:18; | 1256 | #ifdef __BIG_ENDIAN_BITFIELD |
869 | uint32_t tph:2; | 1257 | uint32_t reserved_20_31:12; |
870 | uint32_t reserved_11_11:1; | 1258 | uint32_t obffs:2; |
1259 | uint32_t reserved_12_17:6; | ||
1260 | uint32_t ltrs:1; | ||
871 | uint32_t noroprpr:1; | 1261 | uint32_t noroprpr:1; |
872 | uint32_t atom128s:1; | 1262 | uint32_t atom128s:1; |
873 | uint32_t atom64s:1; | 1263 | uint32_t atom64s:1; |
@@ -876,16 +1266,37 @@ union cvmx_pciercx_cfg037 { | |||
876 | uint32_t reserved_5_5:1; | 1266 | uint32_t reserved_5_5:1; |
877 | uint32_t ctds:1; | 1267 | uint32_t ctds:1; |
878 | uint32_t ctrs:4; | 1268 | uint32_t ctrs:4; |
1269 | #else | ||
1270 | uint32_t ctrs:4; | ||
1271 | uint32_t ctds:1; | ||
1272 | uint32_t reserved_5_5:1; | ||
1273 | uint32_t atom_ops:1; | ||
1274 | uint32_t atom32s:1; | ||
1275 | uint32_t atom64s:1; | ||
1276 | uint32_t atom128s:1; | ||
1277 | uint32_t noroprpr:1; | ||
1278 | uint32_t ltrs:1; | ||
1279 | uint32_t reserved_12_17:6; | ||
1280 | uint32_t obffs:2; | ||
1281 | uint32_t reserved_20_31:12; | ||
1282 | #endif | ||
879 | } s; | 1283 | } s; |
880 | struct cvmx_pciercx_cfg037_cn52xx { | 1284 | struct cvmx_pciercx_cfg037_cn52xx { |
1285 | #ifdef __BIG_ENDIAN_BITFIELD | ||
881 | uint32_t reserved_5_31:27; | 1286 | uint32_t reserved_5_31:27; |
882 | uint32_t ctds:1; | 1287 | uint32_t ctds:1; |
883 | uint32_t ctrs:4; | 1288 | uint32_t ctrs:4; |
1289 | #else | ||
1290 | uint32_t ctrs:4; | ||
1291 | uint32_t ctds:1; | ||
1292 | uint32_t reserved_5_31:27; | ||
1293 | #endif | ||
884 | } cn52xx; | 1294 | } cn52xx; |
885 | struct cvmx_pciercx_cfg037_cn52xx cn52xxp1; | 1295 | struct cvmx_pciercx_cfg037_cn52xx cn52xxp1; |
886 | struct cvmx_pciercx_cfg037_cn52xx cn56xx; | 1296 | struct cvmx_pciercx_cfg037_cn52xx cn56xx; |
887 | struct cvmx_pciercx_cfg037_cn52xx cn56xxp1; | 1297 | struct cvmx_pciercx_cfg037_cn52xx cn56xxp1; |
888 | struct cvmx_pciercx_cfg037_cn61xx { | 1298 | struct cvmx_pciercx_cfg037_cn61xx { |
1299 | #ifdef __BIG_ENDIAN_BITFIELD | ||
889 | uint32_t reserved_14_31:18; | 1300 | uint32_t reserved_14_31:18; |
890 | uint32_t tph:2; | 1301 | uint32_t tph:2; |
891 | uint32_t reserved_11_11:1; | 1302 | uint32_t reserved_11_11:1; |
@@ -897,10 +1308,24 @@ union cvmx_pciercx_cfg037 { | |||
897 | uint32_t ari_fw:1; | 1308 | uint32_t ari_fw:1; |
898 | uint32_t ctds:1; | 1309 | uint32_t ctds:1; |
899 | uint32_t ctrs:4; | 1310 | uint32_t ctrs:4; |
1311 | #else | ||
1312 | uint32_t ctrs:4; | ||
1313 | uint32_t ctds:1; | ||
1314 | uint32_t ari_fw:1; | ||
1315 | uint32_t atom_ops:1; | ||
1316 | uint32_t atom32s:1; | ||
1317 | uint32_t atom64s:1; | ||
1318 | uint32_t atom128s:1; | ||
1319 | uint32_t noroprpr:1; | ||
1320 | uint32_t reserved_11_11:1; | ||
1321 | uint32_t tph:2; | ||
1322 | uint32_t reserved_14_31:18; | ||
1323 | #endif | ||
900 | } cn61xx; | 1324 | } cn61xx; |
901 | struct cvmx_pciercx_cfg037_cn52xx cn63xx; | 1325 | struct cvmx_pciercx_cfg037_cn52xx cn63xx; |
902 | struct cvmx_pciercx_cfg037_cn52xx cn63xxp1; | 1326 | struct cvmx_pciercx_cfg037_cn52xx cn63xxp1; |
903 | struct cvmx_pciercx_cfg037_cn66xx { | 1327 | struct cvmx_pciercx_cfg037_cn66xx { |
1328 | #ifdef __BIG_ENDIAN_BITFIELD | ||
904 | uint32_t reserved_14_31:18; | 1329 | uint32_t reserved_14_31:18; |
905 | uint32_t tph:2; | 1330 | uint32_t tph:2; |
906 | uint32_t reserved_11_11:1; | 1331 | uint32_t reserved_11_11:1; |
@@ -912,15 +1337,63 @@ union cvmx_pciercx_cfg037 { | |||
912 | uint32_t ari:1; | 1337 | uint32_t ari:1; |
913 | uint32_t ctds:1; | 1338 | uint32_t ctds:1; |
914 | uint32_t ctrs:4; | 1339 | uint32_t ctrs:4; |
1340 | #else | ||
1341 | uint32_t ctrs:4; | ||
1342 | uint32_t ctds:1; | ||
1343 | uint32_t ari:1; | ||
1344 | uint32_t atom_ops:1; | ||
1345 | uint32_t atom32s:1; | ||
1346 | uint32_t atom64s:1; | ||
1347 | uint32_t atom128s:1; | ||
1348 | uint32_t noroprpr:1; | ||
1349 | uint32_t reserved_11_11:1; | ||
1350 | uint32_t tph:2; | ||
1351 | uint32_t reserved_14_31:18; | ||
1352 | #endif | ||
915 | } cn66xx; | 1353 | } cn66xx; |
916 | struct cvmx_pciercx_cfg037_cn66xx cn68xx; | 1354 | struct cvmx_pciercx_cfg037_cn66xx cn68xx; |
917 | struct cvmx_pciercx_cfg037_cn66xx cn68xxp1; | 1355 | struct cvmx_pciercx_cfg037_cn66xx cn68xxp1; |
1356 | struct cvmx_pciercx_cfg037_cnf71xx { | ||
1357 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1358 | uint32_t reserved_20_31:12; | ||
1359 | uint32_t obffs:2; | ||
1360 | uint32_t reserved_14_17:4; | ||
1361 | uint32_t tphs:2; | ||
1362 | uint32_t ltrs:1; | ||
1363 | uint32_t noroprpr:1; | ||
1364 | uint32_t atom128s:1; | ||
1365 | uint32_t atom64s:1; | ||
1366 | uint32_t atom32s:1; | ||
1367 | uint32_t atom_ops:1; | ||
1368 | uint32_t ari_fw:1; | ||
1369 | uint32_t ctds:1; | ||
1370 | uint32_t ctrs:4; | ||
1371 | #else | ||
1372 | uint32_t ctrs:4; | ||
1373 | uint32_t ctds:1; | ||
1374 | uint32_t ari_fw:1; | ||
1375 | uint32_t atom_ops:1; | ||
1376 | uint32_t atom32s:1; | ||
1377 | uint32_t atom64s:1; | ||
1378 | uint32_t atom128s:1; | ||
1379 | uint32_t noroprpr:1; | ||
1380 | uint32_t ltrs:1; | ||
1381 | uint32_t tphs:2; | ||
1382 | uint32_t reserved_14_17:4; | ||
1383 | uint32_t obffs:2; | ||
1384 | uint32_t reserved_20_31:12; | ||
1385 | #endif | ||
1386 | } cnf71xx; | ||
918 | }; | 1387 | }; |
919 | 1388 | ||
920 | union cvmx_pciercx_cfg038 { | 1389 | union cvmx_pciercx_cfg038 { |
921 | uint32_t u32; | 1390 | uint32_t u32; |
922 | struct cvmx_pciercx_cfg038_s { | 1391 | struct cvmx_pciercx_cfg038_s { |
923 | uint32_t reserved_10_31:22; | 1392 | #ifdef __BIG_ENDIAN_BITFIELD |
1393 | uint32_t reserved_15_31:17; | ||
1394 | uint32_t obffe:2; | ||
1395 | uint32_t reserved_11_12:2; | ||
1396 | uint32_t ltre:1; | ||
924 | uint32_t id0_cp:1; | 1397 | uint32_t id0_cp:1; |
925 | uint32_t id0_rq:1; | 1398 | uint32_t id0_rq:1; |
926 | uint32_t atom_op_eb:1; | 1399 | uint32_t atom_op_eb:1; |
@@ -928,33 +1401,84 @@ union cvmx_pciercx_cfg038 { | |||
928 | uint32_t ari:1; | 1401 | uint32_t ari:1; |
929 | uint32_t ctd:1; | 1402 | uint32_t ctd:1; |
930 | uint32_t ctv:4; | 1403 | uint32_t ctv:4; |
1404 | #else | ||
1405 | uint32_t ctv:4; | ||
1406 | uint32_t ctd:1; | ||
1407 | uint32_t ari:1; | ||
1408 | uint32_t atom_op:1; | ||
1409 | uint32_t atom_op_eb:1; | ||
1410 | uint32_t id0_rq:1; | ||
1411 | uint32_t id0_cp:1; | ||
1412 | uint32_t ltre:1; | ||
1413 | uint32_t reserved_11_12:2; | ||
1414 | uint32_t obffe:2; | ||
1415 | uint32_t reserved_15_31:17; | ||
1416 | #endif | ||
931 | } s; | 1417 | } s; |
932 | struct cvmx_pciercx_cfg038_cn52xx { | 1418 | struct cvmx_pciercx_cfg038_cn52xx { |
1419 | #ifdef __BIG_ENDIAN_BITFIELD | ||
933 | uint32_t reserved_5_31:27; | 1420 | uint32_t reserved_5_31:27; |
934 | uint32_t ctd:1; | 1421 | uint32_t ctd:1; |
935 | uint32_t ctv:4; | 1422 | uint32_t ctv:4; |
1423 | #else | ||
1424 | uint32_t ctv:4; | ||
1425 | uint32_t ctd:1; | ||
1426 | uint32_t reserved_5_31:27; | ||
1427 | #endif | ||
936 | } cn52xx; | 1428 | } cn52xx; |
937 | struct cvmx_pciercx_cfg038_cn52xx cn52xxp1; | 1429 | struct cvmx_pciercx_cfg038_cn52xx cn52xxp1; |
938 | struct cvmx_pciercx_cfg038_cn52xx cn56xx; | 1430 | struct cvmx_pciercx_cfg038_cn52xx cn56xx; |
939 | struct cvmx_pciercx_cfg038_cn52xx cn56xxp1; | 1431 | struct cvmx_pciercx_cfg038_cn52xx cn56xxp1; |
940 | struct cvmx_pciercx_cfg038_s cn61xx; | 1432 | struct cvmx_pciercx_cfg038_cn61xx { |
1433 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1434 | uint32_t reserved_10_31:22; | ||
1435 | uint32_t id0_cp:1; | ||
1436 | uint32_t id0_rq:1; | ||
1437 | uint32_t atom_op_eb:1; | ||
1438 | uint32_t atom_op:1; | ||
1439 | uint32_t ari:1; | ||
1440 | uint32_t ctd:1; | ||
1441 | uint32_t ctv:4; | ||
1442 | #else | ||
1443 | uint32_t ctv:4; | ||
1444 | uint32_t ctd:1; | ||
1445 | uint32_t ari:1; | ||
1446 | uint32_t atom_op:1; | ||
1447 | uint32_t atom_op_eb:1; | ||
1448 | uint32_t id0_rq:1; | ||
1449 | uint32_t id0_cp:1; | ||
1450 | uint32_t reserved_10_31:22; | ||
1451 | #endif | ||
1452 | } cn61xx; | ||
941 | struct cvmx_pciercx_cfg038_cn52xx cn63xx; | 1453 | struct cvmx_pciercx_cfg038_cn52xx cn63xx; |
942 | struct cvmx_pciercx_cfg038_cn52xx cn63xxp1; | 1454 | struct cvmx_pciercx_cfg038_cn52xx cn63xxp1; |
943 | struct cvmx_pciercx_cfg038_s cn66xx; | 1455 | struct cvmx_pciercx_cfg038_cn61xx cn66xx; |
944 | struct cvmx_pciercx_cfg038_s cn68xx; | 1456 | struct cvmx_pciercx_cfg038_cn61xx cn68xx; |
945 | struct cvmx_pciercx_cfg038_s cn68xxp1; | 1457 | struct cvmx_pciercx_cfg038_cn61xx cn68xxp1; |
1458 | struct cvmx_pciercx_cfg038_s cnf71xx; | ||
946 | }; | 1459 | }; |
947 | 1460 | ||
948 | union cvmx_pciercx_cfg039 { | 1461 | union cvmx_pciercx_cfg039 { |
949 | uint32_t u32; | 1462 | uint32_t u32; |
950 | struct cvmx_pciercx_cfg039_s { | 1463 | struct cvmx_pciercx_cfg039_s { |
1464 | #ifdef __BIG_ENDIAN_BITFIELD | ||
951 | uint32_t reserved_9_31:23; | 1465 | uint32_t reserved_9_31:23; |
952 | uint32_t cls:1; | 1466 | uint32_t cls:1; |
953 | uint32_t slsv:7; | 1467 | uint32_t slsv:7; |
954 | uint32_t reserved_0_0:1; | 1468 | uint32_t reserved_0_0:1; |
1469 | #else | ||
1470 | uint32_t reserved_0_0:1; | ||
1471 | uint32_t slsv:7; | ||
1472 | uint32_t cls:1; | ||
1473 | uint32_t reserved_9_31:23; | ||
1474 | #endif | ||
955 | } s; | 1475 | } s; |
956 | struct cvmx_pciercx_cfg039_cn52xx { | 1476 | struct cvmx_pciercx_cfg039_cn52xx { |
1477 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1478 | uint32_t reserved_0_31:32; | ||
1479 | #else | ||
957 | uint32_t reserved_0_31:32; | 1480 | uint32_t reserved_0_31:32; |
1481 | #endif | ||
958 | } cn52xx; | 1482 | } cn52xx; |
959 | struct cvmx_pciercx_cfg039_cn52xx cn52xxp1; | 1483 | struct cvmx_pciercx_cfg039_cn52xx cn52xxp1; |
960 | struct cvmx_pciercx_cfg039_cn52xx cn56xx; | 1484 | struct cvmx_pciercx_cfg039_cn52xx cn56xx; |
@@ -965,11 +1489,13 @@ union cvmx_pciercx_cfg039 { | |||
965 | struct cvmx_pciercx_cfg039_s cn66xx; | 1489 | struct cvmx_pciercx_cfg039_s cn66xx; |
966 | struct cvmx_pciercx_cfg039_s cn68xx; | 1490 | struct cvmx_pciercx_cfg039_s cn68xx; |
967 | struct cvmx_pciercx_cfg039_s cn68xxp1; | 1491 | struct cvmx_pciercx_cfg039_s cn68xxp1; |
1492 | struct cvmx_pciercx_cfg039_s cnf71xx; | ||
968 | }; | 1493 | }; |
969 | 1494 | ||
970 | union cvmx_pciercx_cfg040 { | 1495 | union cvmx_pciercx_cfg040 { |
971 | uint32_t u32; | 1496 | uint32_t u32; |
972 | struct cvmx_pciercx_cfg040_s { | 1497 | struct cvmx_pciercx_cfg040_s { |
1498 | #ifdef __BIG_ENDIAN_BITFIELD | ||
973 | uint32_t reserved_17_31:15; | 1499 | uint32_t reserved_17_31:15; |
974 | uint32_t cdl:1; | 1500 | uint32_t cdl:1; |
975 | uint32_t reserved_13_15:3; | 1501 | uint32_t reserved_13_15:3; |
@@ -981,9 +1507,26 @@ union cvmx_pciercx_cfg040 { | |||
981 | uint32_t hasd:1; | 1507 | uint32_t hasd:1; |
982 | uint32_t ec:1; | 1508 | uint32_t ec:1; |
983 | uint32_t tls:4; | 1509 | uint32_t tls:4; |
1510 | #else | ||
1511 | uint32_t tls:4; | ||
1512 | uint32_t ec:1; | ||
1513 | uint32_t hasd:1; | ||
1514 | uint32_t sde:1; | ||
1515 | uint32_t tm:3; | ||
1516 | uint32_t emc:1; | ||
1517 | uint32_t csos:1; | ||
1518 | uint32_t cde:1; | ||
1519 | uint32_t reserved_13_15:3; | ||
1520 | uint32_t cdl:1; | ||
1521 | uint32_t reserved_17_31:15; | ||
1522 | #endif | ||
984 | } s; | 1523 | } s; |
985 | struct cvmx_pciercx_cfg040_cn52xx { | 1524 | struct cvmx_pciercx_cfg040_cn52xx { |
1525 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1526 | uint32_t reserved_0_31:32; | ||
1527 | #else | ||
986 | uint32_t reserved_0_31:32; | 1528 | uint32_t reserved_0_31:32; |
1529 | #endif | ||
987 | } cn52xx; | 1530 | } cn52xx; |
988 | struct cvmx_pciercx_cfg040_cn52xx cn52xxp1; | 1531 | struct cvmx_pciercx_cfg040_cn52xx cn52xxp1; |
989 | struct cvmx_pciercx_cfg040_cn52xx cn56xx; | 1532 | struct cvmx_pciercx_cfg040_cn52xx cn56xx; |
@@ -994,12 +1537,17 @@ union cvmx_pciercx_cfg040 { | |||
994 | struct cvmx_pciercx_cfg040_s cn66xx; | 1537 | struct cvmx_pciercx_cfg040_s cn66xx; |
995 | struct cvmx_pciercx_cfg040_s cn68xx; | 1538 | struct cvmx_pciercx_cfg040_s cn68xx; |
996 | struct cvmx_pciercx_cfg040_s cn68xxp1; | 1539 | struct cvmx_pciercx_cfg040_s cn68xxp1; |
1540 | struct cvmx_pciercx_cfg040_s cnf71xx; | ||
997 | }; | 1541 | }; |
998 | 1542 | ||
999 | union cvmx_pciercx_cfg041 { | 1543 | union cvmx_pciercx_cfg041 { |
1000 | uint32_t u32; | 1544 | uint32_t u32; |
1001 | struct cvmx_pciercx_cfg041_s { | 1545 | struct cvmx_pciercx_cfg041_s { |
1546 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1547 | uint32_t reserved_0_31:32; | ||
1548 | #else | ||
1002 | uint32_t reserved_0_31:32; | 1549 | uint32_t reserved_0_31:32; |
1550 | #endif | ||
1003 | } s; | 1551 | } s; |
1004 | struct cvmx_pciercx_cfg041_s cn52xx; | 1552 | struct cvmx_pciercx_cfg041_s cn52xx; |
1005 | struct cvmx_pciercx_cfg041_s cn52xxp1; | 1553 | struct cvmx_pciercx_cfg041_s cn52xxp1; |
@@ -1011,12 +1559,17 @@ union cvmx_pciercx_cfg041 { | |||
1011 | struct cvmx_pciercx_cfg041_s cn66xx; | 1559 | struct cvmx_pciercx_cfg041_s cn66xx; |
1012 | struct cvmx_pciercx_cfg041_s cn68xx; | 1560 | struct cvmx_pciercx_cfg041_s cn68xx; |
1013 | struct cvmx_pciercx_cfg041_s cn68xxp1; | 1561 | struct cvmx_pciercx_cfg041_s cn68xxp1; |
1562 | struct cvmx_pciercx_cfg041_s cnf71xx; | ||
1014 | }; | 1563 | }; |
1015 | 1564 | ||
1016 | union cvmx_pciercx_cfg042 { | 1565 | union cvmx_pciercx_cfg042 { |
1017 | uint32_t u32; | 1566 | uint32_t u32; |
1018 | struct cvmx_pciercx_cfg042_s { | 1567 | struct cvmx_pciercx_cfg042_s { |
1568 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1569 | uint32_t reserved_0_31:32; | ||
1570 | #else | ||
1019 | uint32_t reserved_0_31:32; | 1571 | uint32_t reserved_0_31:32; |
1572 | #endif | ||
1020 | } s; | 1573 | } s; |
1021 | struct cvmx_pciercx_cfg042_s cn52xx; | 1574 | struct cvmx_pciercx_cfg042_s cn52xx; |
1022 | struct cvmx_pciercx_cfg042_s cn52xxp1; | 1575 | struct cvmx_pciercx_cfg042_s cn52xxp1; |
@@ -1028,14 +1581,21 @@ union cvmx_pciercx_cfg042 { | |||
1028 | struct cvmx_pciercx_cfg042_s cn66xx; | 1581 | struct cvmx_pciercx_cfg042_s cn66xx; |
1029 | struct cvmx_pciercx_cfg042_s cn68xx; | 1582 | struct cvmx_pciercx_cfg042_s cn68xx; |
1030 | struct cvmx_pciercx_cfg042_s cn68xxp1; | 1583 | struct cvmx_pciercx_cfg042_s cn68xxp1; |
1584 | struct cvmx_pciercx_cfg042_s cnf71xx; | ||
1031 | }; | 1585 | }; |
1032 | 1586 | ||
1033 | union cvmx_pciercx_cfg064 { | 1587 | union cvmx_pciercx_cfg064 { |
1034 | uint32_t u32; | 1588 | uint32_t u32; |
1035 | struct cvmx_pciercx_cfg064_s { | 1589 | struct cvmx_pciercx_cfg064_s { |
1590 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1036 | uint32_t nco:12; | 1591 | uint32_t nco:12; |
1037 | uint32_t cv:4; | 1592 | uint32_t cv:4; |
1038 | uint32_t pcieec:16; | 1593 | uint32_t pcieec:16; |
1594 | #else | ||
1595 | uint32_t pcieec:16; | ||
1596 | uint32_t cv:4; | ||
1597 | uint32_t nco:12; | ||
1598 | #endif | ||
1039 | } s; | 1599 | } s; |
1040 | struct cvmx_pciercx_cfg064_s cn52xx; | 1600 | struct cvmx_pciercx_cfg064_s cn52xx; |
1041 | struct cvmx_pciercx_cfg064_s cn52xxp1; | 1601 | struct cvmx_pciercx_cfg064_s cn52xxp1; |
@@ -1047,14 +1607,18 @@ union cvmx_pciercx_cfg064 { | |||
1047 | struct cvmx_pciercx_cfg064_s cn66xx; | 1607 | struct cvmx_pciercx_cfg064_s cn66xx; |
1048 | struct cvmx_pciercx_cfg064_s cn68xx; | 1608 | struct cvmx_pciercx_cfg064_s cn68xx; |
1049 | struct cvmx_pciercx_cfg064_s cn68xxp1; | 1609 | struct cvmx_pciercx_cfg064_s cn68xxp1; |
1610 | struct cvmx_pciercx_cfg064_s cnf71xx; | ||
1050 | }; | 1611 | }; |
1051 | 1612 | ||
1052 | union cvmx_pciercx_cfg065 { | 1613 | union cvmx_pciercx_cfg065 { |
1053 | uint32_t u32; | 1614 | uint32_t u32; |
1054 | struct cvmx_pciercx_cfg065_s { | 1615 | struct cvmx_pciercx_cfg065_s { |
1616 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1055 | uint32_t reserved_25_31:7; | 1617 | uint32_t reserved_25_31:7; |
1056 | uint32_t uatombs:1; | 1618 | uint32_t uatombs:1; |
1057 | uint32_t reserved_21_23:3; | 1619 | uint32_t reserved_23_23:1; |
1620 | uint32_t ucies:1; | ||
1621 | uint32_t reserved_21_21:1; | ||
1058 | uint32_t ures:1; | 1622 | uint32_t ures:1; |
1059 | uint32_t ecrces:1; | 1623 | uint32_t ecrces:1; |
1060 | uint32_t mtlps:1; | 1624 | uint32_t mtlps:1; |
@@ -1068,8 +1632,29 @@ union cvmx_pciercx_cfg065 { | |||
1068 | uint32_t sdes:1; | 1632 | uint32_t sdes:1; |
1069 | uint32_t dlpes:1; | 1633 | uint32_t dlpes:1; |
1070 | uint32_t reserved_0_3:4; | 1634 | uint32_t reserved_0_3:4; |
1635 | #else | ||
1636 | uint32_t reserved_0_3:4; | ||
1637 | uint32_t dlpes:1; | ||
1638 | uint32_t sdes:1; | ||
1639 | uint32_t reserved_6_11:6; | ||
1640 | uint32_t ptlps:1; | ||
1641 | uint32_t fcpes:1; | ||
1642 | uint32_t cts:1; | ||
1643 | uint32_t cas:1; | ||
1644 | uint32_t ucs:1; | ||
1645 | uint32_t ros:1; | ||
1646 | uint32_t mtlps:1; | ||
1647 | uint32_t ecrces:1; | ||
1648 | uint32_t ures:1; | ||
1649 | uint32_t reserved_21_21:1; | ||
1650 | uint32_t ucies:1; | ||
1651 | uint32_t reserved_23_23:1; | ||
1652 | uint32_t uatombs:1; | ||
1653 | uint32_t reserved_25_31:7; | ||
1654 | #endif | ||
1071 | } s; | 1655 | } s; |
1072 | struct cvmx_pciercx_cfg065_cn52xx { | 1656 | struct cvmx_pciercx_cfg065_cn52xx { |
1657 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1073 | uint32_t reserved_21_31:11; | 1658 | uint32_t reserved_21_31:11; |
1074 | uint32_t ures:1; | 1659 | uint32_t ures:1; |
1075 | uint32_t ecrces:1; | 1660 | uint32_t ecrces:1; |
@@ -1084,24 +1669,80 @@ union cvmx_pciercx_cfg065 { | |||
1084 | uint32_t sdes:1; | 1669 | uint32_t sdes:1; |
1085 | uint32_t dlpes:1; | 1670 | uint32_t dlpes:1; |
1086 | uint32_t reserved_0_3:4; | 1671 | uint32_t reserved_0_3:4; |
1672 | #else | ||
1673 | uint32_t reserved_0_3:4; | ||
1674 | uint32_t dlpes:1; | ||
1675 | uint32_t sdes:1; | ||
1676 | uint32_t reserved_6_11:6; | ||
1677 | uint32_t ptlps:1; | ||
1678 | uint32_t fcpes:1; | ||
1679 | uint32_t cts:1; | ||
1680 | uint32_t cas:1; | ||
1681 | uint32_t ucs:1; | ||
1682 | uint32_t ros:1; | ||
1683 | uint32_t mtlps:1; | ||
1684 | uint32_t ecrces:1; | ||
1685 | uint32_t ures:1; | ||
1686 | uint32_t reserved_21_31:11; | ||
1687 | #endif | ||
1087 | } cn52xx; | 1688 | } cn52xx; |
1088 | struct cvmx_pciercx_cfg065_cn52xx cn52xxp1; | 1689 | struct cvmx_pciercx_cfg065_cn52xx cn52xxp1; |
1089 | struct cvmx_pciercx_cfg065_cn52xx cn56xx; | 1690 | struct cvmx_pciercx_cfg065_cn52xx cn56xx; |
1090 | struct cvmx_pciercx_cfg065_cn52xx cn56xxp1; | 1691 | struct cvmx_pciercx_cfg065_cn52xx cn56xxp1; |
1091 | struct cvmx_pciercx_cfg065_s cn61xx; | 1692 | struct cvmx_pciercx_cfg065_cn61xx { |
1693 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1694 | uint32_t reserved_25_31:7; | ||
1695 | uint32_t uatombs:1; | ||
1696 | uint32_t reserved_21_23:3; | ||
1697 | uint32_t ures:1; | ||
1698 | uint32_t ecrces:1; | ||
1699 | uint32_t mtlps:1; | ||
1700 | uint32_t ros:1; | ||
1701 | uint32_t ucs:1; | ||
1702 | uint32_t cas:1; | ||
1703 | uint32_t cts:1; | ||
1704 | uint32_t fcpes:1; | ||
1705 | uint32_t ptlps:1; | ||
1706 | uint32_t reserved_6_11:6; | ||
1707 | uint32_t sdes:1; | ||
1708 | uint32_t dlpes:1; | ||
1709 | uint32_t reserved_0_3:4; | ||
1710 | #else | ||
1711 | uint32_t reserved_0_3:4; | ||
1712 | uint32_t dlpes:1; | ||
1713 | uint32_t sdes:1; | ||
1714 | uint32_t reserved_6_11:6; | ||
1715 | uint32_t ptlps:1; | ||
1716 | uint32_t fcpes:1; | ||
1717 | uint32_t cts:1; | ||
1718 | uint32_t cas:1; | ||
1719 | uint32_t ucs:1; | ||
1720 | uint32_t ros:1; | ||
1721 | uint32_t mtlps:1; | ||
1722 | uint32_t ecrces:1; | ||
1723 | uint32_t ures:1; | ||
1724 | uint32_t reserved_21_23:3; | ||
1725 | uint32_t uatombs:1; | ||
1726 | uint32_t reserved_25_31:7; | ||
1727 | #endif | ||
1728 | } cn61xx; | ||
1092 | struct cvmx_pciercx_cfg065_cn52xx cn63xx; | 1729 | struct cvmx_pciercx_cfg065_cn52xx cn63xx; |
1093 | struct cvmx_pciercx_cfg065_cn52xx cn63xxp1; | 1730 | struct cvmx_pciercx_cfg065_cn52xx cn63xxp1; |
1094 | struct cvmx_pciercx_cfg065_s cn66xx; | 1731 | struct cvmx_pciercx_cfg065_cn61xx cn66xx; |
1095 | struct cvmx_pciercx_cfg065_s cn68xx; | 1732 | struct cvmx_pciercx_cfg065_cn61xx cn68xx; |
1096 | struct cvmx_pciercx_cfg065_cn52xx cn68xxp1; | 1733 | struct cvmx_pciercx_cfg065_cn52xx cn68xxp1; |
1734 | struct cvmx_pciercx_cfg065_s cnf71xx; | ||
1097 | }; | 1735 | }; |
1098 | 1736 | ||
1099 | union cvmx_pciercx_cfg066 { | 1737 | union cvmx_pciercx_cfg066 { |
1100 | uint32_t u32; | 1738 | uint32_t u32; |
1101 | struct cvmx_pciercx_cfg066_s { | 1739 | struct cvmx_pciercx_cfg066_s { |
1740 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1102 | uint32_t reserved_25_31:7; | 1741 | uint32_t reserved_25_31:7; |
1103 | uint32_t uatombm:1; | 1742 | uint32_t uatombm:1; |
1104 | uint32_t reserved_21_23:3; | 1743 | uint32_t reserved_23_23:1; |
1744 | uint32_t uciem:1; | ||
1745 | uint32_t reserved_21_21:1; | ||
1105 | uint32_t urem:1; | 1746 | uint32_t urem:1; |
1106 | uint32_t ecrcem:1; | 1747 | uint32_t ecrcem:1; |
1107 | uint32_t mtlpm:1; | 1748 | uint32_t mtlpm:1; |
@@ -1115,8 +1756,29 @@ union cvmx_pciercx_cfg066 { | |||
1115 | uint32_t sdem:1; | 1756 | uint32_t sdem:1; |
1116 | uint32_t dlpem:1; | 1757 | uint32_t dlpem:1; |
1117 | uint32_t reserved_0_3:4; | 1758 | uint32_t reserved_0_3:4; |
1759 | #else | ||
1760 | uint32_t reserved_0_3:4; | ||
1761 | uint32_t dlpem:1; | ||
1762 | uint32_t sdem:1; | ||
1763 | uint32_t reserved_6_11:6; | ||
1764 | uint32_t ptlpm:1; | ||
1765 | uint32_t fcpem:1; | ||
1766 | uint32_t ctm:1; | ||
1767 | uint32_t cam:1; | ||
1768 | uint32_t ucm:1; | ||
1769 | uint32_t rom:1; | ||
1770 | uint32_t mtlpm:1; | ||
1771 | uint32_t ecrcem:1; | ||
1772 | uint32_t urem:1; | ||
1773 | uint32_t reserved_21_21:1; | ||
1774 | uint32_t uciem:1; | ||
1775 | uint32_t reserved_23_23:1; | ||
1776 | uint32_t uatombm:1; | ||
1777 | uint32_t reserved_25_31:7; | ||
1778 | #endif | ||
1118 | } s; | 1779 | } s; |
1119 | struct cvmx_pciercx_cfg066_cn52xx { | 1780 | struct cvmx_pciercx_cfg066_cn52xx { |
1781 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1120 | uint32_t reserved_21_31:11; | 1782 | uint32_t reserved_21_31:11; |
1121 | uint32_t urem:1; | 1783 | uint32_t urem:1; |
1122 | uint32_t ecrcem:1; | 1784 | uint32_t ecrcem:1; |
@@ -1131,24 +1793,80 @@ union cvmx_pciercx_cfg066 { | |||
1131 | uint32_t sdem:1; | 1793 | uint32_t sdem:1; |
1132 | uint32_t dlpem:1; | 1794 | uint32_t dlpem:1; |
1133 | uint32_t reserved_0_3:4; | 1795 | uint32_t reserved_0_3:4; |
1796 | #else | ||
1797 | uint32_t reserved_0_3:4; | ||
1798 | uint32_t dlpem:1; | ||
1799 | uint32_t sdem:1; | ||
1800 | uint32_t reserved_6_11:6; | ||
1801 | uint32_t ptlpm:1; | ||
1802 | uint32_t fcpem:1; | ||
1803 | uint32_t ctm:1; | ||
1804 | uint32_t cam:1; | ||
1805 | uint32_t ucm:1; | ||
1806 | uint32_t rom:1; | ||
1807 | uint32_t mtlpm:1; | ||
1808 | uint32_t ecrcem:1; | ||
1809 | uint32_t urem:1; | ||
1810 | uint32_t reserved_21_31:11; | ||
1811 | #endif | ||
1134 | } cn52xx; | 1812 | } cn52xx; |
1135 | struct cvmx_pciercx_cfg066_cn52xx cn52xxp1; | 1813 | struct cvmx_pciercx_cfg066_cn52xx cn52xxp1; |
1136 | struct cvmx_pciercx_cfg066_cn52xx cn56xx; | 1814 | struct cvmx_pciercx_cfg066_cn52xx cn56xx; |
1137 | struct cvmx_pciercx_cfg066_cn52xx cn56xxp1; | 1815 | struct cvmx_pciercx_cfg066_cn52xx cn56xxp1; |
1138 | struct cvmx_pciercx_cfg066_s cn61xx; | 1816 | struct cvmx_pciercx_cfg066_cn61xx { |
1817 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1818 | uint32_t reserved_25_31:7; | ||
1819 | uint32_t uatombm:1; | ||
1820 | uint32_t reserved_21_23:3; | ||
1821 | uint32_t urem:1; | ||
1822 | uint32_t ecrcem:1; | ||
1823 | uint32_t mtlpm:1; | ||
1824 | uint32_t rom:1; | ||
1825 | uint32_t ucm:1; | ||
1826 | uint32_t cam:1; | ||
1827 | uint32_t ctm:1; | ||
1828 | uint32_t fcpem:1; | ||
1829 | uint32_t ptlpm:1; | ||
1830 | uint32_t reserved_6_11:6; | ||
1831 | uint32_t sdem:1; | ||
1832 | uint32_t dlpem:1; | ||
1833 | uint32_t reserved_0_3:4; | ||
1834 | #else | ||
1835 | uint32_t reserved_0_3:4; | ||
1836 | uint32_t dlpem:1; | ||
1837 | uint32_t sdem:1; | ||
1838 | uint32_t reserved_6_11:6; | ||
1839 | uint32_t ptlpm:1; | ||
1840 | uint32_t fcpem:1; | ||
1841 | uint32_t ctm:1; | ||
1842 | uint32_t cam:1; | ||
1843 | uint32_t ucm:1; | ||
1844 | uint32_t rom:1; | ||
1845 | uint32_t mtlpm:1; | ||
1846 | uint32_t ecrcem:1; | ||
1847 | uint32_t urem:1; | ||
1848 | uint32_t reserved_21_23:3; | ||
1849 | uint32_t uatombm:1; | ||
1850 | uint32_t reserved_25_31:7; | ||
1851 | #endif | ||
1852 | } cn61xx; | ||
1139 | struct cvmx_pciercx_cfg066_cn52xx cn63xx; | 1853 | struct cvmx_pciercx_cfg066_cn52xx cn63xx; |
1140 | struct cvmx_pciercx_cfg066_cn52xx cn63xxp1; | 1854 | struct cvmx_pciercx_cfg066_cn52xx cn63xxp1; |
1141 | struct cvmx_pciercx_cfg066_s cn66xx; | 1855 | struct cvmx_pciercx_cfg066_cn61xx cn66xx; |
1142 | struct cvmx_pciercx_cfg066_s cn68xx; | 1856 | struct cvmx_pciercx_cfg066_cn61xx cn68xx; |
1143 | struct cvmx_pciercx_cfg066_cn52xx cn68xxp1; | 1857 | struct cvmx_pciercx_cfg066_cn52xx cn68xxp1; |
1858 | struct cvmx_pciercx_cfg066_s cnf71xx; | ||
1144 | }; | 1859 | }; |
1145 | 1860 | ||
1146 | union cvmx_pciercx_cfg067 { | 1861 | union cvmx_pciercx_cfg067 { |
1147 | uint32_t u32; | 1862 | uint32_t u32; |
1148 | struct cvmx_pciercx_cfg067_s { | 1863 | struct cvmx_pciercx_cfg067_s { |
1864 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1149 | uint32_t reserved_25_31:7; | 1865 | uint32_t reserved_25_31:7; |
1150 | uint32_t uatombs:1; | 1866 | uint32_t uatombs:1; |
1151 | uint32_t reserved_21_23:3; | 1867 | uint32_t reserved_23_23:1; |
1868 | uint32_t ucies:1; | ||
1869 | uint32_t reserved_21_21:1; | ||
1152 | uint32_t ures:1; | 1870 | uint32_t ures:1; |
1153 | uint32_t ecrces:1; | 1871 | uint32_t ecrces:1; |
1154 | uint32_t mtlps:1; | 1872 | uint32_t mtlps:1; |
@@ -1162,8 +1880,29 @@ union cvmx_pciercx_cfg067 { | |||
1162 | uint32_t sdes:1; | 1880 | uint32_t sdes:1; |
1163 | uint32_t dlpes:1; | 1881 | uint32_t dlpes:1; |
1164 | uint32_t reserved_0_3:4; | 1882 | uint32_t reserved_0_3:4; |
1883 | #else | ||
1884 | uint32_t reserved_0_3:4; | ||
1885 | uint32_t dlpes:1; | ||
1886 | uint32_t sdes:1; | ||
1887 | uint32_t reserved_6_11:6; | ||
1888 | uint32_t ptlps:1; | ||
1889 | uint32_t fcpes:1; | ||
1890 | uint32_t cts:1; | ||
1891 | uint32_t cas:1; | ||
1892 | uint32_t ucs:1; | ||
1893 | uint32_t ros:1; | ||
1894 | uint32_t mtlps:1; | ||
1895 | uint32_t ecrces:1; | ||
1896 | uint32_t ures:1; | ||
1897 | uint32_t reserved_21_21:1; | ||
1898 | uint32_t ucies:1; | ||
1899 | uint32_t reserved_23_23:1; | ||
1900 | uint32_t uatombs:1; | ||
1901 | uint32_t reserved_25_31:7; | ||
1902 | #endif | ||
1165 | } s; | 1903 | } s; |
1166 | struct cvmx_pciercx_cfg067_cn52xx { | 1904 | struct cvmx_pciercx_cfg067_cn52xx { |
1905 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1167 | uint32_t reserved_21_31:11; | 1906 | uint32_t reserved_21_31:11; |
1168 | uint32_t ures:1; | 1907 | uint32_t ures:1; |
1169 | uint32_t ecrces:1; | 1908 | uint32_t ecrces:1; |
@@ -1178,22 +1917,77 @@ union cvmx_pciercx_cfg067 { | |||
1178 | uint32_t sdes:1; | 1917 | uint32_t sdes:1; |
1179 | uint32_t dlpes:1; | 1918 | uint32_t dlpes:1; |
1180 | uint32_t reserved_0_3:4; | 1919 | uint32_t reserved_0_3:4; |
1920 | #else | ||
1921 | uint32_t reserved_0_3:4; | ||
1922 | uint32_t dlpes:1; | ||
1923 | uint32_t sdes:1; | ||
1924 | uint32_t reserved_6_11:6; | ||
1925 | uint32_t ptlps:1; | ||
1926 | uint32_t fcpes:1; | ||
1927 | uint32_t cts:1; | ||
1928 | uint32_t cas:1; | ||
1929 | uint32_t ucs:1; | ||
1930 | uint32_t ros:1; | ||
1931 | uint32_t mtlps:1; | ||
1932 | uint32_t ecrces:1; | ||
1933 | uint32_t ures:1; | ||
1934 | uint32_t reserved_21_31:11; | ||
1935 | #endif | ||
1181 | } cn52xx; | 1936 | } cn52xx; |
1182 | struct cvmx_pciercx_cfg067_cn52xx cn52xxp1; | 1937 | struct cvmx_pciercx_cfg067_cn52xx cn52xxp1; |
1183 | struct cvmx_pciercx_cfg067_cn52xx cn56xx; | 1938 | struct cvmx_pciercx_cfg067_cn52xx cn56xx; |
1184 | struct cvmx_pciercx_cfg067_cn52xx cn56xxp1; | 1939 | struct cvmx_pciercx_cfg067_cn52xx cn56xxp1; |
1185 | struct cvmx_pciercx_cfg067_s cn61xx; | 1940 | struct cvmx_pciercx_cfg067_cn61xx { |
1941 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1942 | uint32_t reserved_25_31:7; | ||
1943 | uint32_t uatombs:1; | ||
1944 | uint32_t reserved_21_23:3; | ||
1945 | uint32_t ures:1; | ||
1946 | uint32_t ecrces:1; | ||
1947 | uint32_t mtlps:1; | ||
1948 | uint32_t ros:1; | ||
1949 | uint32_t ucs:1; | ||
1950 | uint32_t cas:1; | ||
1951 | uint32_t cts:1; | ||
1952 | uint32_t fcpes:1; | ||
1953 | uint32_t ptlps:1; | ||
1954 | uint32_t reserved_6_11:6; | ||
1955 | uint32_t sdes:1; | ||
1956 | uint32_t dlpes:1; | ||
1957 | uint32_t reserved_0_3:4; | ||
1958 | #else | ||
1959 | uint32_t reserved_0_3:4; | ||
1960 | uint32_t dlpes:1; | ||
1961 | uint32_t sdes:1; | ||
1962 | uint32_t reserved_6_11:6; | ||
1963 | uint32_t ptlps:1; | ||
1964 | uint32_t fcpes:1; | ||
1965 | uint32_t cts:1; | ||
1966 | uint32_t cas:1; | ||
1967 | uint32_t ucs:1; | ||
1968 | uint32_t ros:1; | ||
1969 | uint32_t mtlps:1; | ||
1970 | uint32_t ecrces:1; | ||
1971 | uint32_t ures:1; | ||
1972 | uint32_t reserved_21_23:3; | ||
1973 | uint32_t uatombs:1; | ||
1974 | uint32_t reserved_25_31:7; | ||
1975 | #endif | ||
1976 | } cn61xx; | ||
1186 | struct cvmx_pciercx_cfg067_cn52xx cn63xx; | 1977 | struct cvmx_pciercx_cfg067_cn52xx cn63xx; |
1187 | struct cvmx_pciercx_cfg067_cn52xx cn63xxp1; | 1978 | struct cvmx_pciercx_cfg067_cn52xx cn63xxp1; |
1188 | struct cvmx_pciercx_cfg067_s cn66xx; | 1979 | struct cvmx_pciercx_cfg067_cn61xx cn66xx; |
1189 | struct cvmx_pciercx_cfg067_s cn68xx; | 1980 | struct cvmx_pciercx_cfg067_cn61xx cn68xx; |
1190 | struct cvmx_pciercx_cfg067_cn52xx cn68xxp1; | 1981 | struct cvmx_pciercx_cfg067_cn52xx cn68xxp1; |
1982 | struct cvmx_pciercx_cfg067_s cnf71xx; | ||
1191 | }; | 1983 | }; |
1192 | 1984 | ||
1193 | union cvmx_pciercx_cfg068 { | 1985 | union cvmx_pciercx_cfg068 { |
1194 | uint32_t u32; | 1986 | uint32_t u32; |
1195 | struct cvmx_pciercx_cfg068_s { | 1987 | struct cvmx_pciercx_cfg068_s { |
1196 | uint32_t reserved_14_31:18; | 1988 | #ifdef __BIG_ENDIAN_BITFIELD |
1989 | uint32_t reserved_15_31:17; | ||
1990 | uint32_t cies:1; | ||
1197 | uint32_t anfes:1; | 1991 | uint32_t anfes:1; |
1198 | uint32_t rtts:1; | 1992 | uint32_t rtts:1; |
1199 | uint32_t reserved_9_11:3; | 1993 | uint32_t reserved_9_11:3; |
@@ -1202,23 +1996,60 @@ union cvmx_pciercx_cfg068 { | |||
1202 | uint32_t btlps:1; | 1996 | uint32_t btlps:1; |
1203 | uint32_t reserved_1_5:5; | 1997 | uint32_t reserved_1_5:5; |
1204 | uint32_t res:1; | 1998 | uint32_t res:1; |
1999 | #else | ||
2000 | uint32_t res:1; | ||
2001 | uint32_t reserved_1_5:5; | ||
2002 | uint32_t btlps:1; | ||
2003 | uint32_t bdllps:1; | ||
2004 | uint32_t rnrs:1; | ||
2005 | uint32_t reserved_9_11:3; | ||
2006 | uint32_t rtts:1; | ||
2007 | uint32_t anfes:1; | ||
2008 | uint32_t cies:1; | ||
2009 | uint32_t reserved_15_31:17; | ||
2010 | #endif | ||
1205 | } s; | 2011 | } s; |
1206 | struct cvmx_pciercx_cfg068_s cn52xx; | 2012 | struct cvmx_pciercx_cfg068_cn52xx { |
1207 | struct cvmx_pciercx_cfg068_s cn52xxp1; | 2013 | #ifdef __BIG_ENDIAN_BITFIELD |
1208 | struct cvmx_pciercx_cfg068_s cn56xx; | 2014 | uint32_t reserved_14_31:18; |
1209 | struct cvmx_pciercx_cfg068_s cn56xxp1; | 2015 | uint32_t anfes:1; |
1210 | struct cvmx_pciercx_cfg068_s cn61xx; | 2016 | uint32_t rtts:1; |
1211 | struct cvmx_pciercx_cfg068_s cn63xx; | 2017 | uint32_t reserved_9_11:3; |
1212 | struct cvmx_pciercx_cfg068_s cn63xxp1; | 2018 | uint32_t rnrs:1; |
1213 | struct cvmx_pciercx_cfg068_s cn66xx; | 2019 | uint32_t bdllps:1; |
1214 | struct cvmx_pciercx_cfg068_s cn68xx; | 2020 | uint32_t btlps:1; |
1215 | struct cvmx_pciercx_cfg068_s cn68xxp1; | 2021 | uint32_t reserved_1_5:5; |
2022 | uint32_t res:1; | ||
2023 | #else | ||
2024 | uint32_t res:1; | ||
2025 | uint32_t reserved_1_5:5; | ||
2026 | uint32_t btlps:1; | ||
2027 | uint32_t bdllps:1; | ||
2028 | uint32_t rnrs:1; | ||
2029 | uint32_t reserved_9_11:3; | ||
2030 | uint32_t rtts:1; | ||
2031 | uint32_t anfes:1; | ||
2032 | uint32_t reserved_14_31:18; | ||
2033 | #endif | ||
2034 | } cn52xx; | ||
2035 | struct cvmx_pciercx_cfg068_cn52xx cn52xxp1; | ||
2036 | struct cvmx_pciercx_cfg068_cn52xx cn56xx; | ||
2037 | struct cvmx_pciercx_cfg068_cn52xx cn56xxp1; | ||
2038 | struct cvmx_pciercx_cfg068_cn52xx cn61xx; | ||
2039 | struct cvmx_pciercx_cfg068_cn52xx cn63xx; | ||
2040 | struct cvmx_pciercx_cfg068_cn52xx cn63xxp1; | ||
2041 | struct cvmx_pciercx_cfg068_cn52xx cn66xx; | ||
2042 | struct cvmx_pciercx_cfg068_cn52xx cn68xx; | ||
2043 | struct cvmx_pciercx_cfg068_cn52xx cn68xxp1; | ||
2044 | struct cvmx_pciercx_cfg068_s cnf71xx; | ||
1216 | }; | 2045 | }; |
1217 | 2046 | ||
1218 | union cvmx_pciercx_cfg069 { | 2047 | union cvmx_pciercx_cfg069 { |
1219 | uint32_t u32; | 2048 | uint32_t u32; |
1220 | struct cvmx_pciercx_cfg069_s { | 2049 | struct cvmx_pciercx_cfg069_s { |
1221 | uint32_t reserved_14_31:18; | 2050 | #ifdef __BIG_ENDIAN_BITFIELD |
2051 | uint32_t reserved_15_31:17; | ||
2052 | uint32_t ciem:1; | ||
1222 | uint32_t anfem:1; | 2053 | uint32_t anfem:1; |
1223 | uint32_t rttm:1; | 2054 | uint32_t rttm:1; |
1224 | uint32_t reserved_9_11:3; | 2055 | uint32_t reserved_9_11:3; |
@@ -1227,28 +2058,72 @@ union cvmx_pciercx_cfg069 { | |||
1227 | uint32_t btlpm:1; | 2058 | uint32_t btlpm:1; |
1228 | uint32_t reserved_1_5:5; | 2059 | uint32_t reserved_1_5:5; |
1229 | uint32_t rem:1; | 2060 | uint32_t rem:1; |
2061 | #else | ||
2062 | uint32_t rem:1; | ||
2063 | uint32_t reserved_1_5:5; | ||
2064 | uint32_t btlpm:1; | ||
2065 | uint32_t bdllpm:1; | ||
2066 | uint32_t rnrm:1; | ||
2067 | uint32_t reserved_9_11:3; | ||
2068 | uint32_t rttm:1; | ||
2069 | uint32_t anfem:1; | ||
2070 | uint32_t ciem:1; | ||
2071 | uint32_t reserved_15_31:17; | ||
2072 | #endif | ||
1230 | } s; | 2073 | } s; |
1231 | struct cvmx_pciercx_cfg069_s cn52xx; | 2074 | struct cvmx_pciercx_cfg069_cn52xx { |
1232 | struct cvmx_pciercx_cfg069_s cn52xxp1; | 2075 | #ifdef __BIG_ENDIAN_BITFIELD |
1233 | struct cvmx_pciercx_cfg069_s cn56xx; | 2076 | uint32_t reserved_14_31:18; |
1234 | struct cvmx_pciercx_cfg069_s cn56xxp1; | 2077 | uint32_t anfem:1; |
1235 | struct cvmx_pciercx_cfg069_s cn61xx; | 2078 | uint32_t rttm:1; |
1236 | struct cvmx_pciercx_cfg069_s cn63xx; | 2079 | uint32_t reserved_9_11:3; |
1237 | struct cvmx_pciercx_cfg069_s cn63xxp1; | 2080 | uint32_t rnrm:1; |
1238 | struct cvmx_pciercx_cfg069_s cn66xx; | 2081 | uint32_t bdllpm:1; |
1239 | struct cvmx_pciercx_cfg069_s cn68xx; | 2082 | uint32_t btlpm:1; |
1240 | struct cvmx_pciercx_cfg069_s cn68xxp1; | 2083 | uint32_t reserved_1_5:5; |
2084 | uint32_t rem:1; | ||
2085 | #else | ||
2086 | uint32_t rem:1; | ||
2087 | uint32_t reserved_1_5:5; | ||
2088 | uint32_t btlpm:1; | ||
2089 | uint32_t bdllpm:1; | ||
2090 | uint32_t rnrm:1; | ||
2091 | uint32_t reserved_9_11:3; | ||
2092 | uint32_t rttm:1; | ||
2093 | uint32_t anfem:1; | ||
2094 | uint32_t reserved_14_31:18; | ||
2095 | #endif | ||
2096 | } cn52xx; | ||
2097 | struct cvmx_pciercx_cfg069_cn52xx cn52xxp1; | ||
2098 | struct cvmx_pciercx_cfg069_cn52xx cn56xx; | ||
2099 | struct cvmx_pciercx_cfg069_cn52xx cn56xxp1; | ||
2100 | struct cvmx_pciercx_cfg069_cn52xx cn61xx; | ||
2101 | struct cvmx_pciercx_cfg069_cn52xx cn63xx; | ||
2102 | struct cvmx_pciercx_cfg069_cn52xx cn63xxp1; | ||
2103 | struct cvmx_pciercx_cfg069_cn52xx cn66xx; | ||
2104 | struct cvmx_pciercx_cfg069_cn52xx cn68xx; | ||
2105 | struct cvmx_pciercx_cfg069_cn52xx cn68xxp1; | ||
2106 | struct cvmx_pciercx_cfg069_s cnf71xx; | ||
1241 | }; | 2107 | }; |
1242 | 2108 | ||
1243 | union cvmx_pciercx_cfg070 { | 2109 | union cvmx_pciercx_cfg070 { |
1244 | uint32_t u32; | 2110 | uint32_t u32; |
1245 | struct cvmx_pciercx_cfg070_s { | 2111 | struct cvmx_pciercx_cfg070_s { |
2112 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1246 | uint32_t reserved_9_31:23; | 2113 | uint32_t reserved_9_31:23; |
1247 | uint32_t ce:1; | 2114 | uint32_t ce:1; |
1248 | uint32_t cc:1; | 2115 | uint32_t cc:1; |
1249 | uint32_t ge:1; | 2116 | uint32_t ge:1; |
1250 | uint32_t gc:1; | 2117 | uint32_t gc:1; |
1251 | uint32_t fep:5; | 2118 | uint32_t fep:5; |
2119 | #else | ||
2120 | uint32_t fep:5; | ||
2121 | uint32_t gc:1; | ||
2122 | uint32_t ge:1; | ||
2123 | uint32_t cc:1; | ||
2124 | uint32_t ce:1; | ||
2125 | uint32_t reserved_9_31:23; | ||
2126 | #endif | ||
1252 | } s; | 2127 | } s; |
1253 | struct cvmx_pciercx_cfg070_s cn52xx; | 2128 | struct cvmx_pciercx_cfg070_s cn52xx; |
1254 | struct cvmx_pciercx_cfg070_s cn52xxp1; | 2129 | struct cvmx_pciercx_cfg070_s cn52xxp1; |
@@ -1260,12 +2135,17 @@ union cvmx_pciercx_cfg070 { | |||
1260 | struct cvmx_pciercx_cfg070_s cn66xx; | 2135 | struct cvmx_pciercx_cfg070_s cn66xx; |
1261 | struct cvmx_pciercx_cfg070_s cn68xx; | 2136 | struct cvmx_pciercx_cfg070_s cn68xx; |
1262 | struct cvmx_pciercx_cfg070_s cn68xxp1; | 2137 | struct cvmx_pciercx_cfg070_s cn68xxp1; |
2138 | struct cvmx_pciercx_cfg070_s cnf71xx; | ||
1263 | }; | 2139 | }; |
1264 | 2140 | ||
1265 | union cvmx_pciercx_cfg071 { | 2141 | union cvmx_pciercx_cfg071 { |
1266 | uint32_t u32; | 2142 | uint32_t u32; |
1267 | struct cvmx_pciercx_cfg071_s { | 2143 | struct cvmx_pciercx_cfg071_s { |
2144 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1268 | uint32_t dword1:32; | 2145 | uint32_t dword1:32; |
2146 | #else | ||
2147 | uint32_t dword1:32; | ||
2148 | #endif | ||
1269 | } s; | 2149 | } s; |
1270 | struct cvmx_pciercx_cfg071_s cn52xx; | 2150 | struct cvmx_pciercx_cfg071_s cn52xx; |
1271 | struct cvmx_pciercx_cfg071_s cn52xxp1; | 2151 | struct cvmx_pciercx_cfg071_s cn52xxp1; |
@@ -1277,12 +2157,17 @@ union cvmx_pciercx_cfg071 { | |||
1277 | struct cvmx_pciercx_cfg071_s cn66xx; | 2157 | struct cvmx_pciercx_cfg071_s cn66xx; |
1278 | struct cvmx_pciercx_cfg071_s cn68xx; | 2158 | struct cvmx_pciercx_cfg071_s cn68xx; |
1279 | struct cvmx_pciercx_cfg071_s cn68xxp1; | 2159 | struct cvmx_pciercx_cfg071_s cn68xxp1; |
2160 | struct cvmx_pciercx_cfg071_s cnf71xx; | ||
1280 | }; | 2161 | }; |
1281 | 2162 | ||
1282 | union cvmx_pciercx_cfg072 { | 2163 | union cvmx_pciercx_cfg072 { |
1283 | uint32_t u32; | 2164 | uint32_t u32; |
1284 | struct cvmx_pciercx_cfg072_s { | 2165 | struct cvmx_pciercx_cfg072_s { |
2166 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1285 | uint32_t dword2:32; | 2167 | uint32_t dword2:32; |
2168 | #else | ||
2169 | uint32_t dword2:32; | ||
2170 | #endif | ||
1286 | } s; | 2171 | } s; |
1287 | struct cvmx_pciercx_cfg072_s cn52xx; | 2172 | struct cvmx_pciercx_cfg072_s cn52xx; |
1288 | struct cvmx_pciercx_cfg072_s cn52xxp1; | 2173 | struct cvmx_pciercx_cfg072_s cn52xxp1; |
@@ -1294,12 +2179,17 @@ union cvmx_pciercx_cfg072 { | |||
1294 | struct cvmx_pciercx_cfg072_s cn66xx; | 2179 | struct cvmx_pciercx_cfg072_s cn66xx; |
1295 | struct cvmx_pciercx_cfg072_s cn68xx; | 2180 | struct cvmx_pciercx_cfg072_s cn68xx; |
1296 | struct cvmx_pciercx_cfg072_s cn68xxp1; | 2181 | struct cvmx_pciercx_cfg072_s cn68xxp1; |
2182 | struct cvmx_pciercx_cfg072_s cnf71xx; | ||
1297 | }; | 2183 | }; |
1298 | 2184 | ||
1299 | union cvmx_pciercx_cfg073 { | 2185 | union cvmx_pciercx_cfg073 { |
1300 | uint32_t u32; | 2186 | uint32_t u32; |
1301 | struct cvmx_pciercx_cfg073_s { | 2187 | struct cvmx_pciercx_cfg073_s { |
2188 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1302 | uint32_t dword3:32; | 2189 | uint32_t dword3:32; |
2190 | #else | ||
2191 | uint32_t dword3:32; | ||
2192 | #endif | ||
1303 | } s; | 2193 | } s; |
1304 | struct cvmx_pciercx_cfg073_s cn52xx; | 2194 | struct cvmx_pciercx_cfg073_s cn52xx; |
1305 | struct cvmx_pciercx_cfg073_s cn52xxp1; | 2195 | struct cvmx_pciercx_cfg073_s cn52xxp1; |
@@ -1311,12 +2201,17 @@ union cvmx_pciercx_cfg073 { | |||
1311 | struct cvmx_pciercx_cfg073_s cn66xx; | 2201 | struct cvmx_pciercx_cfg073_s cn66xx; |
1312 | struct cvmx_pciercx_cfg073_s cn68xx; | 2202 | struct cvmx_pciercx_cfg073_s cn68xx; |
1313 | struct cvmx_pciercx_cfg073_s cn68xxp1; | 2203 | struct cvmx_pciercx_cfg073_s cn68xxp1; |
2204 | struct cvmx_pciercx_cfg073_s cnf71xx; | ||
1314 | }; | 2205 | }; |
1315 | 2206 | ||
1316 | union cvmx_pciercx_cfg074 { | 2207 | union cvmx_pciercx_cfg074 { |
1317 | uint32_t u32; | 2208 | uint32_t u32; |
1318 | struct cvmx_pciercx_cfg074_s { | 2209 | struct cvmx_pciercx_cfg074_s { |
2210 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2211 | uint32_t dword4:32; | ||
2212 | #else | ||
1319 | uint32_t dword4:32; | 2213 | uint32_t dword4:32; |
2214 | #endif | ||
1320 | } s; | 2215 | } s; |
1321 | struct cvmx_pciercx_cfg074_s cn52xx; | 2216 | struct cvmx_pciercx_cfg074_s cn52xx; |
1322 | struct cvmx_pciercx_cfg074_s cn52xxp1; | 2217 | struct cvmx_pciercx_cfg074_s cn52xxp1; |
@@ -1328,15 +2223,23 @@ union cvmx_pciercx_cfg074 { | |||
1328 | struct cvmx_pciercx_cfg074_s cn66xx; | 2223 | struct cvmx_pciercx_cfg074_s cn66xx; |
1329 | struct cvmx_pciercx_cfg074_s cn68xx; | 2224 | struct cvmx_pciercx_cfg074_s cn68xx; |
1330 | struct cvmx_pciercx_cfg074_s cn68xxp1; | 2225 | struct cvmx_pciercx_cfg074_s cn68xxp1; |
2226 | struct cvmx_pciercx_cfg074_s cnf71xx; | ||
1331 | }; | 2227 | }; |
1332 | 2228 | ||
1333 | union cvmx_pciercx_cfg075 { | 2229 | union cvmx_pciercx_cfg075 { |
1334 | uint32_t u32; | 2230 | uint32_t u32; |
1335 | struct cvmx_pciercx_cfg075_s { | 2231 | struct cvmx_pciercx_cfg075_s { |
2232 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1336 | uint32_t reserved_3_31:29; | 2233 | uint32_t reserved_3_31:29; |
1337 | uint32_t fere:1; | 2234 | uint32_t fere:1; |
1338 | uint32_t nfere:1; | 2235 | uint32_t nfere:1; |
1339 | uint32_t cere:1; | 2236 | uint32_t cere:1; |
2237 | #else | ||
2238 | uint32_t cere:1; | ||
2239 | uint32_t nfere:1; | ||
2240 | uint32_t fere:1; | ||
2241 | uint32_t reserved_3_31:29; | ||
2242 | #endif | ||
1340 | } s; | 2243 | } s; |
1341 | struct cvmx_pciercx_cfg075_s cn52xx; | 2244 | struct cvmx_pciercx_cfg075_s cn52xx; |
1342 | struct cvmx_pciercx_cfg075_s cn52xxp1; | 2245 | struct cvmx_pciercx_cfg075_s cn52xxp1; |
@@ -1348,11 +2251,13 @@ union cvmx_pciercx_cfg075 { | |||
1348 | struct cvmx_pciercx_cfg075_s cn66xx; | 2251 | struct cvmx_pciercx_cfg075_s cn66xx; |
1349 | struct cvmx_pciercx_cfg075_s cn68xx; | 2252 | struct cvmx_pciercx_cfg075_s cn68xx; |
1350 | struct cvmx_pciercx_cfg075_s cn68xxp1; | 2253 | struct cvmx_pciercx_cfg075_s cn68xxp1; |
2254 | struct cvmx_pciercx_cfg075_s cnf71xx; | ||
1351 | }; | 2255 | }; |
1352 | 2256 | ||
1353 | union cvmx_pciercx_cfg076 { | 2257 | union cvmx_pciercx_cfg076 { |
1354 | uint32_t u32; | 2258 | uint32_t u32; |
1355 | struct cvmx_pciercx_cfg076_s { | 2259 | struct cvmx_pciercx_cfg076_s { |
2260 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1356 | uint32_t aeimn:5; | 2261 | uint32_t aeimn:5; |
1357 | uint32_t reserved_7_26:20; | 2262 | uint32_t reserved_7_26:20; |
1358 | uint32_t femr:1; | 2263 | uint32_t femr:1; |
@@ -1362,6 +2267,17 @@ union cvmx_pciercx_cfg076 { | |||
1362 | uint32_t efnfr:1; | 2267 | uint32_t efnfr:1; |
1363 | uint32_t multi_ecr:1; | 2268 | uint32_t multi_ecr:1; |
1364 | uint32_t ecr:1; | 2269 | uint32_t ecr:1; |
2270 | #else | ||
2271 | uint32_t ecr:1; | ||
2272 | uint32_t multi_ecr:1; | ||
2273 | uint32_t efnfr:1; | ||
2274 | uint32_t multi_efnfr:1; | ||
2275 | uint32_t fuf:1; | ||
2276 | uint32_t nfemr:1; | ||
2277 | uint32_t femr:1; | ||
2278 | uint32_t reserved_7_26:20; | ||
2279 | uint32_t aeimn:5; | ||
2280 | #endif | ||
1365 | } s; | 2281 | } s; |
1366 | struct cvmx_pciercx_cfg076_s cn52xx; | 2282 | struct cvmx_pciercx_cfg076_s cn52xx; |
1367 | struct cvmx_pciercx_cfg076_s cn52xxp1; | 2283 | struct cvmx_pciercx_cfg076_s cn52xxp1; |
@@ -1373,13 +2289,19 @@ union cvmx_pciercx_cfg076 { | |||
1373 | struct cvmx_pciercx_cfg076_s cn66xx; | 2289 | struct cvmx_pciercx_cfg076_s cn66xx; |
1374 | struct cvmx_pciercx_cfg076_s cn68xx; | 2290 | struct cvmx_pciercx_cfg076_s cn68xx; |
1375 | struct cvmx_pciercx_cfg076_s cn68xxp1; | 2291 | struct cvmx_pciercx_cfg076_s cn68xxp1; |
2292 | struct cvmx_pciercx_cfg076_s cnf71xx; | ||
1376 | }; | 2293 | }; |
1377 | 2294 | ||
1378 | union cvmx_pciercx_cfg077 { | 2295 | union cvmx_pciercx_cfg077 { |
1379 | uint32_t u32; | 2296 | uint32_t u32; |
1380 | struct cvmx_pciercx_cfg077_s { | 2297 | struct cvmx_pciercx_cfg077_s { |
2298 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1381 | uint32_t efnfsi:16; | 2299 | uint32_t efnfsi:16; |
1382 | uint32_t ecsi:16; | 2300 | uint32_t ecsi:16; |
2301 | #else | ||
2302 | uint32_t ecsi:16; | ||
2303 | uint32_t efnfsi:16; | ||
2304 | #endif | ||
1383 | } s; | 2305 | } s; |
1384 | struct cvmx_pciercx_cfg077_s cn52xx; | 2306 | struct cvmx_pciercx_cfg077_s cn52xx; |
1385 | struct cvmx_pciercx_cfg077_s cn52xxp1; | 2307 | struct cvmx_pciercx_cfg077_s cn52xxp1; |
@@ -1391,13 +2313,19 @@ union cvmx_pciercx_cfg077 { | |||
1391 | struct cvmx_pciercx_cfg077_s cn66xx; | 2313 | struct cvmx_pciercx_cfg077_s cn66xx; |
1392 | struct cvmx_pciercx_cfg077_s cn68xx; | 2314 | struct cvmx_pciercx_cfg077_s cn68xx; |
1393 | struct cvmx_pciercx_cfg077_s cn68xxp1; | 2315 | struct cvmx_pciercx_cfg077_s cn68xxp1; |
2316 | struct cvmx_pciercx_cfg077_s cnf71xx; | ||
1394 | }; | 2317 | }; |
1395 | 2318 | ||
1396 | union cvmx_pciercx_cfg448 { | 2319 | union cvmx_pciercx_cfg448 { |
1397 | uint32_t u32; | 2320 | uint32_t u32; |
1398 | struct cvmx_pciercx_cfg448_s { | 2321 | struct cvmx_pciercx_cfg448_s { |
2322 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1399 | uint32_t rtl:16; | 2323 | uint32_t rtl:16; |
1400 | uint32_t rtltl:16; | 2324 | uint32_t rtltl:16; |
2325 | #else | ||
2326 | uint32_t rtltl:16; | ||
2327 | uint32_t rtl:16; | ||
2328 | #endif | ||
1401 | } s; | 2329 | } s; |
1402 | struct cvmx_pciercx_cfg448_s cn52xx; | 2330 | struct cvmx_pciercx_cfg448_s cn52xx; |
1403 | struct cvmx_pciercx_cfg448_s cn52xxp1; | 2331 | struct cvmx_pciercx_cfg448_s cn52xxp1; |
@@ -1409,12 +2337,17 @@ union cvmx_pciercx_cfg448 { | |||
1409 | struct cvmx_pciercx_cfg448_s cn66xx; | 2337 | struct cvmx_pciercx_cfg448_s cn66xx; |
1410 | struct cvmx_pciercx_cfg448_s cn68xx; | 2338 | struct cvmx_pciercx_cfg448_s cn68xx; |
1411 | struct cvmx_pciercx_cfg448_s cn68xxp1; | 2339 | struct cvmx_pciercx_cfg448_s cn68xxp1; |
2340 | struct cvmx_pciercx_cfg448_s cnf71xx; | ||
1412 | }; | 2341 | }; |
1413 | 2342 | ||
1414 | union cvmx_pciercx_cfg449 { | 2343 | union cvmx_pciercx_cfg449 { |
1415 | uint32_t u32; | 2344 | uint32_t u32; |
1416 | struct cvmx_pciercx_cfg449_s { | 2345 | struct cvmx_pciercx_cfg449_s { |
2346 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2347 | uint32_t omr:32; | ||
2348 | #else | ||
1417 | uint32_t omr:32; | 2349 | uint32_t omr:32; |
2350 | #endif | ||
1418 | } s; | 2351 | } s; |
1419 | struct cvmx_pciercx_cfg449_s cn52xx; | 2352 | struct cvmx_pciercx_cfg449_s cn52xx; |
1420 | struct cvmx_pciercx_cfg449_s cn52xxp1; | 2353 | struct cvmx_pciercx_cfg449_s cn52xxp1; |
@@ -1426,17 +2359,27 @@ union cvmx_pciercx_cfg449 { | |||
1426 | struct cvmx_pciercx_cfg449_s cn66xx; | 2359 | struct cvmx_pciercx_cfg449_s cn66xx; |
1427 | struct cvmx_pciercx_cfg449_s cn68xx; | 2360 | struct cvmx_pciercx_cfg449_s cn68xx; |
1428 | struct cvmx_pciercx_cfg449_s cn68xxp1; | 2361 | struct cvmx_pciercx_cfg449_s cn68xxp1; |
2362 | struct cvmx_pciercx_cfg449_s cnf71xx; | ||
1429 | }; | 2363 | }; |
1430 | 2364 | ||
1431 | union cvmx_pciercx_cfg450 { | 2365 | union cvmx_pciercx_cfg450 { |
1432 | uint32_t u32; | 2366 | uint32_t u32; |
1433 | struct cvmx_pciercx_cfg450_s { | 2367 | struct cvmx_pciercx_cfg450_s { |
2368 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1434 | uint32_t lpec:8; | 2369 | uint32_t lpec:8; |
1435 | uint32_t reserved_22_23:2; | 2370 | uint32_t reserved_22_23:2; |
1436 | uint32_t link_state:6; | 2371 | uint32_t link_state:6; |
1437 | uint32_t force_link:1; | 2372 | uint32_t force_link:1; |
1438 | uint32_t reserved_8_14:7; | 2373 | uint32_t reserved_8_14:7; |
1439 | uint32_t link_num:8; | 2374 | uint32_t link_num:8; |
2375 | #else | ||
2376 | uint32_t link_num:8; | ||
2377 | uint32_t reserved_8_14:7; | ||
2378 | uint32_t force_link:1; | ||
2379 | uint32_t link_state:6; | ||
2380 | uint32_t reserved_22_23:2; | ||
2381 | uint32_t lpec:8; | ||
2382 | #endif | ||
1440 | } s; | 2383 | } s; |
1441 | struct cvmx_pciercx_cfg450_s cn52xx; | 2384 | struct cvmx_pciercx_cfg450_s cn52xx; |
1442 | struct cvmx_pciercx_cfg450_s cn52xxp1; | 2385 | struct cvmx_pciercx_cfg450_s cn52xxp1; |
@@ -1448,11 +2391,13 @@ union cvmx_pciercx_cfg450 { | |||
1448 | struct cvmx_pciercx_cfg450_s cn66xx; | 2391 | struct cvmx_pciercx_cfg450_s cn66xx; |
1449 | struct cvmx_pciercx_cfg450_s cn68xx; | 2392 | struct cvmx_pciercx_cfg450_s cn68xx; |
1450 | struct cvmx_pciercx_cfg450_s cn68xxp1; | 2393 | struct cvmx_pciercx_cfg450_s cn68xxp1; |
2394 | struct cvmx_pciercx_cfg450_s cnf71xx; | ||
1451 | }; | 2395 | }; |
1452 | 2396 | ||
1453 | union cvmx_pciercx_cfg451 { | 2397 | union cvmx_pciercx_cfg451 { |
1454 | uint32_t u32; | 2398 | uint32_t u32; |
1455 | struct cvmx_pciercx_cfg451_s { | 2399 | struct cvmx_pciercx_cfg451_s { |
2400 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1456 | uint32_t reserved_31_31:1; | 2401 | uint32_t reserved_31_31:1; |
1457 | uint32_t easpml1:1; | 2402 | uint32_t easpml1:1; |
1458 | uint32_t l1el:3; | 2403 | uint32_t l1el:3; |
@@ -1460,14 +2405,32 @@ union cvmx_pciercx_cfg451 { | |||
1460 | uint32_t n_fts_cc:8; | 2405 | uint32_t n_fts_cc:8; |
1461 | uint32_t n_fts:8; | 2406 | uint32_t n_fts:8; |
1462 | uint32_t ack_freq:8; | 2407 | uint32_t ack_freq:8; |
2408 | #else | ||
2409 | uint32_t ack_freq:8; | ||
2410 | uint32_t n_fts:8; | ||
2411 | uint32_t n_fts_cc:8; | ||
2412 | uint32_t l0el:3; | ||
2413 | uint32_t l1el:3; | ||
2414 | uint32_t easpml1:1; | ||
2415 | uint32_t reserved_31_31:1; | ||
2416 | #endif | ||
1463 | } s; | 2417 | } s; |
1464 | struct cvmx_pciercx_cfg451_cn52xx { | 2418 | struct cvmx_pciercx_cfg451_cn52xx { |
2419 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1465 | uint32_t reserved_30_31:2; | 2420 | uint32_t reserved_30_31:2; |
1466 | uint32_t l1el:3; | 2421 | uint32_t l1el:3; |
1467 | uint32_t l0el:3; | 2422 | uint32_t l0el:3; |
1468 | uint32_t n_fts_cc:8; | 2423 | uint32_t n_fts_cc:8; |
1469 | uint32_t n_fts:8; | 2424 | uint32_t n_fts:8; |
1470 | uint32_t ack_freq:8; | 2425 | uint32_t ack_freq:8; |
2426 | #else | ||
2427 | uint32_t ack_freq:8; | ||
2428 | uint32_t n_fts:8; | ||
2429 | uint32_t n_fts_cc:8; | ||
2430 | uint32_t l0el:3; | ||
2431 | uint32_t l1el:3; | ||
2432 | uint32_t reserved_30_31:2; | ||
2433 | #endif | ||
1471 | } cn52xx; | 2434 | } cn52xx; |
1472 | struct cvmx_pciercx_cfg451_cn52xx cn52xxp1; | 2435 | struct cvmx_pciercx_cfg451_cn52xx cn52xxp1; |
1473 | struct cvmx_pciercx_cfg451_cn52xx cn56xx; | 2436 | struct cvmx_pciercx_cfg451_cn52xx cn56xx; |
@@ -1478,11 +2441,13 @@ union cvmx_pciercx_cfg451 { | |||
1478 | struct cvmx_pciercx_cfg451_s cn66xx; | 2441 | struct cvmx_pciercx_cfg451_s cn66xx; |
1479 | struct cvmx_pciercx_cfg451_s cn68xx; | 2442 | struct cvmx_pciercx_cfg451_s cn68xx; |
1480 | struct cvmx_pciercx_cfg451_s cn68xxp1; | 2443 | struct cvmx_pciercx_cfg451_s cn68xxp1; |
2444 | struct cvmx_pciercx_cfg451_s cnf71xx; | ||
1481 | }; | 2445 | }; |
1482 | 2446 | ||
1483 | union cvmx_pciercx_cfg452 { | 2447 | union cvmx_pciercx_cfg452 { |
1484 | uint32_t u32; | 2448 | uint32_t u32; |
1485 | struct cvmx_pciercx_cfg452_s { | 2449 | struct cvmx_pciercx_cfg452_s { |
2450 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1486 | uint32_t reserved_26_31:6; | 2451 | uint32_t reserved_26_31:6; |
1487 | uint32_t eccrc:1; | 2452 | uint32_t eccrc:1; |
1488 | uint32_t reserved_22_24:3; | 2453 | uint32_t reserved_22_24:3; |
@@ -1496,12 +2461,28 @@ union cvmx_pciercx_cfg452 { | |||
1496 | uint32_t le:1; | 2461 | uint32_t le:1; |
1497 | uint32_t sd:1; | 2462 | uint32_t sd:1; |
1498 | uint32_t omr:1; | 2463 | uint32_t omr:1; |
2464 | #else | ||
2465 | uint32_t omr:1; | ||
2466 | uint32_t sd:1; | ||
2467 | uint32_t le:1; | ||
2468 | uint32_t ra:1; | ||
2469 | uint32_t reserved_4_4:1; | ||
2470 | uint32_t dllle:1; | ||
2471 | uint32_t reserved_6_6:1; | ||
2472 | uint32_t flm:1; | ||
2473 | uint32_t reserved_8_15:8; | ||
2474 | uint32_t lme:6; | ||
2475 | uint32_t reserved_22_24:3; | ||
2476 | uint32_t eccrc:1; | ||
2477 | uint32_t reserved_26_31:6; | ||
2478 | #endif | ||
1499 | } s; | 2479 | } s; |
1500 | struct cvmx_pciercx_cfg452_s cn52xx; | 2480 | struct cvmx_pciercx_cfg452_s cn52xx; |
1501 | struct cvmx_pciercx_cfg452_s cn52xxp1; | 2481 | struct cvmx_pciercx_cfg452_s cn52xxp1; |
1502 | struct cvmx_pciercx_cfg452_s cn56xx; | 2482 | struct cvmx_pciercx_cfg452_s cn56xx; |
1503 | struct cvmx_pciercx_cfg452_s cn56xxp1; | 2483 | struct cvmx_pciercx_cfg452_s cn56xxp1; |
1504 | struct cvmx_pciercx_cfg452_cn61xx { | 2484 | struct cvmx_pciercx_cfg452_cn61xx { |
2485 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1505 | uint32_t reserved_22_31:10; | 2486 | uint32_t reserved_22_31:10; |
1506 | uint32_t lme:6; | 2487 | uint32_t lme:6; |
1507 | uint32_t reserved_8_15:8; | 2488 | uint32_t reserved_8_15:8; |
@@ -1513,22 +2494,44 @@ union cvmx_pciercx_cfg452 { | |||
1513 | uint32_t le:1; | 2494 | uint32_t le:1; |
1514 | uint32_t sd:1; | 2495 | uint32_t sd:1; |
1515 | uint32_t omr:1; | 2496 | uint32_t omr:1; |
2497 | #else | ||
2498 | uint32_t omr:1; | ||
2499 | uint32_t sd:1; | ||
2500 | uint32_t le:1; | ||
2501 | uint32_t ra:1; | ||
2502 | uint32_t reserved_4_4:1; | ||
2503 | uint32_t dllle:1; | ||
2504 | uint32_t reserved_6_6:1; | ||
2505 | uint32_t flm:1; | ||
2506 | uint32_t reserved_8_15:8; | ||
2507 | uint32_t lme:6; | ||
2508 | uint32_t reserved_22_31:10; | ||
2509 | #endif | ||
1516 | } cn61xx; | 2510 | } cn61xx; |
1517 | struct cvmx_pciercx_cfg452_s cn63xx; | 2511 | struct cvmx_pciercx_cfg452_s cn63xx; |
1518 | struct cvmx_pciercx_cfg452_s cn63xxp1; | 2512 | struct cvmx_pciercx_cfg452_s cn63xxp1; |
1519 | struct cvmx_pciercx_cfg452_cn61xx cn66xx; | 2513 | struct cvmx_pciercx_cfg452_cn61xx cn66xx; |
1520 | struct cvmx_pciercx_cfg452_cn61xx cn68xx; | 2514 | struct cvmx_pciercx_cfg452_cn61xx cn68xx; |
1521 | struct cvmx_pciercx_cfg452_cn61xx cn68xxp1; | 2515 | struct cvmx_pciercx_cfg452_cn61xx cn68xxp1; |
2516 | struct cvmx_pciercx_cfg452_cn61xx cnf71xx; | ||
1522 | }; | 2517 | }; |
1523 | 2518 | ||
1524 | union cvmx_pciercx_cfg453 { | 2519 | union cvmx_pciercx_cfg453 { |
1525 | uint32_t u32; | 2520 | uint32_t u32; |
1526 | struct cvmx_pciercx_cfg453_s { | 2521 | struct cvmx_pciercx_cfg453_s { |
2522 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1527 | uint32_t dlld:1; | 2523 | uint32_t dlld:1; |
1528 | uint32_t reserved_26_30:5; | 2524 | uint32_t reserved_26_30:5; |
1529 | uint32_t ack_nak:1; | 2525 | uint32_t ack_nak:1; |
1530 | uint32_t fcd:1; | 2526 | uint32_t fcd:1; |
1531 | uint32_t ilst:24; | 2527 | uint32_t ilst:24; |
2528 | #else | ||
2529 | uint32_t ilst:24; | ||
2530 | uint32_t fcd:1; | ||
2531 | uint32_t ack_nak:1; | ||
2532 | uint32_t reserved_26_30:5; | ||
2533 | uint32_t dlld:1; | ||
2534 | #endif | ||
1532 | } s; | 2535 | } s; |
1533 | struct cvmx_pciercx_cfg453_s cn52xx; | 2536 | struct cvmx_pciercx_cfg453_s cn52xx; |
1534 | struct cvmx_pciercx_cfg453_s cn52xxp1; | 2537 | struct cvmx_pciercx_cfg453_s cn52xxp1; |
@@ -1540,11 +2543,13 @@ union cvmx_pciercx_cfg453 { | |||
1540 | struct cvmx_pciercx_cfg453_s cn66xx; | 2543 | struct cvmx_pciercx_cfg453_s cn66xx; |
1541 | struct cvmx_pciercx_cfg453_s cn68xx; | 2544 | struct cvmx_pciercx_cfg453_s cn68xx; |
1542 | struct cvmx_pciercx_cfg453_s cn68xxp1; | 2545 | struct cvmx_pciercx_cfg453_s cn68xxp1; |
2546 | struct cvmx_pciercx_cfg453_s cnf71xx; | ||
1543 | }; | 2547 | }; |
1544 | 2548 | ||
1545 | union cvmx_pciercx_cfg454 { | 2549 | union cvmx_pciercx_cfg454 { |
1546 | uint32_t u32; | 2550 | uint32_t u32; |
1547 | struct cvmx_pciercx_cfg454_s { | 2551 | struct cvmx_pciercx_cfg454_s { |
2552 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1548 | uint32_t cx_nfunc:3; | 2553 | uint32_t cx_nfunc:3; |
1549 | uint32_t tmfcwt:5; | 2554 | uint32_t tmfcwt:5; |
1550 | uint32_t tmanlt:5; | 2555 | uint32_t tmanlt:5; |
@@ -1552,8 +2557,18 @@ union cvmx_pciercx_cfg454 { | |||
1552 | uint32_t reserved_11_13:3; | 2557 | uint32_t reserved_11_13:3; |
1553 | uint32_t nskps:3; | 2558 | uint32_t nskps:3; |
1554 | uint32_t reserved_0_7:8; | 2559 | uint32_t reserved_0_7:8; |
2560 | #else | ||
2561 | uint32_t reserved_0_7:8; | ||
2562 | uint32_t nskps:3; | ||
2563 | uint32_t reserved_11_13:3; | ||
2564 | uint32_t tmrt:5; | ||
2565 | uint32_t tmanlt:5; | ||
2566 | uint32_t tmfcwt:5; | ||
2567 | uint32_t cx_nfunc:3; | ||
2568 | #endif | ||
1555 | } s; | 2569 | } s; |
1556 | struct cvmx_pciercx_cfg454_cn52xx { | 2570 | struct cvmx_pciercx_cfg454_cn52xx { |
2571 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1557 | uint32_t reserved_29_31:3; | 2572 | uint32_t reserved_29_31:3; |
1558 | uint32_t tmfcwt:5; | 2573 | uint32_t tmfcwt:5; |
1559 | uint32_t tmanlt:5; | 2574 | uint32_t tmanlt:5; |
@@ -1562,28 +2577,49 @@ union cvmx_pciercx_cfg454 { | |||
1562 | uint32_t nskps:3; | 2577 | uint32_t nskps:3; |
1563 | uint32_t reserved_4_7:4; | 2578 | uint32_t reserved_4_7:4; |
1564 | uint32_t ntss:4; | 2579 | uint32_t ntss:4; |
2580 | #else | ||
2581 | uint32_t ntss:4; | ||
2582 | uint32_t reserved_4_7:4; | ||
2583 | uint32_t nskps:3; | ||
2584 | uint32_t reserved_11_13:3; | ||
2585 | uint32_t tmrt:5; | ||
2586 | uint32_t tmanlt:5; | ||
2587 | uint32_t tmfcwt:5; | ||
2588 | uint32_t reserved_29_31:3; | ||
2589 | #endif | ||
1565 | } cn52xx; | 2590 | } cn52xx; |
1566 | struct cvmx_pciercx_cfg454_cn52xx cn52xxp1; | 2591 | struct cvmx_pciercx_cfg454_cn52xx cn52xxp1; |
1567 | struct cvmx_pciercx_cfg454_cn52xx cn56xx; | 2592 | struct cvmx_pciercx_cfg454_cn52xx cn56xx; |
1568 | struct cvmx_pciercx_cfg454_cn52xx cn56xxp1; | 2593 | struct cvmx_pciercx_cfg454_cn52xx cn56xxp1; |
1569 | struct cvmx_pciercx_cfg454_cn61xx { | 2594 | struct cvmx_pciercx_cfg454_cn61xx { |
2595 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1570 | uint32_t cx_nfunc:3; | 2596 | uint32_t cx_nfunc:3; |
1571 | uint32_t tmfcwt:5; | 2597 | uint32_t tmfcwt:5; |
1572 | uint32_t tmanlt:5; | 2598 | uint32_t tmanlt:5; |
1573 | uint32_t tmrt:5; | 2599 | uint32_t tmrt:5; |
1574 | uint32_t reserved_8_13:6; | 2600 | uint32_t reserved_8_13:6; |
1575 | uint32_t mfuncn:8; | 2601 | uint32_t mfuncn:8; |
2602 | #else | ||
2603 | uint32_t mfuncn:8; | ||
2604 | uint32_t reserved_8_13:6; | ||
2605 | uint32_t tmrt:5; | ||
2606 | uint32_t tmanlt:5; | ||
2607 | uint32_t tmfcwt:5; | ||
2608 | uint32_t cx_nfunc:3; | ||
2609 | #endif | ||
1576 | } cn61xx; | 2610 | } cn61xx; |
1577 | struct cvmx_pciercx_cfg454_cn52xx cn63xx; | 2611 | struct cvmx_pciercx_cfg454_cn52xx cn63xx; |
1578 | struct cvmx_pciercx_cfg454_cn52xx cn63xxp1; | 2612 | struct cvmx_pciercx_cfg454_cn52xx cn63xxp1; |
1579 | struct cvmx_pciercx_cfg454_cn61xx cn66xx; | 2613 | struct cvmx_pciercx_cfg454_cn61xx cn66xx; |
1580 | struct cvmx_pciercx_cfg454_cn61xx cn68xx; | 2614 | struct cvmx_pciercx_cfg454_cn61xx cn68xx; |
1581 | struct cvmx_pciercx_cfg454_cn52xx cn68xxp1; | 2615 | struct cvmx_pciercx_cfg454_cn52xx cn68xxp1; |
2616 | struct cvmx_pciercx_cfg454_cn61xx cnf71xx; | ||
1582 | }; | 2617 | }; |
1583 | 2618 | ||
1584 | union cvmx_pciercx_cfg455 { | 2619 | union cvmx_pciercx_cfg455 { |
1585 | uint32_t u32; | 2620 | uint32_t u32; |
1586 | struct cvmx_pciercx_cfg455_s { | 2621 | struct cvmx_pciercx_cfg455_s { |
2622 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1587 | uint32_t m_cfg0_filt:1; | 2623 | uint32_t m_cfg0_filt:1; |
1588 | uint32_t m_io_filt:1; | 2624 | uint32_t m_io_filt:1; |
1589 | uint32_t msg_ctrl:1; | 2625 | uint32_t msg_ctrl:1; |
@@ -1603,6 +2639,27 @@ union cvmx_pciercx_cfg455 { | |||
1603 | uint32_t dfcwt:1; | 2639 | uint32_t dfcwt:1; |
1604 | uint32_t reserved_11_14:4; | 2640 | uint32_t reserved_11_14:4; |
1605 | uint32_t skpiv:11; | 2641 | uint32_t skpiv:11; |
2642 | #else | ||
2643 | uint32_t skpiv:11; | ||
2644 | uint32_t reserved_11_14:4; | ||
2645 | uint32_t dfcwt:1; | ||
2646 | uint32_t m_fun:1; | ||
2647 | uint32_t m_pois_filt:1; | ||
2648 | uint32_t m_bar_match:1; | ||
2649 | uint32_t m_cfg1_filt:1; | ||
2650 | uint32_t m_lk_filt:1; | ||
2651 | uint32_t m_cpl_tag_err:1; | ||
2652 | uint32_t m_cpl_rid_err:1; | ||
2653 | uint32_t m_cpl_fun_err:1; | ||
2654 | uint32_t m_cpl_tc_err:1; | ||
2655 | uint32_t m_cpl_attr_err:1; | ||
2656 | uint32_t m_cpl_len_err:1; | ||
2657 | uint32_t m_ecrc_filt:1; | ||
2658 | uint32_t m_cpl_ecrc_filt:1; | ||
2659 | uint32_t msg_ctrl:1; | ||
2660 | uint32_t m_io_filt:1; | ||
2661 | uint32_t m_cfg0_filt:1; | ||
2662 | #endif | ||
1606 | } s; | 2663 | } s; |
1607 | struct cvmx_pciercx_cfg455_s cn52xx; | 2664 | struct cvmx_pciercx_cfg455_s cn52xx; |
1608 | struct cvmx_pciercx_cfg455_s cn52xxp1; | 2665 | struct cvmx_pciercx_cfg455_s cn52xxp1; |
@@ -1614,21 +2671,36 @@ union cvmx_pciercx_cfg455 { | |||
1614 | struct cvmx_pciercx_cfg455_s cn66xx; | 2671 | struct cvmx_pciercx_cfg455_s cn66xx; |
1615 | struct cvmx_pciercx_cfg455_s cn68xx; | 2672 | struct cvmx_pciercx_cfg455_s cn68xx; |
1616 | struct cvmx_pciercx_cfg455_s cn68xxp1; | 2673 | struct cvmx_pciercx_cfg455_s cn68xxp1; |
2674 | struct cvmx_pciercx_cfg455_s cnf71xx; | ||
1617 | }; | 2675 | }; |
1618 | 2676 | ||
1619 | union cvmx_pciercx_cfg456 { | 2677 | union cvmx_pciercx_cfg456 { |
1620 | uint32_t u32; | 2678 | uint32_t u32; |
1621 | struct cvmx_pciercx_cfg456_s { | 2679 | struct cvmx_pciercx_cfg456_s { |
2680 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1622 | uint32_t reserved_4_31:28; | 2681 | uint32_t reserved_4_31:28; |
1623 | uint32_t m_handle_flush:1; | 2682 | uint32_t m_handle_flush:1; |
1624 | uint32_t m_dabort_4ucpl:1; | 2683 | uint32_t m_dabort_4ucpl:1; |
1625 | uint32_t m_vend1_drp:1; | 2684 | uint32_t m_vend1_drp:1; |
1626 | uint32_t m_vend0_drp:1; | 2685 | uint32_t m_vend0_drp:1; |
2686 | #else | ||
2687 | uint32_t m_vend0_drp:1; | ||
2688 | uint32_t m_vend1_drp:1; | ||
2689 | uint32_t m_dabort_4ucpl:1; | ||
2690 | uint32_t m_handle_flush:1; | ||
2691 | uint32_t reserved_4_31:28; | ||
2692 | #endif | ||
1627 | } s; | 2693 | } s; |
1628 | struct cvmx_pciercx_cfg456_cn52xx { | 2694 | struct cvmx_pciercx_cfg456_cn52xx { |
2695 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1629 | uint32_t reserved_2_31:30; | 2696 | uint32_t reserved_2_31:30; |
1630 | uint32_t m_vend1_drp:1; | 2697 | uint32_t m_vend1_drp:1; |
1631 | uint32_t m_vend0_drp:1; | 2698 | uint32_t m_vend0_drp:1; |
2699 | #else | ||
2700 | uint32_t m_vend0_drp:1; | ||
2701 | uint32_t m_vend1_drp:1; | ||
2702 | uint32_t reserved_2_31:30; | ||
2703 | #endif | ||
1632 | } cn52xx; | 2704 | } cn52xx; |
1633 | struct cvmx_pciercx_cfg456_cn52xx cn52xxp1; | 2705 | struct cvmx_pciercx_cfg456_cn52xx cn52xxp1; |
1634 | struct cvmx_pciercx_cfg456_cn52xx cn56xx; | 2706 | struct cvmx_pciercx_cfg456_cn52xx cn56xx; |
@@ -1639,12 +2711,17 @@ union cvmx_pciercx_cfg456 { | |||
1639 | struct cvmx_pciercx_cfg456_s cn66xx; | 2711 | struct cvmx_pciercx_cfg456_s cn66xx; |
1640 | struct cvmx_pciercx_cfg456_s cn68xx; | 2712 | struct cvmx_pciercx_cfg456_s cn68xx; |
1641 | struct cvmx_pciercx_cfg456_cn52xx cn68xxp1; | 2713 | struct cvmx_pciercx_cfg456_cn52xx cn68xxp1; |
2714 | struct cvmx_pciercx_cfg456_s cnf71xx; | ||
1642 | }; | 2715 | }; |
1643 | 2716 | ||
1644 | union cvmx_pciercx_cfg458 { | 2717 | union cvmx_pciercx_cfg458 { |
1645 | uint32_t u32; | 2718 | uint32_t u32; |
1646 | struct cvmx_pciercx_cfg458_s { | 2719 | struct cvmx_pciercx_cfg458_s { |
2720 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2721 | uint32_t dbg_info_l32:32; | ||
2722 | #else | ||
1647 | uint32_t dbg_info_l32:32; | 2723 | uint32_t dbg_info_l32:32; |
2724 | #endif | ||
1648 | } s; | 2725 | } s; |
1649 | struct cvmx_pciercx_cfg458_s cn52xx; | 2726 | struct cvmx_pciercx_cfg458_s cn52xx; |
1650 | struct cvmx_pciercx_cfg458_s cn52xxp1; | 2727 | struct cvmx_pciercx_cfg458_s cn52xxp1; |
@@ -1656,12 +2733,17 @@ union cvmx_pciercx_cfg458 { | |||
1656 | struct cvmx_pciercx_cfg458_s cn66xx; | 2733 | struct cvmx_pciercx_cfg458_s cn66xx; |
1657 | struct cvmx_pciercx_cfg458_s cn68xx; | 2734 | struct cvmx_pciercx_cfg458_s cn68xx; |
1658 | struct cvmx_pciercx_cfg458_s cn68xxp1; | 2735 | struct cvmx_pciercx_cfg458_s cn68xxp1; |
2736 | struct cvmx_pciercx_cfg458_s cnf71xx; | ||
1659 | }; | 2737 | }; |
1660 | 2738 | ||
1661 | union cvmx_pciercx_cfg459 { | 2739 | union cvmx_pciercx_cfg459 { |
1662 | uint32_t u32; | 2740 | uint32_t u32; |
1663 | struct cvmx_pciercx_cfg459_s { | 2741 | struct cvmx_pciercx_cfg459_s { |
2742 | #ifdef __BIG_ENDIAN_BITFIELD | ||
2743 | uint32_t dbg_info_u32:32; | ||
2744 | #else | ||
1664 | uint32_t dbg_info_u32:32; | 2745 | uint32_t dbg_info_u32:32; |
2746 | #endif | ||
1665 | } s; | 2747 | } s; |
1666 | struct cvmx_pciercx_cfg459_s cn52xx; | 2748 | struct cvmx_pciercx_cfg459_s cn52xx; |
1667 | struct cvmx_pciercx_cfg459_s cn52xxp1; | 2749 | struct cvmx_pciercx_cfg459_s cn52xxp1; |
@@ -1673,14 +2755,21 @@ union cvmx_pciercx_cfg459 { | |||
1673 | struct cvmx_pciercx_cfg459_s cn66xx; | 2755 | struct cvmx_pciercx_cfg459_s cn66xx; |
1674 | struct cvmx_pciercx_cfg459_s cn68xx; | 2756 | struct cvmx_pciercx_cfg459_s cn68xx; |
1675 | struct cvmx_pciercx_cfg459_s cn68xxp1; | 2757 | struct cvmx_pciercx_cfg459_s cn68xxp1; |
2758 | struct cvmx_pciercx_cfg459_s cnf71xx; | ||
1676 | }; | 2759 | }; |
1677 | 2760 | ||
1678 | union cvmx_pciercx_cfg460 { | 2761 | union cvmx_pciercx_cfg460 { |
1679 | uint32_t u32; | 2762 | uint32_t u32; |
1680 | struct cvmx_pciercx_cfg460_s { | 2763 | struct cvmx_pciercx_cfg460_s { |
2764 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1681 | uint32_t reserved_20_31:12; | 2765 | uint32_t reserved_20_31:12; |
1682 | uint32_t tphfcc:8; | 2766 | uint32_t tphfcc:8; |
1683 | uint32_t tpdfcc:12; | 2767 | uint32_t tpdfcc:12; |
2768 | #else | ||
2769 | uint32_t tpdfcc:12; | ||
2770 | uint32_t tphfcc:8; | ||
2771 | uint32_t reserved_20_31:12; | ||
2772 | #endif | ||
1684 | } s; | 2773 | } s; |
1685 | struct cvmx_pciercx_cfg460_s cn52xx; | 2774 | struct cvmx_pciercx_cfg460_s cn52xx; |
1686 | struct cvmx_pciercx_cfg460_s cn52xxp1; | 2775 | struct cvmx_pciercx_cfg460_s cn52xxp1; |
@@ -1692,14 +2781,21 @@ union cvmx_pciercx_cfg460 { | |||
1692 | struct cvmx_pciercx_cfg460_s cn66xx; | 2781 | struct cvmx_pciercx_cfg460_s cn66xx; |
1693 | struct cvmx_pciercx_cfg460_s cn68xx; | 2782 | struct cvmx_pciercx_cfg460_s cn68xx; |
1694 | struct cvmx_pciercx_cfg460_s cn68xxp1; | 2783 | struct cvmx_pciercx_cfg460_s cn68xxp1; |
2784 | struct cvmx_pciercx_cfg460_s cnf71xx; | ||
1695 | }; | 2785 | }; |
1696 | 2786 | ||
1697 | union cvmx_pciercx_cfg461 { | 2787 | union cvmx_pciercx_cfg461 { |
1698 | uint32_t u32; | 2788 | uint32_t u32; |
1699 | struct cvmx_pciercx_cfg461_s { | 2789 | struct cvmx_pciercx_cfg461_s { |
2790 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1700 | uint32_t reserved_20_31:12; | 2791 | uint32_t reserved_20_31:12; |
1701 | uint32_t tchfcc:8; | 2792 | uint32_t tchfcc:8; |
1702 | uint32_t tcdfcc:12; | 2793 | uint32_t tcdfcc:12; |
2794 | #else | ||
2795 | uint32_t tcdfcc:12; | ||
2796 | uint32_t tchfcc:8; | ||
2797 | uint32_t reserved_20_31:12; | ||
2798 | #endif | ||
1703 | } s; | 2799 | } s; |
1704 | struct cvmx_pciercx_cfg461_s cn52xx; | 2800 | struct cvmx_pciercx_cfg461_s cn52xx; |
1705 | struct cvmx_pciercx_cfg461_s cn52xxp1; | 2801 | struct cvmx_pciercx_cfg461_s cn52xxp1; |
@@ -1711,14 +2807,21 @@ union cvmx_pciercx_cfg461 { | |||
1711 | struct cvmx_pciercx_cfg461_s cn66xx; | 2807 | struct cvmx_pciercx_cfg461_s cn66xx; |
1712 | struct cvmx_pciercx_cfg461_s cn68xx; | 2808 | struct cvmx_pciercx_cfg461_s cn68xx; |
1713 | struct cvmx_pciercx_cfg461_s cn68xxp1; | 2809 | struct cvmx_pciercx_cfg461_s cn68xxp1; |
2810 | struct cvmx_pciercx_cfg461_s cnf71xx; | ||
1714 | }; | 2811 | }; |
1715 | 2812 | ||
1716 | union cvmx_pciercx_cfg462 { | 2813 | union cvmx_pciercx_cfg462 { |
1717 | uint32_t u32; | 2814 | uint32_t u32; |
1718 | struct cvmx_pciercx_cfg462_s { | 2815 | struct cvmx_pciercx_cfg462_s { |
2816 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1719 | uint32_t reserved_20_31:12; | 2817 | uint32_t reserved_20_31:12; |
1720 | uint32_t tchfcc:8; | 2818 | uint32_t tchfcc:8; |
1721 | uint32_t tcdfcc:12; | 2819 | uint32_t tcdfcc:12; |
2820 | #else | ||
2821 | uint32_t tcdfcc:12; | ||
2822 | uint32_t tchfcc:8; | ||
2823 | uint32_t reserved_20_31:12; | ||
2824 | #endif | ||
1722 | } s; | 2825 | } s; |
1723 | struct cvmx_pciercx_cfg462_s cn52xx; | 2826 | struct cvmx_pciercx_cfg462_s cn52xx; |
1724 | struct cvmx_pciercx_cfg462_s cn52xxp1; | 2827 | struct cvmx_pciercx_cfg462_s cn52xxp1; |
@@ -1730,15 +2833,23 @@ union cvmx_pciercx_cfg462 { | |||
1730 | struct cvmx_pciercx_cfg462_s cn66xx; | 2833 | struct cvmx_pciercx_cfg462_s cn66xx; |
1731 | struct cvmx_pciercx_cfg462_s cn68xx; | 2834 | struct cvmx_pciercx_cfg462_s cn68xx; |
1732 | struct cvmx_pciercx_cfg462_s cn68xxp1; | 2835 | struct cvmx_pciercx_cfg462_s cn68xxp1; |
2836 | struct cvmx_pciercx_cfg462_s cnf71xx; | ||
1733 | }; | 2837 | }; |
1734 | 2838 | ||
1735 | union cvmx_pciercx_cfg463 { | 2839 | union cvmx_pciercx_cfg463 { |
1736 | uint32_t u32; | 2840 | uint32_t u32; |
1737 | struct cvmx_pciercx_cfg463_s { | 2841 | struct cvmx_pciercx_cfg463_s { |
2842 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1738 | uint32_t reserved_3_31:29; | 2843 | uint32_t reserved_3_31:29; |
1739 | uint32_t rqne:1; | 2844 | uint32_t rqne:1; |
1740 | uint32_t trbne:1; | 2845 | uint32_t trbne:1; |
1741 | uint32_t rtlpfccnr:1; | 2846 | uint32_t rtlpfccnr:1; |
2847 | #else | ||
2848 | uint32_t rtlpfccnr:1; | ||
2849 | uint32_t trbne:1; | ||
2850 | uint32_t rqne:1; | ||
2851 | uint32_t reserved_3_31:29; | ||
2852 | #endif | ||
1742 | } s; | 2853 | } s; |
1743 | struct cvmx_pciercx_cfg463_s cn52xx; | 2854 | struct cvmx_pciercx_cfg463_s cn52xx; |
1744 | struct cvmx_pciercx_cfg463_s cn52xxp1; | 2855 | struct cvmx_pciercx_cfg463_s cn52xxp1; |
@@ -1750,15 +2861,23 @@ union cvmx_pciercx_cfg463 { | |||
1750 | struct cvmx_pciercx_cfg463_s cn66xx; | 2861 | struct cvmx_pciercx_cfg463_s cn66xx; |
1751 | struct cvmx_pciercx_cfg463_s cn68xx; | 2862 | struct cvmx_pciercx_cfg463_s cn68xx; |
1752 | struct cvmx_pciercx_cfg463_s cn68xxp1; | 2863 | struct cvmx_pciercx_cfg463_s cn68xxp1; |
2864 | struct cvmx_pciercx_cfg463_s cnf71xx; | ||
1753 | }; | 2865 | }; |
1754 | 2866 | ||
1755 | union cvmx_pciercx_cfg464 { | 2867 | union cvmx_pciercx_cfg464 { |
1756 | uint32_t u32; | 2868 | uint32_t u32; |
1757 | struct cvmx_pciercx_cfg464_s { | 2869 | struct cvmx_pciercx_cfg464_s { |
2870 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1758 | uint32_t wrr_vc3:8; | 2871 | uint32_t wrr_vc3:8; |
1759 | uint32_t wrr_vc2:8; | 2872 | uint32_t wrr_vc2:8; |
1760 | uint32_t wrr_vc1:8; | 2873 | uint32_t wrr_vc1:8; |
1761 | uint32_t wrr_vc0:8; | 2874 | uint32_t wrr_vc0:8; |
2875 | #else | ||
2876 | uint32_t wrr_vc0:8; | ||
2877 | uint32_t wrr_vc1:8; | ||
2878 | uint32_t wrr_vc2:8; | ||
2879 | uint32_t wrr_vc3:8; | ||
2880 | #endif | ||
1762 | } s; | 2881 | } s; |
1763 | struct cvmx_pciercx_cfg464_s cn52xx; | 2882 | struct cvmx_pciercx_cfg464_s cn52xx; |
1764 | struct cvmx_pciercx_cfg464_s cn52xxp1; | 2883 | struct cvmx_pciercx_cfg464_s cn52xxp1; |
@@ -1770,15 +2889,23 @@ union cvmx_pciercx_cfg464 { | |||
1770 | struct cvmx_pciercx_cfg464_s cn66xx; | 2889 | struct cvmx_pciercx_cfg464_s cn66xx; |
1771 | struct cvmx_pciercx_cfg464_s cn68xx; | 2890 | struct cvmx_pciercx_cfg464_s cn68xx; |
1772 | struct cvmx_pciercx_cfg464_s cn68xxp1; | 2891 | struct cvmx_pciercx_cfg464_s cn68xxp1; |
2892 | struct cvmx_pciercx_cfg464_s cnf71xx; | ||
1773 | }; | 2893 | }; |
1774 | 2894 | ||
1775 | union cvmx_pciercx_cfg465 { | 2895 | union cvmx_pciercx_cfg465 { |
1776 | uint32_t u32; | 2896 | uint32_t u32; |
1777 | struct cvmx_pciercx_cfg465_s { | 2897 | struct cvmx_pciercx_cfg465_s { |
2898 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1778 | uint32_t wrr_vc7:8; | 2899 | uint32_t wrr_vc7:8; |
1779 | uint32_t wrr_vc6:8; | 2900 | uint32_t wrr_vc6:8; |
1780 | uint32_t wrr_vc5:8; | 2901 | uint32_t wrr_vc5:8; |
1781 | uint32_t wrr_vc4:8; | 2902 | uint32_t wrr_vc4:8; |
2903 | #else | ||
2904 | uint32_t wrr_vc4:8; | ||
2905 | uint32_t wrr_vc5:8; | ||
2906 | uint32_t wrr_vc6:8; | ||
2907 | uint32_t wrr_vc7:8; | ||
2908 | #endif | ||
1782 | } s; | 2909 | } s; |
1783 | struct cvmx_pciercx_cfg465_s cn52xx; | 2910 | struct cvmx_pciercx_cfg465_s cn52xx; |
1784 | struct cvmx_pciercx_cfg465_s cn52xxp1; | 2911 | struct cvmx_pciercx_cfg465_s cn52xxp1; |
@@ -1790,11 +2917,13 @@ union cvmx_pciercx_cfg465 { | |||
1790 | struct cvmx_pciercx_cfg465_s cn66xx; | 2917 | struct cvmx_pciercx_cfg465_s cn66xx; |
1791 | struct cvmx_pciercx_cfg465_s cn68xx; | 2918 | struct cvmx_pciercx_cfg465_s cn68xx; |
1792 | struct cvmx_pciercx_cfg465_s cn68xxp1; | 2919 | struct cvmx_pciercx_cfg465_s cn68xxp1; |
2920 | struct cvmx_pciercx_cfg465_s cnf71xx; | ||
1793 | }; | 2921 | }; |
1794 | 2922 | ||
1795 | union cvmx_pciercx_cfg466 { | 2923 | union cvmx_pciercx_cfg466 { |
1796 | uint32_t u32; | 2924 | uint32_t u32; |
1797 | struct cvmx_pciercx_cfg466_s { | 2925 | struct cvmx_pciercx_cfg466_s { |
2926 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1798 | uint32_t rx_queue_order:1; | 2927 | uint32_t rx_queue_order:1; |
1799 | uint32_t type_ordering:1; | 2928 | uint32_t type_ordering:1; |
1800 | uint32_t reserved_24_29:6; | 2929 | uint32_t reserved_24_29:6; |
@@ -1802,6 +2931,15 @@ union cvmx_pciercx_cfg466 { | |||
1802 | uint32_t reserved_20_20:1; | 2931 | uint32_t reserved_20_20:1; |
1803 | uint32_t header_credits:8; | 2932 | uint32_t header_credits:8; |
1804 | uint32_t data_credits:12; | 2933 | uint32_t data_credits:12; |
2934 | #else | ||
2935 | uint32_t data_credits:12; | ||
2936 | uint32_t header_credits:8; | ||
2937 | uint32_t reserved_20_20:1; | ||
2938 | uint32_t queue_mode:3; | ||
2939 | uint32_t reserved_24_29:6; | ||
2940 | uint32_t type_ordering:1; | ||
2941 | uint32_t rx_queue_order:1; | ||
2942 | #endif | ||
1805 | } s; | 2943 | } s; |
1806 | struct cvmx_pciercx_cfg466_s cn52xx; | 2944 | struct cvmx_pciercx_cfg466_s cn52xx; |
1807 | struct cvmx_pciercx_cfg466_s cn52xxp1; | 2945 | struct cvmx_pciercx_cfg466_s cn52xxp1; |
@@ -1813,16 +2951,25 @@ union cvmx_pciercx_cfg466 { | |||
1813 | struct cvmx_pciercx_cfg466_s cn66xx; | 2951 | struct cvmx_pciercx_cfg466_s cn66xx; |
1814 | struct cvmx_pciercx_cfg466_s cn68xx; | 2952 | struct cvmx_pciercx_cfg466_s cn68xx; |
1815 | struct cvmx_pciercx_cfg466_s cn68xxp1; | 2953 | struct cvmx_pciercx_cfg466_s cn68xxp1; |
2954 | struct cvmx_pciercx_cfg466_s cnf71xx; | ||
1816 | }; | 2955 | }; |
1817 | 2956 | ||
1818 | union cvmx_pciercx_cfg467 { | 2957 | union cvmx_pciercx_cfg467 { |
1819 | uint32_t u32; | 2958 | uint32_t u32; |
1820 | struct cvmx_pciercx_cfg467_s { | 2959 | struct cvmx_pciercx_cfg467_s { |
2960 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1821 | uint32_t reserved_24_31:8; | 2961 | uint32_t reserved_24_31:8; |
1822 | uint32_t queue_mode:3; | 2962 | uint32_t queue_mode:3; |
1823 | uint32_t reserved_20_20:1; | 2963 | uint32_t reserved_20_20:1; |
1824 | uint32_t header_credits:8; | 2964 | uint32_t header_credits:8; |
1825 | uint32_t data_credits:12; | 2965 | uint32_t data_credits:12; |
2966 | #else | ||
2967 | uint32_t data_credits:12; | ||
2968 | uint32_t header_credits:8; | ||
2969 | uint32_t reserved_20_20:1; | ||
2970 | uint32_t queue_mode:3; | ||
2971 | uint32_t reserved_24_31:8; | ||
2972 | #endif | ||
1826 | } s; | 2973 | } s; |
1827 | struct cvmx_pciercx_cfg467_s cn52xx; | 2974 | struct cvmx_pciercx_cfg467_s cn52xx; |
1828 | struct cvmx_pciercx_cfg467_s cn52xxp1; | 2975 | struct cvmx_pciercx_cfg467_s cn52xxp1; |
@@ -1834,16 +2981,25 @@ union cvmx_pciercx_cfg467 { | |||
1834 | struct cvmx_pciercx_cfg467_s cn66xx; | 2981 | struct cvmx_pciercx_cfg467_s cn66xx; |
1835 | struct cvmx_pciercx_cfg467_s cn68xx; | 2982 | struct cvmx_pciercx_cfg467_s cn68xx; |
1836 | struct cvmx_pciercx_cfg467_s cn68xxp1; | 2983 | struct cvmx_pciercx_cfg467_s cn68xxp1; |
2984 | struct cvmx_pciercx_cfg467_s cnf71xx; | ||
1837 | }; | 2985 | }; |
1838 | 2986 | ||
1839 | union cvmx_pciercx_cfg468 { | 2987 | union cvmx_pciercx_cfg468 { |
1840 | uint32_t u32; | 2988 | uint32_t u32; |
1841 | struct cvmx_pciercx_cfg468_s { | 2989 | struct cvmx_pciercx_cfg468_s { |
2990 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1842 | uint32_t reserved_24_31:8; | 2991 | uint32_t reserved_24_31:8; |
1843 | uint32_t queue_mode:3; | 2992 | uint32_t queue_mode:3; |
1844 | uint32_t reserved_20_20:1; | 2993 | uint32_t reserved_20_20:1; |
1845 | uint32_t header_credits:8; | 2994 | uint32_t header_credits:8; |
1846 | uint32_t data_credits:12; | 2995 | uint32_t data_credits:12; |
2996 | #else | ||
2997 | uint32_t data_credits:12; | ||
2998 | uint32_t header_credits:8; | ||
2999 | uint32_t reserved_20_20:1; | ||
3000 | uint32_t queue_mode:3; | ||
3001 | uint32_t reserved_24_31:8; | ||
3002 | #endif | ||
1847 | } s; | 3003 | } s; |
1848 | struct cvmx_pciercx_cfg468_s cn52xx; | 3004 | struct cvmx_pciercx_cfg468_s cn52xx; |
1849 | struct cvmx_pciercx_cfg468_s cn52xxp1; | 3005 | struct cvmx_pciercx_cfg468_s cn52xxp1; |
@@ -1855,15 +3011,23 @@ union cvmx_pciercx_cfg468 { | |||
1855 | struct cvmx_pciercx_cfg468_s cn66xx; | 3011 | struct cvmx_pciercx_cfg468_s cn66xx; |
1856 | struct cvmx_pciercx_cfg468_s cn68xx; | 3012 | struct cvmx_pciercx_cfg468_s cn68xx; |
1857 | struct cvmx_pciercx_cfg468_s cn68xxp1; | 3013 | struct cvmx_pciercx_cfg468_s cn68xxp1; |
3014 | struct cvmx_pciercx_cfg468_s cnf71xx; | ||
1858 | }; | 3015 | }; |
1859 | 3016 | ||
1860 | union cvmx_pciercx_cfg490 { | 3017 | union cvmx_pciercx_cfg490 { |
1861 | uint32_t u32; | 3018 | uint32_t u32; |
1862 | struct cvmx_pciercx_cfg490_s { | 3019 | struct cvmx_pciercx_cfg490_s { |
3020 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1863 | uint32_t reserved_26_31:6; | 3021 | uint32_t reserved_26_31:6; |
1864 | uint32_t header_depth:10; | 3022 | uint32_t header_depth:10; |
1865 | uint32_t reserved_14_15:2; | 3023 | uint32_t reserved_14_15:2; |
1866 | uint32_t data_depth:14; | 3024 | uint32_t data_depth:14; |
3025 | #else | ||
3026 | uint32_t data_depth:14; | ||
3027 | uint32_t reserved_14_15:2; | ||
3028 | uint32_t header_depth:10; | ||
3029 | uint32_t reserved_26_31:6; | ||
3030 | #endif | ||
1867 | } s; | 3031 | } s; |
1868 | struct cvmx_pciercx_cfg490_s cn52xx; | 3032 | struct cvmx_pciercx_cfg490_s cn52xx; |
1869 | struct cvmx_pciercx_cfg490_s cn52xxp1; | 3033 | struct cvmx_pciercx_cfg490_s cn52xxp1; |
@@ -1875,15 +3039,23 @@ union cvmx_pciercx_cfg490 { | |||
1875 | struct cvmx_pciercx_cfg490_s cn66xx; | 3039 | struct cvmx_pciercx_cfg490_s cn66xx; |
1876 | struct cvmx_pciercx_cfg490_s cn68xx; | 3040 | struct cvmx_pciercx_cfg490_s cn68xx; |
1877 | struct cvmx_pciercx_cfg490_s cn68xxp1; | 3041 | struct cvmx_pciercx_cfg490_s cn68xxp1; |
3042 | struct cvmx_pciercx_cfg490_s cnf71xx; | ||
1878 | }; | 3043 | }; |
1879 | 3044 | ||
1880 | union cvmx_pciercx_cfg491 { | 3045 | union cvmx_pciercx_cfg491 { |
1881 | uint32_t u32; | 3046 | uint32_t u32; |
1882 | struct cvmx_pciercx_cfg491_s { | 3047 | struct cvmx_pciercx_cfg491_s { |
3048 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1883 | uint32_t reserved_26_31:6; | 3049 | uint32_t reserved_26_31:6; |
1884 | uint32_t header_depth:10; | 3050 | uint32_t header_depth:10; |
1885 | uint32_t reserved_14_15:2; | 3051 | uint32_t reserved_14_15:2; |
1886 | uint32_t data_depth:14; | 3052 | uint32_t data_depth:14; |
3053 | #else | ||
3054 | uint32_t data_depth:14; | ||
3055 | uint32_t reserved_14_15:2; | ||
3056 | uint32_t header_depth:10; | ||
3057 | uint32_t reserved_26_31:6; | ||
3058 | #endif | ||
1887 | } s; | 3059 | } s; |
1888 | struct cvmx_pciercx_cfg491_s cn52xx; | 3060 | struct cvmx_pciercx_cfg491_s cn52xx; |
1889 | struct cvmx_pciercx_cfg491_s cn52xxp1; | 3061 | struct cvmx_pciercx_cfg491_s cn52xxp1; |
@@ -1895,15 +3067,23 @@ union cvmx_pciercx_cfg491 { | |||
1895 | struct cvmx_pciercx_cfg491_s cn66xx; | 3067 | struct cvmx_pciercx_cfg491_s cn66xx; |
1896 | struct cvmx_pciercx_cfg491_s cn68xx; | 3068 | struct cvmx_pciercx_cfg491_s cn68xx; |
1897 | struct cvmx_pciercx_cfg491_s cn68xxp1; | 3069 | struct cvmx_pciercx_cfg491_s cn68xxp1; |
3070 | struct cvmx_pciercx_cfg491_s cnf71xx; | ||
1898 | }; | 3071 | }; |
1899 | 3072 | ||
1900 | union cvmx_pciercx_cfg492 { | 3073 | union cvmx_pciercx_cfg492 { |
1901 | uint32_t u32; | 3074 | uint32_t u32; |
1902 | struct cvmx_pciercx_cfg492_s { | 3075 | struct cvmx_pciercx_cfg492_s { |
3076 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1903 | uint32_t reserved_26_31:6; | 3077 | uint32_t reserved_26_31:6; |
1904 | uint32_t header_depth:10; | 3078 | uint32_t header_depth:10; |
1905 | uint32_t reserved_14_15:2; | 3079 | uint32_t reserved_14_15:2; |
1906 | uint32_t data_depth:14; | 3080 | uint32_t data_depth:14; |
3081 | #else | ||
3082 | uint32_t data_depth:14; | ||
3083 | uint32_t reserved_14_15:2; | ||
3084 | uint32_t header_depth:10; | ||
3085 | uint32_t reserved_26_31:6; | ||
3086 | #endif | ||
1907 | } s; | 3087 | } s; |
1908 | struct cvmx_pciercx_cfg492_s cn52xx; | 3088 | struct cvmx_pciercx_cfg492_s cn52xx; |
1909 | struct cvmx_pciercx_cfg492_s cn52xxp1; | 3089 | struct cvmx_pciercx_cfg492_s cn52xxp1; |
@@ -1915,11 +3095,13 @@ union cvmx_pciercx_cfg492 { | |||
1915 | struct cvmx_pciercx_cfg492_s cn66xx; | 3095 | struct cvmx_pciercx_cfg492_s cn66xx; |
1916 | struct cvmx_pciercx_cfg492_s cn68xx; | 3096 | struct cvmx_pciercx_cfg492_s cn68xx; |
1917 | struct cvmx_pciercx_cfg492_s cn68xxp1; | 3097 | struct cvmx_pciercx_cfg492_s cn68xxp1; |
3098 | struct cvmx_pciercx_cfg492_s cnf71xx; | ||
1918 | }; | 3099 | }; |
1919 | 3100 | ||
1920 | union cvmx_pciercx_cfg515 { | 3101 | union cvmx_pciercx_cfg515 { |
1921 | uint32_t u32; | 3102 | uint32_t u32; |
1922 | struct cvmx_pciercx_cfg515_s { | 3103 | struct cvmx_pciercx_cfg515_s { |
3104 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1923 | uint32_t reserved_21_31:11; | 3105 | uint32_t reserved_21_31:11; |
1924 | uint32_t s_d_e:1; | 3106 | uint32_t s_d_e:1; |
1925 | uint32_t ctcrb:1; | 3107 | uint32_t ctcrb:1; |
@@ -1927,6 +3109,15 @@ union cvmx_pciercx_cfg515 { | |||
1927 | uint32_t dsc:1; | 3109 | uint32_t dsc:1; |
1928 | uint32_t le:9; | 3110 | uint32_t le:9; |
1929 | uint32_t n_fts:8; | 3111 | uint32_t n_fts:8; |
3112 | #else | ||
3113 | uint32_t n_fts:8; | ||
3114 | uint32_t le:9; | ||
3115 | uint32_t dsc:1; | ||
3116 | uint32_t cpyts:1; | ||
3117 | uint32_t ctcrb:1; | ||
3118 | uint32_t s_d_e:1; | ||
3119 | uint32_t reserved_21_31:11; | ||
3120 | #endif | ||
1930 | } s; | 3121 | } s; |
1931 | struct cvmx_pciercx_cfg515_s cn61xx; | 3122 | struct cvmx_pciercx_cfg515_s cn61xx; |
1932 | struct cvmx_pciercx_cfg515_s cn63xx; | 3123 | struct cvmx_pciercx_cfg515_s cn63xx; |
@@ -1934,12 +3125,17 @@ union cvmx_pciercx_cfg515 { | |||
1934 | struct cvmx_pciercx_cfg515_s cn66xx; | 3125 | struct cvmx_pciercx_cfg515_s cn66xx; |
1935 | struct cvmx_pciercx_cfg515_s cn68xx; | 3126 | struct cvmx_pciercx_cfg515_s cn68xx; |
1936 | struct cvmx_pciercx_cfg515_s cn68xxp1; | 3127 | struct cvmx_pciercx_cfg515_s cn68xxp1; |
3128 | struct cvmx_pciercx_cfg515_s cnf71xx; | ||
1937 | }; | 3129 | }; |
1938 | 3130 | ||
1939 | union cvmx_pciercx_cfg516 { | 3131 | union cvmx_pciercx_cfg516 { |
1940 | uint32_t u32; | 3132 | uint32_t u32; |
1941 | struct cvmx_pciercx_cfg516_s { | 3133 | struct cvmx_pciercx_cfg516_s { |
3134 | #ifdef __BIG_ENDIAN_BITFIELD | ||
3135 | uint32_t phy_stat:32; | ||
3136 | #else | ||
1942 | uint32_t phy_stat:32; | 3137 | uint32_t phy_stat:32; |
3138 | #endif | ||
1943 | } s; | 3139 | } s; |
1944 | struct cvmx_pciercx_cfg516_s cn52xx; | 3140 | struct cvmx_pciercx_cfg516_s cn52xx; |
1945 | struct cvmx_pciercx_cfg516_s cn52xxp1; | 3141 | struct cvmx_pciercx_cfg516_s cn52xxp1; |
@@ -1951,12 +3147,17 @@ union cvmx_pciercx_cfg516 { | |||
1951 | struct cvmx_pciercx_cfg516_s cn66xx; | 3147 | struct cvmx_pciercx_cfg516_s cn66xx; |
1952 | struct cvmx_pciercx_cfg516_s cn68xx; | 3148 | struct cvmx_pciercx_cfg516_s cn68xx; |
1953 | struct cvmx_pciercx_cfg516_s cn68xxp1; | 3149 | struct cvmx_pciercx_cfg516_s cn68xxp1; |
3150 | struct cvmx_pciercx_cfg516_s cnf71xx; | ||
1954 | }; | 3151 | }; |
1955 | 3152 | ||
1956 | union cvmx_pciercx_cfg517 { | 3153 | union cvmx_pciercx_cfg517 { |
1957 | uint32_t u32; | 3154 | uint32_t u32; |
1958 | struct cvmx_pciercx_cfg517_s { | 3155 | struct cvmx_pciercx_cfg517_s { |
3156 | #ifdef __BIG_ENDIAN_BITFIELD | ||
3157 | uint32_t phy_ctrl:32; | ||
3158 | #else | ||
1959 | uint32_t phy_ctrl:32; | 3159 | uint32_t phy_ctrl:32; |
3160 | #endif | ||
1960 | } s; | 3161 | } s; |
1961 | struct cvmx_pciercx_cfg517_s cn52xx; | 3162 | struct cvmx_pciercx_cfg517_s cn52xx; |
1962 | struct cvmx_pciercx_cfg517_s cn52xxp1; | 3163 | struct cvmx_pciercx_cfg517_s cn52xxp1; |
@@ -1968,6 +3169,7 @@ union cvmx_pciercx_cfg517 { | |||
1968 | struct cvmx_pciercx_cfg517_s cn66xx; | 3169 | struct cvmx_pciercx_cfg517_s cn66xx; |
1969 | struct cvmx_pciercx_cfg517_s cn68xx; | 3170 | struct cvmx_pciercx_cfg517_s cn68xx; |
1970 | struct cvmx_pciercx_cfg517_s cn68xxp1; | 3171 | struct cvmx_pciercx_cfg517_s cn68xxp1; |
3172 | struct cvmx_pciercx_cfg517_s cnf71xx; | ||
1971 | }; | 3173 | }; |
1972 | 3174 | ||
1973 | #endif | 3175 | #endif |