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-rw-r--r--arch/mips/include/asm/mipsregs.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index a581d60cbcc2..f4ab3139d737 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -406,6 +406,16 @@
406#define ST0_XX 0x80000000 /* MIPS IV naming */ 406#define ST0_XX 0x80000000 /* MIPS IV naming */
407 407
408/* 408/*
409 * Bitfields and bit numbers in the coprocessor 0 IntCtl register. (MIPSR2)
410 *
411 * Refer to your MIPS R4xx0 manual, chapter 5 for explanation.
412 */
413#define INTCTLB_IPPCI 26
414#define INTCTLF_IPPCI (_ULCAST_(7) << INTCTLB_IPPCI)
415#define INTCTLB_IPTI 29
416#define INTCTLF_IPTI (_ULCAST_(7) << INTCTLB_IPTI)
417
418/*
409 * Bitfields and bit numbers in the coprocessor 0 cause register. 419 * Bitfields and bit numbers in the coprocessor 0 cause register.
410 * 420 *
411 * Refer to your MIPS R4xx0 manual, chapter 5 for explanation. 421 * Refer to your MIPS R4xx0 manual, chapter 5 for explanation.
@@ -434,6 +444,8 @@
434#define CAUSEF_IV (_ULCAST_(1) << 23) 444#define CAUSEF_IV (_ULCAST_(1) << 23)
435#define CAUSEB_CE 28 445#define CAUSEB_CE 28
436#define CAUSEF_CE (_ULCAST_(3) << 28) 446#define CAUSEF_CE (_ULCAST_(3) << 28)
447#define CAUSEB_TI 30
448#define CAUSEF_TI (_ULCAST_(1) << 30)
437#define CAUSEB_BD 31 449#define CAUSEB_BD 31
438#define CAUSEF_BD (_ULCAST_(1) << 31) 450#define CAUSEF_BD (_ULCAST_(1) << 31)
439 451