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Diffstat (limited to 'arch/mips/include/asm/mipsregs.h')
-rw-r--r--arch/mips/include/asm/mipsregs.h26
1 files changed, 15 insertions, 11 deletions
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 7e4e6f8fab37..1ad3e34e18e6 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -1142,17 +1142,21 @@ do { \
1142/* 1142/*
1143 * Macros to access the floating point coprocessor control registers 1143 * Macros to access the floating point coprocessor control registers
1144 */ 1144 */
1145#define read_32bit_cp1_register(source) \ 1145#define read_32bit_cp1_register(source) \
1146({ int __res; \ 1146({ \
1147 __asm__ __volatile__( \ 1147 int __res; \
1148 ".set\tpush\n\t" \ 1148 \
1149 ".set\treorder\n\t" \ 1149 __asm__ __volatile__( \
1150 /* gas fails to assemble cfc1 for some archs (octeon).*/ \ 1150 " .set push \n" \
1151 ".set\tmips1\n\t" \ 1151 " .set reorder \n" \
1152 "cfc1\t%0,"STR(source)"\n\t" \ 1152 " # gas fails to assemble cfc1 for some archs, \n" \
1153 ".set\tpop" \ 1153 " # like Octeon. \n" \
1154 : "=r" (__res)); \ 1154 " .set mips1 \n" \
1155 __res;}) 1155 " cfc1 %0,"STR(source)" \n" \
1156 " .set pop \n" \
1157 : "=r" (__res)); \
1158 __res; \
1159})
1156 1160
1157#define rddsp(mask) \ 1161#define rddsp(mask) \
1158({ \ 1162({ \