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-rw-r--r--arch/mips/include/asm/mach-lantiq/lantiq.h27
-rw-r--r--arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h5
2 files changed, 17 insertions, 15 deletions
diff --git a/arch/mips/include/asm/mach-lantiq/lantiq.h b/arch/mips/include/asm/mach-lantiq/lantiq.h
index 7a90190bc387..6775d2402cd0 100644
--- a/arch/mips/include/asm/mach-lantiq/lantiq.h
+++ b/arch/mips/include/asm/mach-lantiq/lantiq.h
@@ -9,6 +9,8 @@
9#define _LANTIQ_H__ 9#define _LANTIQ_H__
10 10
11#include <linux/irq.h> 11#include <linux/irq.h>
12#include <linux/device.h>
13#include <linux/clk.h>
12 14
13/* generic reg access functions */ 15/* generic reg access functions */
14#define ltq_r32(reg) __raw_readl(reg) 16#define ltq_r32(reg) __raw_readl(reg)
@@ -21,26 +23,13 @@
21/* register access macros for EBU and CGU */ 23/* register access macros for EBU and CGU */
22#define ltq_ebu_w32(x, y) ltq_w32((x), ltq_ebu_membase + (y)) 24#define ltq_ebu_w32(x, y) ltq_w32((x), ltq_ebu_membase + (y))
23#define ltq_ebu_r32(x) ltq_r32(ltq_ebu_membase + (x)) 25#define ltq_ebu_r32(x) ltq_r32(ltq_ebu_membase + (x))
24#define ltq_cgu_w32(x, y) ltq_w32((x), ltq_cgu_membase + (y)) 26#define ltq_ebu_w32_mask(x, y, z) \
25#define ltq_cgu_r32(x) ltq_r32(ltq_cgu_membase + (x)) 27 ltq_w32_mask(x, y, ltq_ebu_membase + (z))
26
27extern __iomem void *ltq_ebu_membase; 28extern __iomem void *ltq_ebu_membase;
28extern __iomem void *ltq_cgu_membase;
29 29
30extern unsigned int ltq_get_cpu_ver(void); 30extern unsigned int ltq_get_cpu_ver(void);
31extern unsigned int ltq_get_soc_type(void); 31extern unsigned int ltq_get_soc_type(void);
32 32
33/* clock speeds */
34#define CLOCK_60M 60000000
35#define CLOCK_83M 83333333
36#define CLOCK_111M 111111111
37#define CLOCK_133M 133333333
38#define CLOCK_167M 166666667
39#define CLOCK_200M 200000000
40#define CLOCK_266M 266666666
41#define CLOCK_333M 333333333
42#define CLOCK_400M 400000000
43
44/* spinlock all ebu i/o */ 33/* spinlock all ebu i/o */
45extern spinlock_t ebu_lock; 34extern spinlock_t ebu_lock;
46 35
@@ -48,6 +37,14 @@ extern spinlock_t ebu_lock;
48extern void ltq_disable_irq(struct irq_data *data); 37extern void ltq_disable_irq(struct irq_data *data);
49extern void ltq_mask_and_ack_irq(struct irq_data *data); 38extern void ltq_mask_and_ack_irq(struct irq_data *data);
50extern void ltq_enable_irq(struct irq_data *data); 39extern void ltq_enable_irq(struct irq_data *data);
40
41/* clock handling */
42extern int clk_activate(struct clk *clk);
43extern void clk_deactivate(struct clk *clk);
44extern struct clk *clk_get_cpu(void);
45extern struct clk *clk_get_fpi(void);
46extern struct clk *clk_get_io(void);
47
51/* find out what bootsource we have */ 48/* find out what bootsource we have */
52extern unsigned char ltq_boot_select(void); 49extern unsigned char ltq_boot_select(void);
53/* find out what caused the last cpu reset */ 50/* find out what caused the last cpu reset */
diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
index 150c7bef5a14..b5a2acf9156f 100644
--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
@@ -59,6 +59,11 @@
59#define BS_NAND 0x6 59#define BS_NAND 0x6
60#define BS_RMII0 0x7 60#define BS_RMII0 0x7
61 61
62/* helpers used to access the cgu */
63#define ltq_cgu_w32(x, y) ltq_w32((x), ltq_cgu_membase + (y))
64#define ltq_cgu_r32(x) ltq_r32(ltq_cgu_membase + (x))
65extern __iomem void *ltq_cgu_membase;
66
62/* 67/*
63 * during early_printk no ioremap is possible 68 * during early_printk no ioremap is possible
64 * lets use KSEG1 instead 69 * lets use KSEG1 instead