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-rw-r--r--arch/mips/include/asm/mach-au1x00/au1000.h14
-rw-r--r--arch/mips/include/asm/mach-au1x00/ioremap.h2
2 files changed, 1 insertions, 15 deletions
diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h
index 2805fc56484d..ae07423e6e82 100644
--- a/arch/mips/include/asm/mach-au1x00/au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/au1000.h
@@ -1678,18 +1678,4 @@ enum soc_au1200_ints {
1678 1678
1679#endif 1679#endif
1680 1680
1681/*
1682 * All Au1xx0 SOCs have a PCMCIA controller.
1683 * We setup our 32-bit pseudo addresses to be equal to the
1684 * 36-bit addr >> 4, to make it easier to check the address
1685 * and fix it.
1686 * The PCMCIA socket 0 physical attribute address is 0xF 4000 0000.
1687 * The pseudo address we use is 0xF400 0000. Any address over
1688 * 0xF400 0000 is a PCMCIA pseudo address.
1689 */
1690#define PCMCIA_IO_PSEUDO_PHYS (PCMCIA_IO_PHYS_ADDR >> 4)
1691#define PCMCIA_ATTR_PSEUDO_PHYS (PCMCIA_ATTR_PHYS_ADDR >> 4)
1692#define PCMCIA_MEM_PSEUDO_PHYS (PCMCIA_MEM_PHYS_ADDR >> 4)
1693#define PCMCIA_PSEUDO_END (0xffffffff)
1694
1695#endif 1681#endif
diff --git a/arch/mips/include/asm/mach-au1x00/ioremap.h b/arch/mips/include/asm/mach-au1x00/ioremap.h
index 364cea2dc71f..75a94ad3ac91 100644
--- a/arch/mips/include/asm/mach-au1x00/ioremap.h
+++ b/arch/mips/include/asm/mach-au1x00/ioremap.h
@@ -11,7 +11,7 @@
11 11
12#include <linux/types.h> 12#include <linux/types.h>
13 13
14#ifdef CONFIG_64BIT_PHYS_ADDR 14#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_PCI)
15extern phys_t __fixup_bigphys_addr(phys_t, phys_t); 15extern phys_t __fixup_bigphys_addr(phys_t, phys_t);
16#else 16#else
17static inline phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size) 17static inline phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)