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-rw-r--r--arch/mips/include/asm/gic.h15
1 files changed, 14 insertions, 1 deletions
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h
index 86548da650e7..991b659e2548 100644
--- a/arch/mips/include/asm/gic.h
+++ b/arch/mips/include/asm/gic.h
@@ -206,7 +206,7 @@
206 206
207#define GIC_VPE_EIC_SHADOW_SET_BASE 0x0100 207#define GIC_VPE_EIC_SHADOW_SET_BASE 0x0100
208#define GIC_VPE_EIC_SS(intr) \ 208#define GIC_VPE_EIC_SS(intr) \
209 (GIC_EIC_SHADOW_SET_BASE + (4 * intr)) 209 (GIC_VPE_EIC_SHADOW_SET_BASE + (4 * intr))
210 210
211#define GIC_VPE_EIC_VEC_BASE 0x0800 211#define GIC_VPE_EIC_VEC_BASE 0x0800
212#define GIC_VPE_EIC_VEC(intr) \ 212#define GIC_VPE_EIC_VEC(intr) \
@@ -330,6 +330,17 @@ struct gic_intr_map {
330#define GIC_FLAG_TRANSPARENT 0x02 330#define GIC_FLAG_TRANSPARENT 0x02
331}; 331};
332 332
333/*
334 * This is only used in EIC mode. This helps to figure out which
335 * shared interrupts we need to process when we get a vector interrupt.
336 */
337#define GIC_MAX_SHARED_INTR 0x5
338struct gic_shared_intr_map {
339 unsigned int num_shared_intr;
340 unsigned int intr_list[GIC_MAX_SHARED_INTR];
341 unsigned int local_intr_mask;
342};
343
333extern void gic_init(unsigned long gic_base_addr, 344extern void gic_init(unsigned long gic_base_addr,
334 unsigned long gic_addrspace_size, struct gic_intr_map *intrmap, 345 unsigned long gic_addrspace_size, struct gic_intr_map *intrmap,
335 unsigned int intrmap_size, unsigned int irqbase); 346 unsigned int intrmap_size, unsigned int irqbase);
@@ -338,5 +349,7 @@ extern unsigned int gic_get_int(void);
338extern void gic_send_ipi(unsigned int intr); 349extern void gic_send_ipi(unsigned int intr);
339extern unsigned int plat_ipi_call_int_xlate(unsigned int); 350extern unsigned int plat_ipi_call_int_xlate(unsigned int);
340extern unsigned int plat_ipi_resched_int_xlate(unsigned int); 351extern unsigned int plat_ipi_resched_int_xlate(unsigned int);
352extern void gic_bind_eic_interrupt(int irq, int set);
353extern unsigned int gic_get_timer_pending(void);
341 354
342#endif /* _ASM_GICREGS_H */ 355#endif /* _ASM_GICREGS_H */