diff options
Diffstat (limited to 'arch/mips/include/asm/futex.h')
| -rw-r--r-- | arch/mips/include/asm/futex.h | 27 |
1 files changed, 19 insertions, 8 deletions
diff --git a/arch/mips/include/asm/futex.h b/arch/mips/include/asm/futex.h index 194cda0396a3..ef9987a61d88 100644 --- a/arch/mips/include/asm/futex.h +++ b/arch/mips/include/asm/futex.h | |||
| @@ -14,6 +14,7 @@ | |||
| 14 | #include <linux/uaccess.h> | 14 | #include <linux/uaccess.h> |
| 15 | #include <asm/asm-eva.h> | 15 | #include <asm/asm-eva.h> |
| 16 | #include <asm/barrier.h> | 16 | #include <asm/barrier.h> |
| 17 | #include <asm/compiler.h> | ||
| 17 | #include <asm/errno.h> | 18 | #include <asm/errno.h> |
| 18 | #include <asm/war.h> | 19 | #include <asm/war.h> |
| 19 | 20 | ||
| @@ -32,6 +33,7 @@ | |||
| 32 | " beqzl $1, 1b \n" \ | 33 | " beqzl $1, 1b \n" \ |
| 33 | __WEAK_LLSC_MB \ | 34 | __WEAK_LLSC_MB \ |
| 34 | "3: \n" \ | 35 | "3: \n" \ |
| 36 | " .insn \n" \ | ||
| 35 | " .set pop \n" \ | 37 | " .set pop \n" \ |
| 36 | " .set mips0 \n" \ | 38 | " .set mips0 \n" \ |
| 37 | " .section .fixup,\"ax\" \n" \ | 39 | " .section .fixup,\"ax\" \n" \ |
| @@ -42,8 +44,10 @@ | |||
| 42 | " "__UA_ADDR "\t1b, 4b \n" \ | 44 | " "__UA_ADDR "\t1b, 4b \n" \ |
| 43 | " "__UA_ADDR "\t2b, 4b \n" \ | 45 | " "__UA_ADDR "\t2b, 4b \n" \ |
| 44 | " .previous \n" \ | 46 | " .previous \n" \ |
| 45 | : "=r" (ret), "=&r" (oldval), "=R" (*uaddr) \ | 47 | : "=r" (ret), "=&r" (oldval), \ |
| 46 | : "0" (0), "R" (*uaddr), "Jr" (oparg), "i" (-EFAULT) \ | 48 | "=" GCC_OFF12_ASM() (*uaddr) \ |
| 49 | : "0" (0), GCC_OFF12_ASM() (*uaddr), "Jr" (oparg), \ | ||
| 50 | "i" (-EFAULT) \ | ||
| 47 | : "memory"); \ | 51 | : "memory"); \ |
| 48 | } else if (cpu_has_llsc) { \ | 52 | } else if (cpu_has_llsc) { \ |
| 49 | __asm__ __volatile__( \ | 53 | __asm__ __volatile__( \ |
| @@ -58,6 +62,7 @@ | |||
| 58 | " beqz $1, 1b \n" \ | 62 | " beqz $1, 1b \n" \ |
| 59 | __WEAK_LLSC_MB \ | 63 | __WEAK_LLSC_MB \ |
| 60 | "3: \n" \ | 64 | "3: \n" \ |
| 65 | " .insn \n" \ | ||
| 61 | " .set pop \n" \ | 66 | " .set pop \n" \ |
| 62 | " .set mips0 \n" \ | 67 | " .set mips0 \n" \ |
| 63 | " .section .fixup,\"ax\" \n" \ | 68 | " .section .fixup,\"ax\" \n" \ |
| @@ -68,8 +73,10 @@ | |||
| 68 | " "__UA_ADDR "\t1b, 4b \n" \ | 73 | " "__UA_ADDR "\t1b, 4b \n" \ |
| 69 | " "__UA_ADDR "\t2b, 4b \n" \ | 74 | " "__UA_ADDR "\t2b, 4b \n" \ |
| 70 | " .previous \n" \ | 75 | " .previous \n" \ |
| 71 | : "=r" (ret), "=&r" (oldval), "=R" (*uaddr) \ | 76 | : "=r" (ret), "=&r" (oldval), \ |
| 72 | : "0" (0), "R" (*uaddr), "Jr" (oparg), "i" (-EFAULT) \ | 77 | "=" GCC_OFF12_ASM() (*uaddr) \ |
| 78 | : "0" (0), GCC_OFF12_ASM() (*uaddr), "Jr" (oparg), \ | ||
| 79 | "i" (-EFAULT) \ | ||
| 73 | : "memory"); \ | 80 | : "memory"); \ |
| 74 | } else \ | 81 | } else \ |
| 75 | ret = -ENOSYS; \ | 82 | ret = -ENOSYS; \ |
| @@ -157,6 +164,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, | |||
| 157 | " beqzl $1, 1b \n" | 164 | " beqzl $1, 1b \n" |
| 158 | __WEAK_LLSC_MB | 165 | __WEAK_LLSC_MB |
| 159 | "3: \n" | 166 | "3: \n" |
| 167 | " .insn \n" | ||
| 160 | " .set pop \n" | 168 | " .set pop \n" |
| 161 | " .section .fixup,\"ax\" \n" | 169 | " .section .fixup,\"ax\" \n" |
| 162 | "4: li %0, %6 \n" | 170 | "4: li %0, %6 \n" |
| @@ -166,8 +174,9 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, | |||
| 166 | " "__UA_ADDR "\t1b, 4b \n" | 174 | " "__UA_ADDR "\t1b, 4b \n" |
| 167 | " "__UA_ADDR "\t2b, 4b \n" | 175 | " "__UA_ADDR "\t2b, 4b \n" |
| 168 | " .previous \n" | 176 | " .previous \n" |
| 169 | : "+r" (ret), "=&r" (val), "=R" (*uaddr) | 177 | : "+r" (ret), "=&r" (val), "=" GCC_OFF12_ASM() (*uaddr) |
| 170 | : "R" (*uaddr), "Jr" (oldval), "Jr" (newval), "i" (-EFAULT) | 178 | : GCC_OFF12_ASM() (*uaddr), "Jr" (oldval), "Jr" (newval), |
| 179 | "i" (-EFAULT) | ||
| 171 | : "memory"); | 180 | : "memory"); |
| 172 | } else if (cpu_has_llsc) { | 181 | } else if (cpu_has_llsc) { |
| 173 | __asm__ __volatile__( | 182 | __asm__ __volatile__( |
| @@ -184,6 +193,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, | |||
| 184 | " beqz $1, 1b \n" | 193 | " beqz $1, 1b \n" |
| 185 | __WEAK_LLSC_MB | 194 | __WEAK_LLSC_MB |
| 186 | "3: \n" | 195 | "3: \n" |
| 196 | " .insn \n" | ||
| 187 | " .set pop \n" | 197 | " .set pop \n" |
| 188 | " .section .fixup,\"ax\" \n" | 198 | " .section .fixup,\"ax\" \n" |
| 189 | "4: li %0, %6 \n" | 199 | "4: li %0, %6 \n" |
| @@ -193,8 +203,9 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, | |||
| 193 | " "__UA_ADDR "\t1b, 4b \n" | 203 | " "__UA_ADDR "\t1b, 4b \n" |
| 194 | " "__UA_ADDR "\t2b, 4b \n" | 204 | " "__UA_ADDR "\t2b, 4b \n" |
| 195 | " .previous \n" | 205 | " .previous \n" |
| 196 | : "+r" (ret), "=&r" (val), "=R" (*uaddr) | 206 | : "+r" (ret), "=&r" (val), "=" GCC_OFF12_ASM() (*uaddr) |
| 197 | : "R" (*uaddr), "Jr" (oldval), "Jr" (newval), "i" (-EFAULT) | 207 | : GCC_OFF12_ASM() (*uaddr), "Jr" (oldval), "Jr" (newval), |
| 208 | "i" (-EFAULT) | ||
| 198 | : "memory"); | 209 | : "memory"); |
| 199 | } else | 210 | } else |
| 200 | return -ENOSYS; | 211 | return -ENOSYS; |