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Diffstat (limited to 'arch/mips/include/asm/emma/emma2rh.h')
-rw-r--r--arch/mips/include/asm/emma/emma2rh.h84
1 files changed, 9 insertions, 75 deletions
diff --git a/arch/mips/include/asm/emma/emma2rh.h b/arch/mips/include/asm/emma/emma2rh.h
index 2afb2fe11b30..c1449d20ef0e 100644
--- a/arch/mips/include/asm/emma/emma2rh.h
+++ b/arch/mips/include/asm/emma/emma2rh.h
@@ -99,88 +99,22 @@
99#define EMMA2RH_PCI_CONFIG_BASE EMMA2RH_PCI_IO_BASE 99#define EMMA2RH_PCI_CONFIG_BASE EMMA2RH_PCI_IO_BASE
100#define EMMA2RH_PCI_CONFIG_SIZE EMMA2RH_PCI_IO_SIZE 100#define EMMA2RH_PCI_CONFIG_SIZE EMMA2RH_PCI_IO_SIZE
101 101
102#define NUM_CPU_IRQ 8
103#define NUM_EMMA2RH_IRQ 96 102#define NUM_EMMA2RH_IRQ 96
104 103
105#define CPU_EMMA2RH_CASCADE 2 104#define EMMA2RH_IRQ_BASE (MIPS_CPU_IRQ_BASE + 8)
106#define CPU_IRQ_BASE MIPS_CPU_IRQ_BASE
107#define EMMA2RH_IRQ_BASE (CPU_IRQ_BASE + NUM_CPU_IRQ)
108 105
109/* 106/*
110 * emma2rh irq defs 107 * emma2rh irq defs
111 */ 108 */
112 109
113#define EMMA2RH_IRQ_INT0 (0 + EMMA2RH_IRQ_BASE) 110#define EMMA2RH_IRQ_INT(n) (EMMA2RH_IRQ_BASE + (n))
114#define EMMA2RH_IRQ_INT1 (1 + EMMA2RH_IRQ_BASE) 111
115#define EMMA2RH_IRQ_INT2 (2 + EMMA2RH_IRQ_BASE) 112#define EMMA2RH_IRQ_PFUR0 EMMA2RH_IRQ_INT(49)
116#define EMMA2RH_IRQ_INT3 (3 + EMMA2RH_IRQ_BASE) 113#define EMMA2RH_IRQ_PFUR1 EMMA2RH_IRQ_INT(50)
117#define EMMA2RH_IRQ_INT4 (4 + EMMA2RH_IRQ_BASE) 114#define EMMA2RH_IRQ_PFUR2 EMMA2RH_IRQ_INT(51)
118#define EMMA2RH_IRQ_INT5 (5 + EMMA2RH_IRQ_BASE) 115#define EMMA2RH_IRQ_PIIC0 EMMA2RH_IRQ_INT(56)
119#define EMMA2RH_IRQ_INT6 (6 + EMMA2RH_IRQ_BASE) 116#define EMMA2RH_IRQ_PIIC1 EMMA2RH_IRQ_INT(57)
120#define EMMA2RH_IRQ_INT7 (7 + EMMA2RH_IRQ_BASE) 117#define EMMA2RH_IRQ_PIIC2 EMMA2RH_IRQ_INT(58)
121#define EMMA2RH_IRQ_INT8 (8 + EMMA2RH_IRQ_BASE)
122#define EMMA2RH_IRQ_INT9 (9 + EMMA2RH_IRQ_BASE)
123#define EMMA2RH_IRQ_INT10 (10 + EMMA2RH_IRQ_BASE)
124#define EMMA2RH_IRQ_INT11 (11 + EMMA2RH_IRQ_BASE)
125#define EMMA2RH_IRQ_INT12 (12 + EMMA2RH_IRQ_BASE)
126#define EMMA2RH_IRQ_INT13 (13 + EMMA2RH_IRQ_BASE)
127#define EMMA2RH_IRQ_INT14 (14 + EMMA2RH_IRQ_BASE)
128#define EMMA2RH_IRQ_INT15 (15 + EMMA2RH_IRQ_BASE)
129#define EMMA2RH_IRQ_INT16 (16 + EMMA2RH_IRQ_BASE)
130#define EMMA2RH_IRQ_INT17 (17 + EMMA2RH_IRQ_BASE)
131#define EMMA2RH_IRQ_INT18 (18 + EMMA2RH_IRQ_BASE)
132#define EMMA2RH_IRQ_INT19 (19 + EMMA2RH_IRQ_BASE)
133#define EMMA2RH_IRQ_INT20 (20 + EMMA2RH_IRQ_BASE)
134#define EMMA2RH_IRQ_INT21 (21 + EMMA2RH_IRQ_BASE)
135#define EMMA2RH_IRQ_INT22 (22 + EMMA2RH_IRQ_BASE)
136#define EMMA2RH_IRQ_INT23 (23 + EMMA2RH_IRQ_BASE)
137#define EMMA2RH_IRQ_INT24 (24 + EMMA2RH_IRQ_BASE)
138#define EMMA2RH_IRQ_INT25 (25 + EMMA2RH_IRQ_BASE)
139#define EMMA2RH_IRQ_INT26 (26 + EMMA2RH_IRQ_BASE)
140#define EMMA2RH_IRQ_INT27 (27 + EMMA2RH_IRQ_BASE)
141#define EMMA2RH_IRQ_INT28 (28 + EMMA2RH_IRQ_BASE)
142#define EMMA2RH_IRQ_INT29 (29 + EMMA2RH_IRQ_BASE)
143#define EMMA2RH_IRQ_INT30 (30 + EMMA2RH_IRQ_BASE)
144#define EMMA2RH_IRQ_INT31 (31 + EMMA2RH_IRQ_BASE)
145#define EMMA2RH_IRQ_INT32 (32 + EMMA2RH_IRQ_BASE)
146#define EMMA2RH_IRQ_INT33 (33 + EMMA2RH_IRQ_BASE)
147#define EMMA2RH_IRQ_INT34 (34 + EMMA2RH_IRQ_BASE)
148#define EMMA2RH_IRQ_INT35 (35 + EMMA2RH_IRQ_BASE)
149#define EMMA2RH_IRQ_INT36 (36 + EMMA2RH_IRQ_BASE)
150#define EMMA2RH_IRQ_INT37 (37 + EMMA2RH_IRQ_BASE)
151#define EMMA2RH_IRQ_INT38 (38 + EMMA2RH_IRQ_BASE)
152#define EMMA2RH_IRQ_INT39 (39 + EMMA2RH_IRQ_BASE)
153#define EMMA2RH_IRQ_INT40 (40 + EMMA2RH_IRQ_BASE)
154#define EMMA2RH_IRQ_INT41 (41 + EMMA2RH_IRQ_BASE)
155#define EMMA2RH_IRQ_INT42 (42 + EMMA2RH_IRQ_BASE)
156#define EMMA2RH_IRQ_INT43 (43 + EMMA2RH_IRQ_BASE)
157#define EMMA2RH_IRQ_INT44 (44 + EMMA2RH_IRQ_BASE)
158#define EMMA2RH_IRQ_INT45 (45 + EMMA2RH_IRQ_BASE)
159#define EMMA2RH_IRQ_INT46 (46 + EMMA2RH_IRQ_BASE)
160#define EMMA2RH_IRQ_INT47 (47 + EMMA2RH_IRQ_BASE)
161#define EMMA2RH_IRQ_INT48 (48 + EMMA2RH_IRQ_BASE)
162#define EMMA2RH_IRQ_INT49 (49 + EMMA2RH_IRQ_BASE)
163#define EMMA2RH_IRQ_INT50 (50 + EMMA2RH_IRQ_BASE)
164#define EMMA2RH_IRQ_INT51 (51 + EMMA2RH_IRQ_BASE)
165#define EMMA2RH_IRQ_INT52 (52 + EMMA2RH_IRQ_BASE)
166#define EMMA2RH_IRQ_INT53 (53 + EMMA2RH_IRQ_BASE)
167#define EMMA2RH_IRQ_INT54 (54 + EMMA2RH_IRQ_BASE)
168#define EMMA2RH_IRQ_INT55 (55 + EMMA2RH_IRQ_BASE)
169#define EMMA2RH_IRQ_INT56 (56 + EMMA2RH_IRQ_BASE)
170#define EMMA2RH_IRQ_INT57 (57 + EMMA2RH_IRQ_BASE)
171#define EMMA2RH_IRQ_INT58 (58 + EMMA2RH_IRQ_BASE)
172#define EMMA2RH_IRQ_INT59 (59 + EMMA2RH_IRQ_BASE)
173#define EMMA2RH_IRQ_INT60 (60 + EMMA2RH_IRQ_BASE)
174#define EMMA2RH_IRQ_INT61 (61 + EMMA2RH_IRQ_BASE)
175#define EMMA2RH_IRQ_INT62 (62 + EMMA2RH_IRQ_BASE)
176#define EMMA2RH_IRQ_INT63 (63 + EMMA2RH_IRQ_BASE)
177
178#define EMMA2RH_IRQ_PFUR0 EMMA2RH_IRQ_INT49
179#define EMMA2RH_IRQ_PFUR1 EMMA2RH_IRQ_INT50
180#define EMMA2RH_IRQ_PFUR2 EMMA2RH_IRQ_INT51
181#define EMMA2RH_IRQ_PIIC0 EMMA2RH_IRQ_INT56
182#define EMMA2RH_IRQ_PIIC1 EMMA2RH_IRQ_INT57
183#define EMMA2RH_IRQ_PIIC2 EMMA2RH_IRQ_INT58
184 118
185/* 119/*
186 * EMMA2RH Register Access 120 * EMMA2RH Register Access