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-rw-r--r--arch/mips/include/asm/div64.h142
1 files changed, 50 insertions, 92 deletions
diff --git a/arch/mips/include/asm/div64.h b/arch/mips/include/asm/div64.h
index d1d699105c11..dc5ea5736440 100644
--- a/arch/mips/include/asm/div64.h
+++ b/arch/mips/include/asm/div64.h
@@ -6,105 +6,63 @@
6 * License. See the file "COPYING" in the main directory of this archive 6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details. 7 * for more details.
8 */ 8 */
9#ifndef _ASM_DIV64_H 9#ifndef __ASM_DIV64_H
10#define _ASM_DIV64_H 10#define __ASM_DIV64_H
11 11
12#include <linux/types.h> 12#include <asm-generic/div64.h>
13 13
14#if (_MIPS_SZLONG == 32) 14#if BITS_PER_LONG == 64
15 15
16#include <asm/compiler.h> 16#include <linux/types.h>
17 17
18/* 18/*
19 * No traps on overflows for any of these... 19 * No traps on overflows for any of these...
20 */ 20 */
21 21
22#define do_div64_32(res, high, low, base) ({ \ 22#define __div64_32(n, base) \
23 unsigned long __quot32, __mod32; \ 23({ \
24 unsigned long __cf, __tmp, __tmp2, __i; \ 24 unsigned long __cf, __tmp, __tmp2, __i; \
25 \ 25 unsigned long __quot32, __mod32; \
26 __asm__(".set push\n\t" \ 26 unsigned long __high, __low; \
27 ".set noat\n\t" \ 27 unsigned long long __n; \
28 ".set noreorder\n\t" \ 28 \
29 "move %2, $0\n\t" \ 29 __high = *__n >> 32; \
30 "move %3, $0\n\t" \ 30 __low = __n; \
31 "b 1f\n\t" \ 31 __asm__( \
32 " li %4, 0x21\n" \ 32 " .set push \n" \
33 "0:\n\t" \ 33 " .set noat \n" \
34 "sll $1, %0, 0x1\n\t" \ 34 " .set noreorder \n" \
35 "srl %3, %0, 0x1f\n\t" \ 35 " move %2, $0 \n" \
36 "or %0, $1, %5\n\t" \ 36 " move %3, $0 \n" \
37 "sll %1, %1, 0x1\n\t" \ 37 " b 1f \n" \
38 "sll %2, %2, 0x1\n" \ 38 " li %4, 0x21 \n" \
39 "1:\n\t" \ 39 "0: \n" \
40 "bnez %3, 2f\n\t" \ 40 " sll $1, %0, 0x1 \n" \
41 " sltu %5, %0, %z6\n\t" \ 41 " srl %3, %0, 0x1f \n" \
42 "bnez %5, 3f\n" \ 42 " or %0, $1, %5 \n" \
43 "2:\n\t" \ 43 " sll %1, %1, 0x1 \n" \
44 " addiu %4, %4, -1\n\t" \ 44 " sll %2, %2, 0x1 \n" \
45 "subu %0, %0, %z6\n\t" \ 45 "1: \n" \
46 "addiu %2, %2, 1\n" \ 46 " bnez %3, 2f \n" \
47 "3:\n\t" \ 47 " sltu %5, %0, %z6 \n" \
48 "bnez %4, 0b\n\t" \ 48 " bnez %5, 3f \n" \
49 " srl %5, %1, 0x1f\n\t" \ 49 "2: \n" \
50 ".set pop" \ 50 " addiu %4, %4, -1 \n" \
51 : "=&r" (__mod32), "=&r" (__tmp), \ 51 " subu %0, %0, %z6 \n" \
52 "=&r" (__quot32), "=&r" (__cf), \ 52 " addiu %2, %2, 1 \n" \
53 "=&r" (__i), "=&r" (__tmp2) \ 53 "3: \n" \
54 : "Jr" (base), "0" (high), "1" (low)); \ 54 " bnez %4, 0b\n\t" \
55 \ 55 " srl %5, %1, 0x1f\n\t" \
56 (res) = __quot32; \ 56 " .set pop" \
57 __mod32; }) 57 : "=&r" (__mod32), "=&r" (__tmp), \
58 58 "=&r" (__quot32), "=&r" (__cf), \
59#define do_div(n, base) ({ \ 59 "=&r" (__i), "=&r" (__tmp2) \
60 unsigned long long __quot; \ 60 : "Jr" (base), "0" (__high), "1" (__low)); \
61 unsigned long __mod; \ 61 \
62 unsigned long long __div; \ 62 (__n) = __quot32; \
63 unsigned long __upper, __low, __high, __base; \ 63 __mod32; \
64 \ 64})
65 __div = (n); \
66 __base = (base); \
67 \
68 __high = __div >> 32; \
69 __low = __div; \
70 __upper = __high; \
71 \
72 if (__high) \
73 __asm__("divu $0, %z2, %z3" \
74 : "=h" (__upper), "=l" (__high) \
75 : "Jr" (__high), "Jr" (__base) \
76 : GCC_REG_ACCUM); \
77 \
78 __mod = do_div64_32(__low, __upper, __low, __base); \
79 \
80 __quot = __high; \
81 __quot = __quot << 32 | __low; \
82 (n) = __quot; \
83 __mod; })
84
85#endif /* (_MIPS_SZLONG == 32) */
86
87#if (_MIPS_SZLONG == 64)
88
89/*
90 * Hey, we're already 64-bit, no
91 * need to play games..
92 */
93#define do_div(n, base) ({ \
94 unsigned long __quot; \
95 unsigned int __mod; \
96 unsigned long __div; \
97 unsigned int __base; \
98 \
99 __div = (n); \
100 __base = (base); \
101 \
102 __mod = __div % __base; \
103 __quot = __div / __base; \
104 \
105 (n) = __quot; \
106 __mod; })
107 65
108#endif /* (_MIPS_SZLONG == 64) */ 66#endif /* BITS_PER_LONG == 64 */
109 67
110#endif /* _ASM_DIV64_H */ 68#endif /* __ASM_DIV64_H */