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-rw-r--r--arch/mips/include/asm/cpu.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 632bbe5a79ea..71b9f1998be7 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -141,6 +141,9 @@
141#define PRID_IMP_CAVIUM_CN68XX 0x9100 141#define PRID_IMP_CAVIUM_CN68XX 0x9100
142#define PRID_IMP_CAVIUM_CN66XX 0x9200 142#define PRID_IMP_CAVIUM_CN66XX 0x9200
143#define PRID_IMP_CAVIUM_CN61XX 0x9300 143#define PRID_IMP_CAVIUM_CN61XX 0x9300
144#define PRID_IMP_CAVIUM_CNF71XX 0x9400
145#define PRID_IMP_CAVIUM_CN78XX 0x9500
146#define PRID_IMP_CAVIUM_CN70XX 0x9600
144 147
145/* 148/*
146 * These are the PRID's for when 23:16 == PRID_COMP_INGENIC 149 * These are the PRID's for when 23:16 == PRID_COMP_INGENIC
@@ -176,6 +179,7 @@
176 179
177#define PRID_IMP_NETLOGIC_XLP8XX 0x1000 180#define PRID_IMP_NETLOGIC_XLP8XX 0x1000
178#define PRID_IMP_NETLOGIC_XLP3XX 0x1100 181#define PRID_IMP_NETLOGIC_XLP3XX 0x1100
182#define PRID_IMP_NETLOGIC_XLP2XX 0x1200
179 183
180/* 184/*
181 * Definitions for 7:0 on legacy processors 185 * Definitions for 7:0 on legacy processors
@@ -272,7 +276,7 @@ enum cpu_type_enum {
272 */ 276 */
273 CPU_5KC, CPU_5KE, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2, 277 CPU_5KC, CPU_5KE, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2,
274 CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS, CPU_CAVIUM_OCTEON2, 278 CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS, CPU_CAVIUM_OCTEON2,
275 CPU_XLR, CPU_XLP, 279 CPU_CAVIUM_OCTEON3, CPU_XLR, CPU_XLP,
276 280
277 CPU_LAST 281 CPU_LAST
278}; 282};