diff options
Diffstat (limited to 'arch/mips/include/asm/cmpxchg.h')
| -rw-r--r-- | arch/mips/include/asm/cmpxchg.h | 27 |
1 files changed, 15 insertions, 12 deletions
diff --git a/arch/mips/include/asm/cmpxchg.h b/arch/mips/include/asm/cmpxchg.h index eefcaa363a87..28b1edf19501 100644 --- a/arch/mips/include/asm/cmpxchg.h +++ b/arch/mips/include/asm/cmpxchg.h | |||
| @@ -10,6 +10,7 @@ | |||
| 10 | 10 | ||
| 11 | #include <linux/bug.h> | 11 | #include <linux/bug.h> |
| 12 | #include <linux/irqflags.h> | 12 | #include <linux/irqflags.h> |
| 13 | #include <asm/compiler.h> | ||
| 13 | #include <asm/war.h> | 14 | #include <asm/war.h> |
| 14 | 15 | ||
| 15 | static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) | 16 | static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) |
| @@ -30,8 +31,8 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) | |||
| 30 | " sc %2, %1 \n" | 31 | " sc %2, %1 \n" |
| 31 | " beqzl %2, 1b \n" | 32 | " beqzl %2, 1b \n" |
| 32 | " .set mips0 \n" | 33 | " .set mips0 \n" |
| 33 | : "=&r" (retval), "=m" (*m), "=&r" (dummy) | 34 | : "=&r" (retval), "=" GCC_OFF12_ASM() (*m), "=&r" (dummy) |
| 34 | : "R" (*m), "Jr" (val) | 35 | : GCC_OFF12_ASM() (*m), "Jr" (val) |
| 35 | : "memory"); | 36 | : "memory"); |
| 36 | } else if (kernel_uses_llsc) { | 37 | } else if (kernel_uses_llsc) { |
| 37 | unsigned long dummy; | 38 | unsigned long dummy; |
| @@ -45,8 +46,9 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) | |||
| 45 | " .set arch=r4000 \n" | 46 | " .set arch=r4000 \n" |
| 46 | " sc %2, %1 \n" | 47 | " sc %2, %1 \n" |
| 47 | " .set mips0 \n" | 48 | " .set mips0 \n" |
| 48 | : "=&r" (retval), "=m" (*m), "=&r" (dummy) | 49 | : "=&r" (retval), "=" GCC_OFF12_ASM() (*m), |
| 49 | : "R" (*m), "Jr" (val) | 50 | "=&r" (dummy) |
| 51 | : GCC_OFF12_ASM() (*m), "Jr" (val) | ||
| 50 | : "memory"); | 52 | : "memory"); |
| 51 | } while (unlikely(!dummy)); | 53 | } while (unlikely(!dummy)); |
| 52 | } else { | 54 | } else { |
| @@ -80,8 +82,8 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val) | |||
| 80 | " scd %2, %1 \n" | 82 | " scd %2, %1 \n" |
| 81 | " beqzl %2, 1b \n" | 83 | " beqzl %2, 1b \n" |
| 82 | " .set mips0 \n" | 84 | " .set mips0 \n" |
| 83 | : "=&r" (retval), "=m" (*m), "=&r" (dummy) | 85 | : "=&r" (retval), "=" GCC_OFF12_ASM() (*m), "=&r" (dummy) |
| 84 | : "R" (*m), "Jr" (val) | 86 | : GCC_OFF12_ASM() (*m), "Jr" (val) |
| 85 | : "memory"); | 87 | : "memory"); |
| 86 | } else if (kernel_uses_llsc) { | 88 | } else if (kernel_uses_llsc) { |
| 87 | unsigned long dummy; | 89 | unsigned long dummy; |
| @@ -93,8 +95,9 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val) | |||
| 93 | " move %2, %z4 \n" | 95 | " move %2, %z4 \n" |
| 94 | " scd %2, %1 \n" | 96 | " scd %2, %1 \n" |
| 95 | " .set mips0 \n" | 97 | " .set mips0 \n" |
| 96 | : "=&r" (retval), "=m" (*m), "=&r" (dummy) | 98 | : "=&r" (retval), "=" GCC_OFF12_ASM() (*m), |
| 97 | : "R" (*m), "Jr" (val) | 99 | "=&r" (dummy) |
| 100 | : GCC_OFF12_ASM() (*m), "Jr" (val) | ||
| 98 | : "memory"); | 101 | : "memory"); |
| 99 | } while (unlikely(!dummy)); | 102 | } while (unlikely(!dummy)); |
| 100 | } else { | 103 | } else { |
| @@ -155,8 +158,8 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz | |||
| 155 | " beqzl $1, 1b \n" \ | 158 | " beqzl $1, 1b \n" \ |
| 156 | "2: \n" \ | 159 | "2: \n" \ |
| 157 | " .set pop \n" \ | 160 | " .set pop \n" \ |
| 158 | : "=&r" (__ret), "=R" (*m) \ | 161 | : "=&r" (__ret), "=" GCC_OFF12_ASM() (*m) \ |
| 159 | : "R" (*m), "Jr" (old), "Jr" (new) \ | 162 | : GCC_OFF12_ASM() (*m), "Jr" (old), "Jr" (new) \ |
| 160 | : "memory"); \ | 163 | : "memory"); \ |
| 161 | } else if (kernel_uses_llsc) { \ | 164 | } else if (kernel_uses_llsc) { \ |
| 162 | __asm__ __volatile__( \ | 165 | __asm__ __volatile__( \ |
| @@ -172,8 +175,8 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz | |||
| 172 | " beqz $1, 1b \n" \ | 175 | " beqz $1, 1b \n" \ |
| 173 | " .set pop \n" \ | 176 | " .set pop \n" \ |
| 174 | "2: \n" \ | 177 | "2: \n" \ |
| 175 | : "=&r" (__ret), "=R" (*m) \ | 178 | : "=&r" (__ret), "=" GCC_OFF12_ASM() (*m) \ |
| 176 | : "R" (*m), "Jr" (old), "Jr" (new) \ | 179 | : GCC_OFF12_ASM() (*m), "Jr" (old), "Jr" (new) \ |
| 177 | : "memory"); \ | 180 | : "memory"); \ |
| 178 | } else { \ | 181 | } else { \ |
| 179 | unsigned long __flags; \ | 182 | unsigned long __flags; \ |