aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/include/asm/asmmacro.h
diff options
context:
space:
mode:
Diffstat (limited to 'arch/mips/include/asm/asmmacro.h')
-rw-r--r--arch/mips/include/asm/asmmacro.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h
index cd9a98bc8f60..6caf8766b80f 100644
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -57,6 +57,8 @@
57#endif /* CONFIG_CPU_MIPSR2 */ 57#endif /* CONFIG_CPU_MIPSR2 */
58 58
59 .macro fpu_save_16even thread tmp=t0 59 .macro fpu_save_16even thread tmp=t0
60 .set push
61 SET_HARDFLOAT
60 cfc1 \tmp, fcr31 62 cfc1 \tmp, fcr31
61 sdc1 $f0, THREAD_FPR0_LS64(\thread) 63 sdc1 $f0, THREAD_FPR0_LS64(\thread)
62 sdc1 $f2, THREAD_FPR2_LS64(\thread) 64 sdc1 $f2, THREAD_FPR2_LS64(\thread)
@@ -75,11 +77,13 @@
75 sdc1 $f28, THREAD_FPR28_LS64(\thread) 77 sdc1 $f28, THREAD_FPR28_LS64(\thread)
76 sdc1 $f30, THREAD_FPR30_LS64(\thread) 78 sdc1 $f30, THREAD_FPR30_LS64(\thread)
77 sw \tmp, THREAD_FCR31(\thread) 79 sw \tmp, THREAD_FCR31(\thread)
80 .set pop
78 .endm 81 .endm
79 82
80 .macro fpu_save_16odd thread 83 .macro fpu_save_16odd thread
81 .set push 84 .set push
82 .set mips64r2 85 .set mips64r2
86 SET_HARDFLOAT
83 sdc1 $f1, THREAD_FPR1_LS64(\thread) 87 sdc1 $f1, THREAD_FPR1_LS64(\thread)
84 sdc1 $f3, THREAD_FPR3_LS64(\thread) 88 sdc1 $f3, THREAD_FPR3_LS64(\thread)
85 sdc1 $f5, THREAD_FPR5_LS64(\thread) 89 sdc1 $f5, THREAD_FPR5_LS64(\thread)
@@ -110,6 +114,8 @@
110 .endm 114 .endm
111 115
112 .macro fpu_restore_16even thread tmp=t0 116 .macro fpu_restore_16even thread tmp=t0
117 .set push
118 SET_HARDFLOAT
113 lw \tmp, THREAD_FCR31(\thread) 119 lw \tmp, THREAD_FCR31(\thread)
114 ldc1 $f0, THREAD_FPR0_LS64(\thread) 120 ldc1 $f0, THREAD_FPR0_LS64(\thread)
115 ldc1 $f2, THREAD_FPR2_LS64(\thread) 121 ldc1 $f2, THREAD_FPR2_LS64(\thread)
@@ -133,6 +139,7 @@
133 .macro fpu_restore_16odd thread 139 .macro fpu_restore_16odd thread
134 .set push 140 .set push
135 .set mips64r2 141 .set mips64r2
142 SET_HARDFLOAT
136 ldc1 $f1, THREAD_FPR1_LS64(\thread) 143 ldc1 $f1, THREAD_FPR1_LS64(\thread)
137 ldc1 $f3, THREAD_FPR3_LS64(\thread) 144 ldc1 $f3, THREAD_FPR3_LS64(\thread)
138 ldc1 $f5, THREAD_FPR5_LS64(\thread) 145 ldc1 $f5, THREAD_FPR5_LS64(\thread)
@@ -277,6 +284,7 @@
277 .macro cfcmsa rd, cs 284 .macro cfcmsa rd, cs
278 .set push 285 .set push
279 .set noat 286 .set noat
287 SET_HARDFLOAT
280 .insn 288 .insn
281 .word CFC_MSA_INSN | (\cs << 11) 289 .word CFC_MSA_INSN | (\cs << 11)
282 move \rd, $1 290 move \rd, $1
@@ -286,6 +294,7 @@
286 .macro ctcmsa cd, rs 294 .macro ctcmsa cd, rs
287 .set push 295 .set push
288 .set noat 296 .set noat
297 SET_HARDFLOAT
289 move $1, \rs 298 move $1, \rs
290 .word CTC_MSA_INSN | (\cd << 6) 299 .word CTC_MSA_INSN | (\cd << 6)
291 .set pop 300 .set pop
@@ -294,6 +303,7 @@
294 .macro ld_d wd, off, base 303 .macro ld_d wd, off, base
295 .set push 304 .set push
296 .set noat 305 .set noat
306 SET_HARDFLOAT
297 add $1, \base, \off 307 add $1, \base, \off
298 .word LDD_MSA_INSN | (\wd << 6) 308 .word LDD_MSA_INSN | (\wd << 6)
299 .set pop 309 .set pop
@@ -302,6 +312,7 @@
302 .macro st_d wd, off, base 312 .macro st_d wd, off, base
303 .set push 313 .set push
304 .set noat 314 .set noat
315 SET_HARDFLOAT
305 add $1, \base, \off 316 add $1, \base, \off
306 .word STD_MSA_INSN | (\wd << 6) 317 .word STD_MSA_INSN | (\wd << 6)
307 .set pop 318 .set pop
@@ -310,6 +321,7 @@
310 .macro copy_u_w rd, ws, n 321 .macro copy_u_w rd, ws, n
311 .set push 322 .set push
312 .set noat 323 .set noat
324 SET_HARDFLOAT
313 .insn 325 .insn
314 .word COPY_UW_MSA_INSN | (\n << 16) | (\ws << 11) 326 .word COPY_UW_MSA_INSN | (\n << 16) | (\ws << 11)
315 /* move triggers an assembler bug... */ 327 /* move triggers an assembler bug... */
@@ -320,6 +332,7 @@
320 .macro copy_u_d rd, ws, n 332 .macro copy_u_d rd, ws, n
321 .set push 333 .set push
322 .set noat 334 .set noat
335 SET_HARDFLOAT
323 .insn 336 .insn
324 .word COPY_UD_MSA_INSN | (\n << 16) | (\ws << 11) 337 .word COPY_UD_MSA_INSN | (\n << 16) | (\ws << 11)
325 /* move triggers an assembler bug... */ 338 /* move triggers an assembler bug... */
@@ -330,6 +343,7 @@
330 .macro insert_w wd, n, rs 343 .macro insert_w wd, n, rs
331 .set push 344 .set push
332 .set noat 345 .set noat
346 SET_HARDFLOAT
333 /* move triggers an assembler bug... */ 347 /* move triggers an assembler bug... */
334 or $1, \rs, zero 348 or $1, \rs, zero
335 .word INSERT_W_MSA_INSN | (\n << 16) | (\wd << 6) 349 .word INSERT_W_MSA_INSN | (\n << 16) | (\wd << 6)
@@ -339,6 +353,7 @@
339 .macro insert_d wd, n, rs 353 .macro insert_d wd, n, rs
340 .set push 354 .set push
341 .set noat 355 .set noat
356 SET_HARDFLOAT
342 /* move triggers an assembler bug... */ 357 /* move triggers an assembler bug... */
343 or $1, \rs, zero 358 or $1, \rs, zero
344 .word INSERT_D_MSA_INSN | (\n << 16) | (\wd << 6) 359 .word INSERT_D_MSA_INSN | (\n << 16) | (\wd << 6)
@@ -381,6 +396,7 @@
381 st_d 31, THREAD_FPR31, \thread 396 st_d 31, THREAD_FPR31, \thread
382 .set push 397 .set push
383 .set noat 398 .set noat
399 SET_HARDFLOAT
384 cfcmsa $1, MSA_CSR 400 cfcmsa $1, MSA_CSR
385 sw $1, THREAD_MSA_CSR(\thread) 401 sw $1, THREAD_MSA_CSR(\thread)
386 .set pop 402 .set pop
@@ -389,6 +405,7 @@
389 .macro msa_restore_all thread 405 .macro msa_restore_all thread
390 .set push 406 .set push
391 .set noat 407 .set noat
408 SET_HARDFLOAT
392 lw $1, THREAD_MSA_CSR(\thread) 409 lw $1, THREAD_MSA_CSR(\thread)
393 ctcmsa MSA_CSR, $1 410 ctcmsa MSA_CSR, $1
394 .set pop 411 .set pop
@@ -441,6 +458,7 @@
441 .macro msa_init_all_upper 458 .macro msa_init_all_upper
442 .set push 459 .set push
443 .set noat 460 .set noat
461 SET_HARDFLOAT
444 not $1, zero 462 not $1, zero
445 msa_init_upper 0 463 msa_init_upper 0
446 .set pop 464 .set pop