aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/include/asm/asmmacro.h
diff options
context:
space:
mode:
Diffstat (limited to 'arch/mips/include/asm/asmmacro.h')
-rw-r--r--arch/mips/include/asm/asmmacro.h15
1 files changed, 13 insertions, 2 deletions
diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h
index 3220c93ea981..4225e99bd7bf 100644
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -9,6 +9,7 @@
9#define _ASM_ASMMACRO_H 9#define _ASM_ASMMACRO_H
10 10
11#include <asm/hazards.h> 11#include <asm/hazards.h>
12#include <asm/asm-offsets.h>
12 13
13#ifdef CONFIG_32BIT 14#ifdef CONFIG_32BIT
14#include <asm/asmmacro-32.h> 15#include <asm/asmmacro-32.h>
@@ -54,11 +55,21 @@
54 .endm 55 .endm
55 56
56 .macro local_irq_disable reg=t0 57 .macro local_irq_disable reg=t0
58#ifdef CONFIG_PREEMPT
59 lw \reg, TI_PRE_COUNT($28)
60 addi \reg, \reg, 1
61 sw \reg, TI_PRE_COUNT($28)
62#endif
57 mfc0 \reg, CP0_STATUS 63 mfc0 \reg, CP0_STATUS
58 ori \reg, \reg, 1 64 ori \reg, \reg, 1
59 xori \reg, \reg, 1 65 xori \reg, \reg, 1
60 mtc0 \reg, CP0_STATUS 66 mtc0 \reg, CP0_STATUS
61 irq_disable_hazard 67 irq_disable_hazard
68#ifdef CONFIG_PREEMPT
69 lw \reg, TI_PRE_COUNT($28)
70 addi \reg, \reg, -1
71 sw \reg, TI_PRE_COUNT($28)
72#endif
62 .endm 73 .endm
63#endif /* CONFIG_MIPS_MT_SMTC */ 74#endif /* CONFIG_MIPS_MT_SMTC */
64 75
@@ -106,7 +117,7 @@
106 .endm 117 .endm
107 118
108 .macro fpu_save_double thread status tmp 119 .macro fpu_save_double thread status tmp
109#if defined(CONFIG_MIPS64) || defined(CONFIG_CPU_MIPS32_R2) 120#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)
110 sll \tmp, \status, 5 121 sll \tmp, \status, 5
111 bgez \tmp, 10f 122 bgez \tmp, 10f
112 fpu_save_16odd \thread 123 fpu_save_16odd \thread
@@ -159,7 +170,7 @@
159 .endm 170 .endm
160 171
161 .macro fpu_restore_double thread status tmp 172 .macro fpu_restore_double thread status tmp
162#if defined(CONFIG_MIPS64) || defined(CONFIG_CPU_MIPS32_R2) 173#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)
163 sll \tmp, \status, 5 174 sll \tmp, \status, 5
164 bgez \tmp, 10f # 16 register mode? 175 bgez \tmp, 10f # 16 register mode?
165 176