diff options
Diffstat (limited to 'arch/mips/include/asm/asmmacro.h')
-rw-r--r-- | arch/mips/include/asm/asmmacro.h | 18 |
1 files changed, 10 insertions, 8 deletions
diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h index 6caf8766b80f..0cae4595e985 100644 --- a/arch/mips/include/asm/asmmacro.h +++ b/arch/mips/include/asm/asmmacro.h | |||
@@ -19,7 +19,7 @@ | |||
19 | #include <asm/asmmacro-64.h> | 19 | #include <asm/asmmacro-64.h> |
20 | #endif | 20 | #endif |
21 | 21 | ||
22 | #ifdef CONFIG_CPU_MIPSR2 | 22 | #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) |
23 | .macro local_irq_enable reg=t0 | 23 | .macro local_irq_enable reg=t0 |
24 | ei | 24 | ei |
25 | irq_enable_hazard | 25 | irq_enable_hazard |
@@ -104,7 +104,8 @@ | |||
104 | .endm | 104 | .endm |
105 | 105 | ||
106 | .macro fpu_save_double thread status tmp | 106 | .macro fpu_save_double thread status tmp |
107 | #if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) | 107 | #if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \ |
108 | defined(CONFIG_CPU_MIPS32_R6) | ||
108 | sll \tmp, \status, 5 | 109 | sll \tmp, \status, 5 |
109 | bgez \tmp, 10f | 110 | bgez \tmp, 10f |
110 | fpu_save_16odd \thread | 111 | fpu_save_16odd \thread |
@@ -160,7 +161,8 @@ | |||
160 | .endm | 161 | .endm |
161 | 162 | ||
162 | .macro fpu_restore_double thread status tmp | 163 | .macro fpu_restore_double thread status tmp |
163 | #if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) | 164 | #if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \ |
165 | defined(CONFIG_CPU_MIPS32_R6) | ||
164 | sll \tmp, \status, 5 | 166 | sll \tmp, \status, 5 |
165 | bgez \tmp, 10f # 16 register mode? | 167 | bgez \tmp, 10f # 16 register mode? |
166 | 168 | ||
@@ -170,16 +172,16 @@ | |||
170 | fpu_restore_16even \thread \tmp | 172 | fpu_restore_16even \thread \tmp |
171 | .endm | 173 | .endm |
172 | 174 | ||
173 | #ifdef CONFIG_CPU_MIPSR2 | 175 | #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) |
174 | .macro _EXT rd, rs, p, s | 176 | .macro _EXT rd, rs, p, s |
175 | ext \rd, \rs, \p, \s | 177 | ext \rd, \rs, \p, \s |
176 | .endm | 178 | .endm |
177 | #else /* !CONFIG_CPU_MIPSR2 */ | 179 | #else /* !CONFIG_CPU_MIPSR2 || !CONFIG_CPU_MIPSR6 */ |
178 | .macro _EXT rd, rs, p, s | 180 | .macro _EXT rd, rs, p, s |
179 | srl \rd, \rs, \p | 181 | srl \rd, \rs, \p |
180 | andi \rd, \rd, (1 << \s) - 1 | 182 | andi \rd, \rd, (1 << \s) - 1 |
181 | .endm | 183 | .endm |
182 | #endif /* !CONFIG_CPU_MIPSR2 */ | 184 | #endif /* !CONFIG_CPU_MIPSR2 || !CONFIG_CPU_MIPSR6 */ |
183 | 185 | ||
184 | /* | 186 | /* |
185 | * Temporary until all gas have MT ASE support | 187 | * Temporary until all gas have MT ASE support |
@@ -304,7 +306,7 @@ | |||
304 | .set push | 306 | .set push |
305 | .set noat | 307 | .set noat |
306 | SET_HARDFLOAT | 308 | SET_HARDFLOAT |
307 | add $1, \base, \off | 309 | addu $1, \base, \off |
308 | .word LDD_MSA_INSN | (\wd << 6) | 310 | .word LDD_MSA_INSN | (\wd << 6) |
309 | .set pop | 311 | .set pop |
310 | .endm | 312 | .endm |
@@ -313,7 +315,7 @@ | |||
313 | .set push | 315 | .set push |
314 | .set noat | 316 | .set noat |
315 | SET_HARDFLOAT | 317 | SET_HARDFLOAT |
316 | add $1, \base, \off | 318 | addu $1, \base, \off |
317 | .word STD_MSA_INSN | (\wd << 6) | 319 | .word STD_MSA_INSN | (\wd << 6) |
318 | .set pop | 320 | .set pop |
319 | .endm | 321 | .endm |