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-rw-r--r--arch/mips/gt64120/wrppmc/setup.c4
-rw-r--r--arch/mips/gt64120/wrppmc/time.c2
2 files changed, 1 insertions, 5 deletions
diff --git a/arch/mips/gt64120/wrppmc/setup.c b/arch/mips/gt64120/wrppmc/setup.c
index 238b5087fbb3..f2ccf101e6d9 100644
--- a/arch/mips/gt64120/wrppmc/setup.c
+++ b/arch/mips/gt64120/wrppmc/setup.c
@@ -126,7 +126,6 @@ static void wrppmc_setup_serial(void)
126 126
127void __init plat_mem_setup(void) 127void __init plat_mem_setup(void)
128{ 128{
129 extern void wrppmc_time_init(void);
130 extern void wrppmc_machine_restart(char *command); 129 extern void wrppmc_machine_restart(char *command);
131 extern void wrppmc_machine_halt(void); 130 extern void wrppmc_machine_halt(void);
132 extern void wrppmc_machine_power_off(void); 131 extern void wrppmc_machine_power_off(void);
@@ -135,9 +134,6 @@ void __init plat_mem_setup(void)
135 _machine_halt = wrppmc_machine_halt; 134 _machine_halt = wrppmc_machine_halt;
136 pm_power_off = wrppmc_machine_power_off; 135 pm_power_off = wrppmc_machine_power_off;
137 136
138 /* Use MIPS Count/Compare Timer */
139 board_time_init = wrppmc_time_init;
140
141 /* This makes the operations of 'in/out[bwl]' to the 137 /* This makes the operations of 'in/out[bwl]' to the
142 * physical address ( < KSEG0) can work via KSEG1 138 * physical address ( < KSEG0) can work via KSEG1
143 */ 139 */
diff --git a/arch/mips/gt64120/wrppmc/time.c b/arch/mips/gt64120/wrppmc/time.c
index 5b440859bcee..faf164e7e0df 100644
--- a/arch/mips/gt64120/wrppmc/time.c
+++ b/arch/mips/gt64120/wrppmc/time.c
@@ -38,7 +38,7 @@ void __init plat_timer_setup(struct irqaction *irq)
38 * NOTE: We disable all GT64120 timers, and use MIPS processor internal 38 * NOTE: We disable all GT64120 timers, and use MIPS processor internal
39 * timer as the source of kernel clock tick. 39 * timer as the source of kernel clock tick.
40 */ 40 */
41void __init wrppmc_time_init(void) 41void __init plat_time_init(void)
42{ 42{
43 /* Disable GT64120 timers */ 43 /* Disable GT64120 timers */
44 GT_WRITE(GT_TC_CONTROL_OFS, 0x00); 44 GT_WRITE(GT_TC_CONTROL_OFS, 0x00);