2 files changed, 102 insertions, 0 deletions
diff --git a/arch/mips/fw/lib/Makefile b/arch/mips/fw/lib/Makefile
new file mode 100644
index 000000000000..84befc968fc4
--- /dev/null
+++ b/arch/mips/fw/lib/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for generic prom monitor library routines under Linux.
+#
+lib-$(CONFIG_64BIT)     += call_o32.o
diff --git a/arch/mips/fw/lib/call_o32.S b/arch/mips/fw/lib/call_o32.S
new file mode 100644
index 000000000000..bdf7d1d4081a
--- /dev/null
+++ b/arch/mips/fw/lib/call_o32.S
@@ -0,0 +1,97 @@
+/*
+ *      arch/mips/dec/prom/call_o32.S
+ *
+ *      O32 interface for the 64 (or N32) ABI.
+ *
+ *      Copyright (C) 2002  Maciej W. Rozycki
+ *
+ *      This program is free software; you can redistribute it and/or
+ *      modify it under the terms of the GNU General Public License
+ *      as published by the Free Software Foundation; either version
+ *      2 of the License, or (at your option) any later version.
+ */
+#include <asm/asm.h>
+#include <asm/regdef.h>
+/* Maximum number of arguments supported.  Must be even!  */
+#define O32_ARGC        32
+/* Number of static registers we save.  */
+#define O32_STATC       11
+/* Frame size for static register  */
+#define O32_FRAMESZ     (SZREG * O32_STATC)
+/* Frame size on new stack */
+#define O32_FRAMESZ_NEW (SZREG + 4 * O32_ARGC)
+                .text
+/*
+ * O32 function call dispatcher, for interfacing 32-bit ROM routines.
+ *
+ * The standard 64 (N32) calling sequence is supported, with a0
+ * holding a function pointer, a1 a new stack pointer, a2-a7 -- its
+ * first six arguments and the stack -- remaining ones (up to O32_ARGC,
+ * including a2-a7). Static registers, gp and fp are preserved, v0 holds
+ * a result. This code relies on the called o32 function for sp and ra
+ * restoration and this dispatcher has to be placed in a KSEGx (or KUSEG)
+ * address space.  Any pointers passed have to point to addresses within
+ * one of these spaces as well.
+ */
+NESTED(call_o32, O32_FRAMESZ, ra)
+                REG_SUBU        sp,O32_FRAMESZ
+                REG_S           ra,O32_FRAMESZ-1*SZREG(sp)
+                REG_S           fp,O32_FRAMESZ-2*SZREG(sp)
+                REG_S           gp,O32_FRAMESZ-3*SZREG(sp)
+                REG_S           s7,O32_FRAMESZ-4*SZREG(sp)
+                REG_S           s6,O32_FRAMESZ-5*SZREG(sp)
+                REG_S           s5,O32_FRAMESZ-6*SZREG(sp)
+                REG_S           s4,O32_FRAMESZ-7*SZREG(sp)
+                REG_S           s3,O32_FRAMESZ-8*SZREG(sp)
+                REG_S           s2,O32_FRAMESZ-9*SZREG(sp)
+                REG_S           s1,O32_FRAMESZ-10*SZREG(sp)
+                REG_S           s0,O32_FRAMESZ-11*SZREG(sp)
+                move            jp,a0
+                REG_SUBU        s0,a1,O32_FRAMESZ_NEW
+                REG_S           sp,O32_FRAMESZ_NEW-1*SZREG(s0)
+                sll             a0,a2,zero
+                sll             a1,a3,zero
+                sll             a2,a4,zero
+                sll             a3,a5,zero
+                sw              a6,0x10(s0)
+                sw              a7,0x14(s0)
+                PTR_LA          t0,O32_FRAMESZ(sp)
+                PTR_LA          t1,0x18(s0)
+                li              t2,O32_ARGC-6
+1:
+                lw              t3,(t0)
+                REG_ADDU        t0,SZREG
+                sw              t3,(t1)
+                REG_SUBU        t2,1
+                REG_ADDU        t1,4
+                bnez            t2,1b
+                move            sp,s0
+                jalr            jp
+                REG_L           sp,O32_FRAMESZ_NEW-1*SZREG(sp)
+                REG_L           s0,O32_FRAMESZ-11*SZREG(sp)
+                REG_L           s1,O32_FRAMESZ-10*SZREG(sp)
+                REG_L           s2,O32_FRAMESZ-9*SZREG(sp)
+                REG_L           s3,O32_FRAMESZ-8*SZREG(sp)
+                REG_L           s4,O32_FRAMESZ-7*SZREG(sp)
+                REG_L           s5,O32_FRAMESZ-6*SZREG(sp)
+                REG_L           s6,O32_FRAMESZ-5*SZREG(sp)
+                REG_L           s7,O32_FRAMESZ-4*SZREG(sp)
+                REG_L           gp,O32_FRAMESZ-3*SZREG(sp)
+                REG_L           fp,O32_FRAMESZ-2*SZREG(sp)
+                REG_L           ra,O32_FRAMESZ-1*SZREG(sp)
+                REG_ADDU        sp,O32_FRAMESZ
+                jr              ra
+END(call_o32)

diff --git a/arch/mips/fw/lib/Makefile b/arch/mips/fw/lib/Makefile new file mode 100644 index 000000000000..84befc968fc4 --- /dev/null +++ b/arch/mips/fw/lib/Makefile
@@ -0,0 +1,5 @@
	1	#
	2	# Makefile for generic prom monitor library routines under Linux.
	3	#
	4
	5	lib-$(CONFIG_64BIT) += call_o32.o


diff --git a/arch/mips/fw/lib/call_o32.S b/arch/mips/fw/lib/call_o32.S new file mode 100644 index 000000000000..bdf7d1d4081a --- /dev/null +++ b/arch/mips/fw/lib/call_o32.S
@@ -0,0 +1,97 @@
	1	/*
	2	* arch/mips/dec/prom/call_o32.S
	3	*
	4	* O32 interface for the 64 (or N32) ABI.
	5	*
	6	* Copyright (C) 2002 Maciej W. Rozycki
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* as published by the Free Software Foundation; either version
	11	* 2 of the License, or (at your option) any later version.
	12	*/
	13
	14	#include <asm/asm.h>
	15	#include <asm/regdef.h>
	16
	17	/* Maximum number of arguments supported. Must be even! */
	18	#define O32_ARGC 32
	19	/* Number of static registers we save. */
	20	#define O32_STATC 11
	21	/* Frame size for static register */
	22	#define O32_FRAMESZ (SZREG * O32_STATC)
	23	/* Frame size on new stack */
	24	#define O32_FRAMESZ_NEW (SZREG + 4 * O32_ARGC)
	25
	26	.text
	27
	28	/*
	29	* O32 function call dispatcher, for interfacing 32-bit ROM routines.
	30	*
	31	* The standard 64 (N32) calling sequence is supported, with a0
	32	* holding a function pointer, a1 a new stack pointer, a2-a7 -- its
	33	* first six arguments and the stack -- remaining ones (up to O32_ARGC,
	34	* including a2-a7). Static registers, gp and fp are preserved, v0 holds
	35	* a result. This code relies on the called o32 function for sp and ra
	36	* restoration and this dispatcher has to be placed in a KSEGx (or KUSEG)
	37	* address space. Any pointers passed have to point to addresses within
	38	* one of these spaces as well.
	39	*/
	40	NESTED(call_o32, O32_FRAMESZ, ra)
	41	REG_SUBU sp,O32_FRAMESZ
	42
	43	REG_S ra,O32_FRAMESZ-1*SZREG(sp)
	44	REG_S fp,O32_FRAMESZ-2*SZREG(sp)
	45	REG_S gp,O32_FRAMESZ-3*SZREG(sp)
	46	REG_S s7,O32_FRAMESZ-4*SZREG(sp)
	47	REG_S s6,O32_FRAMESZ-5*SZREG(sp)
	48	REG_S s5,O32_FRAMESZ-6*SZREG(sp)
	49	REG_S s4,O32_FRAMESZ-7*SZREG(sp)
	50	REG_S s3,O32_FRAMESZ-8*SZREG(sp)
	51	REG_S s2,O32_FRAMESZ-9*SZREG(sp)
	52	REG_S s1,O32_FRAMESZ-10*SZREG(sp)
	53	REG_S s0,O32_FRAMESZ-11*SZREG(sp)
	54
	55	move jp,a0
	56	REG_SUBU s0,a1,O32_FRAMESZ_NEW
	57	REG_S sp,O32_FRAMESZ_NEW-1*SZREG(s0)
	58
	59	sll a0,a2,zero
	60	sll a1,a3,zero
	61	sll a2,a4,zero
	62	sll a3,a5,zero
	63	sw a6,0x10(s0)
	64	sw a7,0x14(s0)
	65
	66	PTR_LA t0,O32_FRAMESZ(sp)
	67	PTR_LA t1,0x18(s0)
	68	li t2,O32_ARGC-6
	69	1:
	70	lw t3,(t0)
	71	REG_ADDU t0,SZREG
	72	sw t3,(t1)
	73	REG_SUBU t2,1
	74	REG_ADDU t1,4
	75	bnez t2,1b
	76
	77	move sp,s0
	78
	79	jalr jp
	80
	81	REG_L sp,O32_FRAMESZ_NEW-1*SZREG(sp)
	82
	83	REG_L s0,O32_FRAMESZ-11*SZREG(sp)
	84	REG_L s1,O32_FRAMESZ-10*SZREG(sp)
	85	REG_L s2,O32_FRAMESZ-9*SZREG(sp)
	86	REG_L s3,O32_FRAMESZ-8*SZREG(sp)
	87	REG_L s4,O32_FRAMESZ-7*SZREG(sp)
	88	REG_L s5,O32_FRAMESZ-6*SZREG(sp)
	89	REG_L s6,O32_FRAMESZ-5*SZREG(sp)
	90	REG_L s7,O32_FRAMESZ-4*SZREG(sp)
	91	REG_L gp,O32_FRAMESZ-3*SZREG(sp)
	92	REG_L fp,O32_FRAMESZ-2*SZREG(sp)
	93	REG_L ra,O32_FRAMESZ-1*SZREG(sp)
	94
	95	REG_ADDU sp,O32_FRAMESZ
	96	jr ra
	97	END(call_o32)