diff options
Diffstat (limited to 'arch/mips/emma')
-rw-r--r-- | arch/mips/emma/markeins/irq.c | 28 |
1 files changed, 10 insertions, 18 deletions
diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c index 263132d7b3a3..1e6457ca4f44 100644 --- a/arch/mips/emma/markeins/irq.c +++ b/arch/mips/emma/markeins/irq.c | |||
@@ -149,37 +149,28 @@ static void emma2rh_gpio_irq_disable(unsigned int irq) | |||
149 | 149 | ||
150 | static void emma2rh_gpio_irq_ack(unsigned int irq) | 150 | static void emma2rh_gpio_irq_ack(unsigned int irq) |
151 | { | 151 | { |
152 | u32 reg; | ||
153 | |||
154 | irq -= EMMA2RH_GPIO_IRQ_BASE; | 152 | irq -= EMMA2RH_GPIO_IRQ_BASE; |
155 | emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq)); | 153 | emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq)); |
156 | |||
157 | reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); | ||
158 | reg &= ~(1 << irq); | ||
159 | emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); | ||
160 | } | 154 | } |
161 | 155 | ||
162 | static void emma2rh_gpio_irq_end(unsigned int irq) | 156 | static void emma2rh_gpio_irq_mask_ack(unsigned int irq) |
163 | { | 157 | { |
164 | u32 reg; | 158 | u32 reg; |
165 | 159 | ||
166 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { | 160 | irq -= EMMA2RH_GPIO_IRQ_BASE; |
167 | 161 | emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq)); | |
168 | irq -= EMMA2RH_GPIO_IRQ_BASE; | ||
169 | 162 | ||
170 | reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); | 163 | reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); |
171 | reg |= 1 << irq; | 164 | reg &= ~(1 << irq); |
172 | emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); | 165 | emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); |
173 | } | ||
174 | } | 166 | } |
175 | 167 | ||
176 | struct irq_chip emma2rh_gpio_irq_controller = { | 168 | struct irq_chip emma2rh_gpio_irq_controller = { |
177 | .name = "emma2rh_gpio_irq", | 169 | .name = "emma2rh_gpio_irq", |
178 | .ack = emma2rh_gpio_irq_ack, | 170 | .ack = emma2rh_gpio_irq_ack, |
179 | .mask = emma2rh_gpio_irq_disable, | 171 | .mask = emma2rh_gpio_irq_disable, |
180 | .mask_ack = emma2rh_gpio_irq_ack, | 172 | .mask_ack = emma2rh_gpio_irq_mask_ack, |
181 | .unmask = emma2rh_gpio_irq_enable, | 173 | .unmask = emma2rh_gpio_irq_enable, |
182 | .end = emma2rh_gpio_irq_end, | ||
183 | }; | 174 | }; |
184 | 175 | ||
185 | void emma2rh_gpio_irq_init(void) | 176 | void emma2rh_gpio_irq_init(void) |
@@ -187,8 +178,9 @@ void emma2rh_gpio_irq_init(void) | |||
187 | u32 i; | 178 | u32 i; |
188 | 179 | ||
189 | for (i = 0; i < NUM_EMMA2RH_IRQ_GPIO; i++) | 180 | for (i = 0; i < NUM_EMMA2RH_IRQ_GPIO; i++) |
190 | set_irq_chip(EMMA2RH_GPIO_IRQ_BASE + i, | 181 | set_irq_chip_and_handler_name(EMMA2RH_GPIO_IRQ_BASE + i, |
191 | &emma2rh_gpio_irq_controller); | 182 | &emma2rh_gpio_irq_controller, |
183 | handle_edge_irq, "edge"); | ||
192 | } | 184 | } |
193 | 185 | ||
194 | static struct irqaction irq_cascade = { | 186 | static struct irqaction irq_cascade = { |