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-rw-r--r--arch/mips/emma2rh/common/Makefile13
-rw-r--r--arch/mips/emma2rh/common/irq.c108
-rw-r--r--arch/mips/emma2rh/common/irq_emma2rh.c134
-rw-r--r--arch/mips/emma2rh/common/prom.c77
-rw-r--r--arch/mips/emma2rh/markeins/Makefile13
-rw-r--r--arch/mips/emma2rh/markeins/irq.c134
-rw-r--r--arch/mips/emma2rh/markeins/irq_markeins.c197
-rw-r--r--arch/mips/emma2rh/markeins/led.c60
-rw-r--r--arch/mips/emma2rh/markeins/platform.c170
-rw-r--r--arch/mips/emma2rh/markeins/setup.c182
10 files changed, 1088 insertions, 0 deletions
diff --git a/arch/mips/emma2rh/common/Makefile b/arch/mips/emma2rh/common/Makefile
new file mode 100644
index 000000000000..859121b3867d
--- /dev/null
+++ b/arch/mips/emma2rh/common/Makefile
@@ -0,0 +1,13 @@
1#
2# arch/mips/emma2rh/common/Makefile
3# Makefile for the common code of NEC EMMA2RH based board.
4#
5# Copyright (C) NEC Electronics Corporation 2005-2006
6#
7# This program is free software; you can redistribute it and/or modify
8# it under the terms of the GNU General Public License as published by
9# the Free Software Foundation; either version 2 of the License, or
10# (at your option) any later version.
11#
12
13obj-$(CONFIG_MARKEINS) += irq.o irq_emma2rh.o prom.o
diff --git a/arch/mips/emma2rh/common/irq.c b/arch/mips/emma2rh/common/irq.c
new file mode 100644
index 000000000000..b075281e50e9
--- /dev/null
+++ b/arch/mips/emma2rh/common/irq.c
@@ -0,0 +1,108 @@
1/*
2 * arch/mips/emma2rh/common/irq.c
3 * This file is common irq dispatcher.
4 *
5 * Copyright (C) NEC Electronics Corporation 2005-2006
6 *
7 * This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c
8 *
9 * Copyright 2001 MontaVista Software Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 */
25#include <linux/config.h>
26#include <linux/init.h>
27#include <linux/interrupt.h>
28#include <linux/irq.h>
29#include <linux/types.h>
30
31#include <asm/i8259.h>
32#include <asm/system.h>
33#include <asm/mipsregs.h>
34#include <asm/debug.h>
35#include <asm/addrspace.h>
36#include <asm/bootinfo.h>
37
38#include <asm/emma2rh/emma2rh.h>
39
40/*
41 * the first level int-handler will jump here if it is a emma2rh irq
42 */
43asmlinkage void emma2rh_irq_dispatch(struct pt_regs *regs)
44{
45 u32 intStatus;
46 u32 bitmask;
47 u32 i;
48
49 intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0)
50 & emma2rh_in32(EMMA2RH_BHIF_INT_EN_0);
51
52#ifdef EMMA2RH_SW_CASCADE
53 if (intStatus &
54 (1 << ((EMMA2RH_SW_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
55 u32 swIntStatus;
56 swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT)
57 & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
58 for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
59 if (swIntStatus & bitmask) {
60 do_IRQ(EMMA2RH_SW_IRQ_BASE + i, regs);
61 return;
62 }
63 }
64 }
65#endif
66
67 for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
68 if (intStatus & bitmask) {
69 do_IRQ(EMMA2RH_IRQ_BASE + i, regs);
70 return;
71 }
72 }
73
74 intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1)
75 & emma2rh_in32(EMMA2RH_BHIF_INT_EN_1);
76
77#ifdef EMMA2RH_GPIO_CASCADE
78 if (intStatus &
79 (1 << ((EMMA2RH_GPIO_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
80 u32 gpioIntStatus;
81 gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST)
82 & emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
83 for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
84 if (gpioIntStatus & bitmask) {
85 do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i, regs);
86 return;
87 }
88 }
89 }
90#endif
91
92 for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) {
93 if (intStatus & bitmask) {
94 do_IRQ(EMMA2RH_IRQ_BASE + i, regs);
95 return;
96 }
97 }
98
99 intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2)
100 & emma2rh_in32(EMMA2RH_BHIF_INT_EN_2);
101
102 for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) {
103 if (intStatus & bitmask) {
104 do_IRQ(EMMA2RH_IRQ_BASE + i, regs);
105 return;
106 }
107 }
108}
diff --git a/arch/mips/emma2rh/common/irq_emma2rh.c b/arch/mips/emma2rh/common/irq_emma2rh.c
new file mode 100644
index 000000000000..b886aa94ca90
--- /dev/null
+++ b/arch/mips/emma2rh/common/irq_emma2rh.c
@@ -0,0 +1,134 @@
1/*
2 * arch/mips/emma2rh/common/irq_emma2rh.c
3 * This file defines the irq handler for EMMA2RH.
4 *
5 * Copyright (C) NEC Electronics Corporation 2005-2006
6 *
7 * This file is based on the arch/mips/ddb5xxx/ddb5477/irq_5477.c
8 *
9 * Copyright 2001 MontaVista Software Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 */
25
26/*
27 * EMMA2RH defines 64 IRQs.
28 *
29 * This file exports one function:
30 * emma2rh_irq_init(u32 irq_base);
31 */
32
33#include <linux/interrupt.h>
34#include <linux/types.h>
35#include <linux/ptrace.h>
36
37#include <asm/debug.h>
38
39#include <asm/emma2rh/emma2rh.h>
40
41/* number of total irqs supported by EMMA2RH */
42#define NUM_EMMA2RH_IRQ 96
43
44static int emma2rh_irq_base = -1;
45
46void ll_emma2rh_irq_enable(int);
47void ll_emma2rh_irq_disable(int);
48
49static void emma2rh_irq_enable(unsigned int irq)
50{
51 ll_emma2rh_irq_enable(irq - emma2rh_irq_base);
52}
53
54static void emma2rh_irq_disable(unsigned int irq)
55{
56 ll_emma2rh_irq_disable(irq - emma2rh_irq_base);
57}
58
59static unsigned int emma2rh_irq_startup(unsigned int irq)
60{
61 emma2rh_irq_enable(irq);
62 return 0;
63}
64
65#define emma2rh_irq_shutdown emma2rh_irq_disable
66
67static void emma2rh_irq_ack(unsigned int irq)
68{
69 /* disable interrupt - some handler will re-enable the irq
70 * and if the interrupt is leveled, we will have infinite loop
71 */
72 ll_emma2rh_irq_disable(irq - emma2rh_irq_base);
73}
74
75static void emma2rh_irq_end(unsigned int irq)
76{
77 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
78 ll_emma2rh_irq_enable(irq - emma2rh_irq_base);
79}
80
81hw_irq_controller emma2rh_irq_controller = {
82 .typename = "emma2rh_irq",
83 .startup = emma2rh_irq_startup,
84 .shutdown = emma2rh_irq_shutdown,
85 .enable = emma2rh_irq_enable,
86 .disable = emma2rh_irq_disable,
87 .ack = emma2rh_irq_ack,
88 .end = emma2rh_irq_end,
89 .set_affinity = NULL /* no affinity stuff for UP */
90};
91
92void emma2rh_irq_init(u32 irq_base)
93{
94 u32 i;
95
96 for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ; i++) {
97 irq_desc[i].status = IRQ_DISABLED;
98 irq_desc[i].action = NULL;
99 irq_desc[i].depth = 1;
100 irq_desc[i].handler = &emma2rh_irq_controller;
101 }
102
103 emma2rh_irq_base = irq_base;
104}
105
106void ll_emma2rh_irq_enable(int emma2rh_irq)
107{
108 u32 reg_value;
109 u32 reg_bitmask;
110 u32 reg_index;
111
112 reg_index = EMMA2RH_BHIF_INT_EN_0
113 + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0)
114 * (emma2rh_irq / 32);
115 reg_value = emma2rh_in32(reg_index);
116 reg_bitmask = 0x1 << (emma2rh_irq % 32);
117 db_assert((reg_value & reg_bitmask) == 0);
118 emma2rh_out32(reg_index, reg_value | reg_bitmask);
119}
120
121void ll_emma2rh_irq_disable(int emma2rh_irq)
122{
123 u32 reg_value;
124 u32 reg_bitmask;
125 u32 reg_index;
126
127 reg_index = EMMA2RH_BHIF_INT_EN_0
128 + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0)
129 * (emma2rh_irq / 32);
130 reg_value = emma2rh_in32(reg_index);
131 reg_bitmask = 0x1 << (emma2rh_irq % 32);
132 db_assert((reg_value & reg_bitmask) != 0);
133 emma2rh_out32(reg_index, reg_value & ~reg_bitmask);
134}
diff --git a/arch/mips/emma2rh/common/prom.c b/arch/mips/emma2rh/common/prom.c
new file mode 100644
index 000000000000..8bba0b02a204
--- /dev/null
+++ b/arch/mips/emma2rh/common/prom.c
@@ -0,0 +1,77 @@
1/*
2 * arch/mips/emma2rh/common/prom.c
3 * This file is prom file.
4 *
5 * Copyright (C) NEC Electronics Corporation 2004-2006
6 *
7 * This file is based on the arch/mips/ddb5xxx/common/prom.c
8 *
9 * Copyright 2001 MontaVista Software Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 */
25#include <linux/config.h>
26#include <linux/init.h>
27#include <linux/mm.h>
28#include <linux/sched.h>
29#include <linux/bootmem.h>
30
31#include <asm/addrspace.h>
32#include <asm/bootinfo.h>
33#include <asm/emma2rh/emma2rh.h>
34#include <asm/debug.h>
35
36const char *get_system_type(void)
37{
38 switch (mips_machtype) {
39 case MACH_NEC_MARKEINS:
40 return "NEC EMMA2RH Mark-eins";
41 default:
42 return "Unknown NEC board";
43 }
44}
45
46/* [jsun@junsun.net] PMON passes arguments in C main() style */
47void __init prom_init(void)
48{
49 int argc = fw_arg0;
50 char **arg = (char **)fw_arg1;
51 int i;
52
53 /* if user passes kernel args, ignore the default one */
54 if (argc > 1)
55 arcs_cmdline[0] = '\0';
56
57 /* arg[0] is "g", the rest is boot parameters */
58 for (i = 1; i < argc; i++) {
59 if (strlen(arcs_cmdline) + strlen(arg[i] + 1)
60 >= sizeof(arcs_cmdline))
61 break;
62 strcat(arcs_cmdline, arg[i]);
63 strcat(arcs_cmdline, " ");
64 }
65
66 mips_machgroup = MACH_GROUP_NEC_EMMA2RH;
67
68#if defined(CONFIG_MARKEINS)
69 mips_machtype = MACH_NEC_MARKEINS;
70 add_memory_region(0, EMMA2RH_RAM_SIZE, BOOT_MEM_RAM);
71#endif
72
73}
74
75void __init prom_free_prom_memory(void)
76{
77}
diff --git a/arch/mips/emma2rh/markeins/Makefile b/arch/mips/emma2rh/markeins/Makefile
new file mode 100644
index 000000000000..14fc268b175c
--- /dev/null
+++ b/arch/mips/emma2rh/markeins/Makefile
@@ -0,0 +1,13 @@
1#
2# arch/mips/emma2rh/markeins/Makefile
3# Makefile for the common code of NEC EMMA2RH based board.
4#
5# Copyright (C) NEC Electronics Corporation 2005-2006
6#
7# This program is free software; you can redistribute it and/or modify
8# it under the terms of the GNU General Public License as published by
9# the Free Software Foundation; either version 2 of the License, or
10# (at your option) any later version.
11#
12
13obj-$(CONFIG_MARKEINS) += irq.o irq_markeins.o setup.o led.o platform.o
diff --git a/arch/mips/emma2rh/markeins/irq.c b/arch/mips/emma2rh/markeins/irq.c
new file mode 100644
index 000000000000..76dc3faeaf4e
--- /dev/null
+++ b/arch/mips/emma2rh/markeins/irq.c
@@ -0,0 +1,134 @@
1/*
2 * arch/mips/emma2rh/markeins/irq.c
3 * This file defines the irq handler for EMMA2RH.
4 *
5 * Copyright (C) NEC Electronics Corporation 2004-2006
6 *
7 * This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c
8 *
9 * Copyright 2001 MontaVista Software Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 */
25#include <linux/config.h>
26#include <linux/init.h>
27#include <linux/interrupt.h>
28#include <linux/irq.h>
29#include <linux/types.h>
30#include <linux/ptrace.h>
31#include <linux/delay.h>
32
33#include <asm/i8259.h>
34#include <asm/irq_cpu.h>
35#include <asm/system.h>
36#include <asm/mipsregs.h>
37#include <asm/debug.h>
38#include <asm/addrspace.h>
39#include <asm/bootinfo.h>
40
41#include <asm/emma2rh/emma2rh.h>
42
43/*
44 * IRQ mapping
45 *
46 * 0-7: 8 CPU interrupts
47 * 0 - software interrupt 0
48 * 1 - software interrupt 1
49 * 2 - most Vrc5477 interrupts are routed to this pin
50 * 3 - (optional) some other interrupts routed to this pin for debugg
51 * 4 - not used
52 * 5 - not used
53 * 6 - not used
54 * 7 - cpu timer (used by default)
55 *
56 */
57
58extern void emma2rh_sw_irq_init(u32 base);
59extern void emma2rh_gpio_irq_init(u32 base);
60extern void emma2rh_irq_init(u32 base);
61extern asmlinkage void emma2rh_irq_dispatch(struct pt_regs *regs);
62
63static struct irqaction irq_cascade = {
64 .handler = no_action,
65 .flags = 0,
66 .mask = CPU_MASK_NONE,
67 .name = "cascade",
68 .dev_id = NULL,
69 .next = NULL,
70};
71
72void __init arch_init_irq(void)
73{
74 u32 reg;
75
76 db_run(printk("markeins_irq_setup invoked.\n"));
77
78 /* by default, interrupts are disabled. */
79 emma2rh_out32(EMMA2RH_BHIF_INT_EN_0, 0);
80 emma2rh_out32(EMMA2RH_BHIF_INT_EN_1, 0);
81 emma2rh_out32(EMMA2RH_BHIF_INT_EN_2, 0);
82 emma2rh_out32(EMMA2RH_BHIF_INT1_EN_0, 0);
83 emma2rh_out32(EMMA2RH_BHIF_INT1_EN_1, 0);
84 emma2rh_out32(EMMA2RH_BHIF_INT1_EN_2, 0);
85 emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, 0);
86
87 clear_c0_status(0xff00);
88 set_c0_status(0x0400);
89
90#define GPIO_PCI (0xf<<15)
91 /* setup GPIO interrupt for PCI interface */
92 /* direction input */
93 reg = emma2rh_in32(EMMA2RH_GPIO_DIR);
94 emma2rh_out32(EMMA2RH_GPIO_DIR, reg & ~GPIO_PCI);
95 /* disable interrupt */
96 reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
97 emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg & ~GPIO_PCI);
98 /* level triggerd */
99 reg = emma2rh_in32(EMMA2RH_GPIO_INT_MODE);
100 emma2rh_out32(EMMA2RH_GPIO_INT_MODE, reg | GPIO_PCI);
101 reg = emma2rh_in32(EMMA2RH_GPIO_INT_CND_A);
102 emma2rh_out32(EMMA2RH_GPIO_INT_CND_A, reg & (~GPIO_PCI));
103 /* interrupt clear */
104 emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~GPIO_PCI);
105
106 /* init all controllers */
107 emma2rh_irq_init(EMMA2RH_IRQ_BASE);
108 emma2rh_sw_irq_init(EMMA2RH_SW_IRQ_BASE);
109 emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE);
110 mips_cpu_irq_init(CPU_IRQ_BASE);
111
112 /* setup cascade interrupts */
113 setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE, &irq_cascade);
114 setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_GPIO_CASCADE, &irq_cascade);
115 setup_irq(CPU_IRQ_BASE + CPU_EMMA2RH_CASCADE, &irq_cascade);
116}
117
118asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
119{
120 unsigned int pending = read_c0_status() & read_c0_cause();
121
122 if (pending & STATUSF_IP7)
123 do_IRQ(CPU_IRQ_BASE + 7, regs);
124 else if (pending & STATUSF_IP2)
125 emma2rh_irq_dispatch(regs);
126 else if (pending & STATUSF_IP1)
127 do_IRQ(CPU_IRQ_BASE + 1, regs);
128 else if (pending & STATUSF_IP0)
129 do_IRQ(CPU_IRQ_BASE + 0, regs);
130 else
131 spurious_interrupt(regs);
132}
133
134
diff --git a/arch/mips/emma2rh/markeins/irq_markeins.c b/arch/mips/emma2rh/markeins/irq_markeins.c
new file mode 100644
index 000000000000..1783fdab6459
--- /dev/null
+++ b/arch/mips/emma2rh/markeins/irq_markeins.c
@@ -0,0 +1,197 @@
1/*
2 * arch/mips/emma2rh/markeins/irq_markeins.c
3 * This file defines the irq handler for Mark-eins.
4 *
5 * Copyright (C) NEC Electronics Corporation 2004-2006
6 *
7 * This file is based on the arch/mips/ddb5xxx/ddb5477/irq_5477.c
8 *
9 * Copyright 2001 MontaVista Software Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 */
25#include <linux/interrupt.h>
26#include <linux/irq.h>
27#include <linux/types.h>
28#include <linux/ptrace.h>
29
30#include <asm/debug.h>
31#include <asm/emma2rh/emma2rh.h>
32
33static int emma2rh_sw_irq_base = -1;
34static int emma2rh_gpio_irq_base = -1;
35
36void ll_emma2rh_sw_irq_enable(int reg);
37void ll_emma2rh_sw_irq_disable(int reg);
38void ll_emma2rh_gpio_irq_enable(int reg);
39void ll_emma2rh_gpio_irq_disable(int reg);
40
41static void emma2rh_sw_irq_enable(unsigned int irq)
42{
43 ll_emma2rh_sw_irq_enable(irq - emma2rh_sw_irq_base);
44}
45
46static void emma2rh_sw_irq_disable(unsigned int irq)
47{
48 ll_emma2rh_sw_irq_disable(irq - emma2rh_sw_irq_base);
49}
50
51static unsigned int emma2rh_sw_irq_startup(unsigned int irq)
52{
53 emma2rh_sw_irq_enable(irq);
54 return 0;
55}
56
57#define emma2rh_sw_irq_shutdown emma2rh_sw_irq_disable
58
59static void emma2rh_sw_irq_ack(unsigned int irq)
60{
61 ll_emma2rh_sw_irq_disable(irq - emma2rh_sw_irq_base);
62}
63
64static void emma2rh_sw_irq_end(unsigned int irq)
65{
66 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
67 ll_emma2rh_sw_irq_enable(irq - emma2rh_sw_irq_base);
68}
69
70hw_irq_controller emma2rh_sw_irq_controller = {
71 .typename = "emma2rh_sw_irq",
72 .startup = emma2rh_sw_irq_startup,
73 .shutdown = emma2rh_sw_irq_shutdown,
74 .enable = emma2rh_sw_irq_enable,
75 .disable = emma2rh_sw_irq_disable,
76 .ack = emma2rh_sw_irq_ack,
77 .end = emma2rh_sw_irq_end,
78 .set_affinity = NULL,
79};
80
81void emma2rh_sw_irq_init(u32 irq_base)
82{
83 u32 i;
84
85 for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_SW; i++) {
86 irq_desc[i].status = IRQ_DISABLED;
87 irq_desc[i].action = NULL;
88 irq_desc[i].depth = 2;
89 irq_desc[i].handler = &emma2rh_sw_irq_controller;
90 }
91
92 emma2rh_sw_irq_base = irq_base;
93}
94
95void ll_emma2rh_sw_irq_enable(int irq)
96{
97 u32 reg;
98
99 db_assert(irq >= 0);
100 db_assert(irq < NUM_EMMA2RH_IRQ_SW);
101
102 reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
103 reg |= 1 << irq;
104 emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
105}
106
107void ll_emma2rh_sw_irq_disable(int irq)
108{
109 u32 reg;
110
111 db_assert(irq >= 0);
112 db_assert(irq < 32);
113
114 reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
115 reg &= ~(1 << irq);
116 emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
117}
118
119static void emma2rh_gpio_irq_enable(unsigned int irq)
120{
121 ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base);
122}
123
124static void emma2rh_gpio_irq_disable(unsigned int irq)
125{
126 ll_emma2rh_gpio_irq_disable(irq - emma2rh_gpio_irq_base);
127}
128
129static unsigned int emma2rh_gpio_irq_startup(unsigned int irq)
130{
131 emma2rh_gpio_irq_enable(irq);
132 return 0;
133}
134
135#define emma2rh_gpio_irq_shutdown emma2rh_gpio_irq_disable
136
137static void emma2rh_gpio_irq_ack(unsigned int irq)
138{
139 irq -= emma2rh_gpio_irq_base;
140 emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
141 ll_emma2rh_gpio_irq_disable(irq);
142}
143
144static void emma2rh_gpio_irq_end(unsigned int irq)
145{
146 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
147 ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base);
148}
149
150hw_irq_controller emma2rh_gpio_irq_controller = {
151 .typename = "emma2rh_gpio_irq",
152 .startup = emma2rh_gpio_irq_startup,
153 .shutdown = emma2rh_gpio_irq_shutdown,
154 .enable = emma2rh_gpio_irq_enable,
155 .disable = emma2rh_gpio_irq_disable,
156 .ack = emma2rh_gpio_irq_ack,
157 .end = emma2rh_gpio_irq_end,
158 .set_affinity = NULL,
159};
160
161void emma2rh_gpio_irq_init(u32 irq_base)
162{
163 u32 i;
164
165 for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_GPIO; i++) {
166 irq_desc[i].status = IRQ_DISABLED;
167 irq_desc[i].action = NULL;
168 irq_desc[i].depth = 2;
169 irq_desc[i].handler = &emma2rh_gpio_irq_controller;
170 }
171
172 emma2rh_gpio_irq_base = irq_base;
173}
174
175void ll_emma2rh_gpio_irq_enable(int irq)
176{
177 u32 reg;
178
179 db_assert(irq >= 0);
180 db_assert(irq < NUM_EMMA2RH_IRQ_GPIO);
181
182 reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
183 reg |= 1 << irq;
184 emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
185}
186
187void ll_emma2rh_gpio_irq_disable(int irq)
188{
189 u32 reg;
190
191 db_assert(irq >= 0);
192 db_assert(irq < NUM_EMMA2RH_IRQ_GPIO);
193
194 reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
195 reg &= ~(1 << irq);
196 emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
197}
diff --git a/arch/mips/emma2rh/markeins/led.c b/arch/mips/emma2rh/markeins/led.c
new file mode 100644
index 000000000000..b65254c1bfe9
--- /dev/null
+++ b/arch/mips/emma2rh/markeins/led.c
@@ -0,0 +1,60 @@
1/*
2 * arch/mips/emma2rh/markeins/led.c
3 * This file defines the led display for Mark-eins.
4 *
5 * Copyright (C) NEC Electronics Corporation 2004-2006
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#include <linux/kernel.h>
22#include <linux/types.h>
23#include <linux/string.h>
24#include <asm/emma2rh/emma2rh.h>
25
26const unsigned long clear = 0x20202020;
27
28#define LED_BASE 0xb1400038
29
30void markeins_led_clear(void)
31{
32 emma2rh_out32(LED_BASE, clear);
33 emma2rh_out32(LED_BASE + 4, clear);
34}
35
36void markeins_led(const char *str)
37{
38 int i;
39 int len = strlen(str);
40
41 markeins_led_clear();
42 if (len > 8)
43 len = 8;
44
45 if (emma2rh_in32(0xb0000800) & (0x1 << 18))
46 for (i = 0; i < len; i++)
47 emma2rh_out8(LED_BASE + i, str[i]);
48 else
49 for (i = 0; i < len; i++)
50 emma2rh_out8(LED_BASE + (i & 4) + (3 - (i & 3)),
51 str[i]);
52}
53
54void markeins_led_hex(u32 val)
55{
56 char str[10];
57
58 sprintf(str, "%08x", val);
59 markeins_led(str);
60}
diff --git a/arch/mips/emma2rh/markeins/platform.c b/arch/mips/emma2rh/markeins/platform.c
new file mode 100644
index 000000000000..6c1eeae1a898
--- /dev/null
+++ b/arch/mips/emma2rh/markeins/platform.c
@@ -0,0 +1,170 @@
1/*
2 * arch/mips/emma2rh/markeins/platofrm.c
3 * This file sets up platform devices for EMMA2RH Mark-eins.
4 *
5 * Copyright(C) MontaVista Software Inc, 2006
6 *
7 * Author: dmitry pervushin <dpervushin@ru.mvista.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23#include <linux/config.h>
24#include <linux/init.h>
25#include <linux/kernel.h>
26#include <linux/types.h>
27#include <linux/ioport.h>
28#include <linux/serial_8250.h>
29#include <linux/mtd/physmap.h>
30
31#include <asm/cpu.h>
32#include <asm/bootinfo.h>
33#include <asm/addrspace.h>
34#include <asm/time.h>
35#include <asm/bcache.h>
36#include <asm/irq.h>
37#include <asm/reboot.h>
38#include <asm/gdb-stub.h>
39#include <asm/traps.h>
40#include <asm/debug.h>
41
42#include <asm/emma2rh/emma2rh.h>
43
44
45#define I2C_EMMA2RH "emma2rh-iic" /* must be in sync with IIC driver */
46
47static struct resource i2c_emma_resources_0[] = {
48 { NULL, EMMA2RH_IRQ_PIIC0, EMMA2RH_IRQ_PIIC0, IORESOURCE_IRQ },
49 { NULL, KSEG1ADDR(EMMA2RH_PIIC0_BASE), KSEG1ADDR(EMMA2RH_PIIC0_BASE + 0x1000), 0 },
50};
51
52struct resource i2c_emma_resources_1[] = {
53 { NULL, EMMA2RH_IRQ_PIIC1, EMMA2RH_IRQ_PIIC1, IORESOURCE_IRQ },
54 { NULL, KSEG1ADDR(EMMA2RH_PIIC1_BASE), KSEG1ADDR(EMMA2RH_PIIC1_BASE + 0x1000), 0 },
55};
56
57struct resource i2c_emma_resources_2[] = {
58 { NULL, EMMA2RH_IRQ_PIIC2, EMMA2RH_IRQ_PIIC2, IORESOURCE_IRQ },
59 { NULL, KSEG1ADDR(EMMA2RH_PIIC2_BASE), KSEG1ADDR(EMMA2RH_PIIC2_BASE + 0x1000), 0 },
60};
61
62struct platform_device i2c_emma_devices[] = {
63 [0] = {
64 .name = I2C_EMMA2RH,
65 .id = 0,
66 .resource = i2c_emma_resources_0,
67 .num_resources = ARRAY_SIZE(i2c_emma_resources_0),
68 },
69 [1] = {
70 .name = I2C_EMMA2RH,
71 .id = 1,
72 .resource = i2c_emma_resources_1,
73 .num_resources = ARRAY_SIZE(i2c_emma_resources_1),
74 },
75 [2] = {
76 .name = I2C_EMMA2RH,
77 .id = 2,
78 .resource = i2c_emma_resources_2,
79 .num_resources = ARRAY_SIZE(i2c_emma_resources_2),
80 },
81};
82
83#define EMMA2RH_SERIAL_CLOCK 18544000
84#define EMMA2RH_SERIAL_FLAGS UPF_BOOT_AUTOCONF | UPF_SKIP_TEST
85
86static struct plat_serial8250_port platform_serial_ports[] = {
87 [0] = {
88 .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR0_BASE + 3),
89 .irq = EMMA2RH_IRQ_PFUR0,
90 .uartclk = EMMA2RH_SERIAL_CLOCK,
91 .regshift = 4,
92 .iotype = UPIO_MEM,
93 .flags = EMMA2RH_SERIAL_FLAGS,
94 },
95 [1] = {
96 .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR1_BASE + 3),
97 .irq = EMMA2RH_IRQ_PFUR1,
98 .uartclk = EMMA2RH_SERIAL_CLOCK,
99 .regshift = 4,
100 .iotype = UPIO_MEM,
101 .flags = EMMA2RH_SERIAL_FLAGS,
102 },
103 [2] = {
104 .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR2_BASE + 3),
105 .irq = EMMA2RH_IRQ_PFUR2,
106 .uartclk = EMMA2RH_SERIAL_CLOCK,
107 .regshift = 4,
108 .iotype = UPIO_MEM,
109 .flags = EMMA2RH_SERIAL_FLAGS,
110 },
111 [3] = {
112 .flags = 0,
113 },
114};
115
116static struct platform_device serial_emma = {
117 .name = "serial8250",
118 .dev = {
119 .platform_data = &platform_serial_ports,
120 },
121};
122
123static struct platform_device *devices[] = {
124 &i2c_emma_devices[0],
125 &i2c_emma_devices[1],
126 &i2c_emma_devices[2],
127 &serial_emma,
128};
129
130static struct mtd_partition markeins_parts[] = {
131 [0] = {
132 .name = "RootFS",
133 .offset = 0x00000000,
134 .size = 0x00c00000,
135 },
136 [1] = {
137 .name = "boot code area",
138 .offset = MTDPART_OFS_APPEND,
139 .size = 0x00100000,
140 },
141 [2] = {
142 .name = "kernel image",
143 .offset = MTDPART_OFS_APPEND,
144 .size = 0x00300000,
145 },
146 [3] = {
147 .name = "RootFS2",
148 .offset = MTDPART_OFS_APPEND,
149 .size = 0x00c00000,
150 },
151 [4] = {
152 .name = "boot code area2",
153 .offset = MTDPART_OFS_APPEND,
154 .size = 0x00100000,
155 },
156 [5] = {
157 .name = "kernel image2",
158 .offset = MTDPART_OFS_APPEND,
159 .size = MTDPART_SIZ_FULL,
160 },
161};
162
163static int __init platform_devices_setup(void)
164{
165 physmap_set_partitions(markeins_parts, ARRAY_SIZE(markeins_parts));
166 return platform_add_devices(devices, ARRAY_SIZE(devices));
167}
168
169arch_initcall(platform_devices_setup);
170
diff --git a/arch/mips/emma2rh/markeins/setup.c b/arch/mips/emma2rh/markeins/setup.c
new file mode 100644
index 000000000000..7d98fdbf8390
--- /dev/null
+++ b/arch/mips/emma2rh/markeins/setup.c
@@ -0,0 +1,182 @@
1/*
2 * arch/mips/emma2rh/markeins/setup.c
3 * This file is setup for EMMA2RH Mark-eins.
4 *
5 * Copyright (C) NEC Electronics Corporation 2004-2006
6 *
7 * This file is based on the arch/mips/ddb5xxx/ddb5477/setup.c.
8 *
9 * Copyright 2001 MontaVista Software Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 */
25#include <linux/config.h>
26#include <linux/init.h>
27#include <linux/kernel.h>
28#include <linux/types.h>
29#include <linux/initrd.h>
30#include <linux/irq.h>
31#include <linux/ide.h>
32#include <linux/ioport.h>
33#include <linux/param.h> /* for HZ */
34#include <linux/root_dev.h>
35#include <linux/serial.h>
36#include <linux/serial_core.h>
37
38#include <asm/cpu.h>
39#include <asm/bootinfo.h>
40#include <asm/addrspace.h>
41#include <asm/time.h>
42#include <asm/bcache.h>
43#include <asm/irq.h>
44#include <asm/reboot.h>
45#include <asm/gdb-stub.h>
46#include <asm/traps.h>
47#include <asm/debug.h>
48
49#include <asm/emma2rh/emma2rh.h>
50
51#define USE_CPU_COUNTER_TIMER /* whether we use cpu counter */
52
53extern void markeins_led(const char *);
54
55static int bus_frequency = 0;
56
57static void markeins_machine_restart(char *command)
58{
59 static void (*back_to_prom) (void) = (void (*)(void))0xbfc00000;
60
61 printk("cannot EMMA2RH Mark-eins restart.\n");
62 markeins_led("restart.");
63 back_to_prom();
64}
65
66static void markeins_machine_halt(void)
67{
68 printk("EMMA2RH Mark-eins halted.\n");
69 markeins_led("halted.");
70 while (1) ;
71}
72
73static void markeins_machine_power_off(void)
74{
75 printk("EMMA2RH Mark-eins halted. Please turn off the power.\n");
76 markeins_led("poweroff.");
77 while (1) ;
78}
79
80static unsigned long clock[4] = { 166500000, 187312500, 199800000, 210600000 };
81
82static unsigned int __init detect_bus_frequency(unsigned long rtc_base)
83{
84 u32 reg;
85
86 /* detect from boot strap */
87 reg = emma2rh_in32(EMMA2RH_BHIF_STRAP_0);
88 reg = (reg >> 4) & 0x3;
89 return clock[reg];
90}
91
92static void __init emma2rh_time_init(void)
93{
94 u32 reg;
95 if (bus_frequency == 0)
96 bus_frequency = detect_bus_frequency(0);
97
98 reg = emma2rh_in32(EMMA2RH_BHIF_STRAP_0);
99 if ((reg & 0x3) == 0)
100 reg = (reg >> 6) & 0x3;
101 else {
102 reg = emma2rh_in32(EMMA2RH_BHIF_MAIN_CTRL);
103 reg = (reg >> 4) & 0x3;
104 }
105 mips_hpt_frequency = (bus_frequency * (4 + reg)) / 4 / 2;
106}
107
108static void __init emma2rh_timer_setup(struct irqaction *irq)
109{
110 /* we are using the cpu counter for timer interrupts */
111 setup_irq(CPU_IRQ_BASE + 7, irq);
112}
113
114static void markeins_board_init(void);
115extern void markeins_irq_setup(void);
116
117static void inline __init markeins_sio_setup(void)
118{
119#ifdef CONFIG_KGDB_8250
120 struct uart_port emma_port;
121
122 memset(&emma_port, 0, sizeof(emma_port));
123
124 emma_port.flags =
125 UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
126 emma_port.iotype = UPIO_MEM;
127 emma_port.regshift = 4; /* I/O addresses are every 8 bytes */
128 emma_port.uartclk = 18544000; /* Clock rate of the chip */
129
130 emma_port.line = 0;
131 emma_port.mapbase = KSEG1ADDR(EMMA2RH_PFUR0_BASE + 3);
132 emma_port.membase = (u8*)emma_port.mapbase;
133 early_serial_setup(&emma_port);
134
135 emma_port.line = 1;
136 emma_port.mapbase = KSEG1ADDR(EMMA2RH_PFUR1_BASE + 3);
137 emma_port.membase = (u8*)emma_port.mapbase;
138 early_serial_setup(&emma_port);
139
140 emma_port.irq = EMMA2RH_IRQ_PFUR1;
141 kgdb8250_add_port(1, &emma_port);
142#endif
143}
144
145void __init plat_mem_setup(void)
146{
147 /* initialize board - we don't trust the loader */
148 markeins_board_init();
149
150 set_io_port_base(KSEG1ADDR(EMMA2RH_PCI_IO_BASE));
151
152 board_time_init = emma2rh_time_init;
153 board_timer_setup = emma2rh_timer_setup;
154
155 _machine_restart = markeins_machine_restart;
156 _machine_halt = markeins_machine_halt;
157 pm_power_off = markeins_machine_power_off;
158
159 /* setup resource limits */
160 ioport_resource.start = EMMA2RH_PCI_IO_BASE;
161 ioport_resource.end = EMMA2RH_PCI_IO_BASE + EMMA2RH_PCI_IO_SIZE - 1;
162 iomem_resource.start = EMMA2RH_IO_BASE;
163 iomem_resource.end = EMMA2RH_ROM_BASE - 1;
164
165 /* Reboot on panic */
166 panic_timeout = 180;
167
168 markeins_sio_setup();
169}
170
171static void __init markeins_board_init(void)
172{
173 u32 val;
174
175 val = emma2rh_in32(EMMA2RH_PBRD_INT_EN); /* open serial interrupts. */
176 emma2rh_out32(EMMA2RH_PBRD_INT_EN, val | 0xaa);
177 val = emma2rh_in32(EMMA2RH_PBRD_CLKSEL); /* set serial clocks. */
178 emma2rh_out32(EMMA2RH_PBRD_CLKSEL, val | 0x5); /* 18MHz */
179 emma2rh_out32(EMMA2RH_PCI_CONTROL, 0);
180
181 markeins_led("MVL E2RH");
182}
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-27 03:14:30 -0500