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-rw-r--r--arch/mips/dec/int-handler.S8
-rw-r--r--arch/mips/dec/prom/call_o32.S2
-rw-r--r--arch/mips/dec/prom/init.c2
-rw-r--r--arch/mips/dec/prom/memory.c2
-rw-r--r--arch/mips/dec/setup.c4
5 files changed, 9 insertions, 9 deletions
diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S
index 22afed16ccde..41a2fa1fa12e 100644
--- a/arch/mips/dec/int-handler.S
+++ b/arch/mips/dec/int-handler.S
@@ -118,7 +118,7 @@
118 * 7 FPU/R4k timer 118 * 7 FPU/R4k timer
119 * 119 *
120 * We handle the IRQ according to _our_ priority (see setup.c), 120 * We handle the IRQ according to _our_ priority (see setup.c),
121 * then we just return. If multiple IRQs are pending then we will 121 * then we just return. If multiple IRQs are pending then we will
122 * just take another exception, big deal. 122 * just take another exception, big deal.
123 */ 123 */
124 .align 5 124 .align 5
@@ -146,7 +146,7 @@
146 /* 146 /*
147 * Find irq with highest priority 147 * Find irq with highest priority
148 */ 148 */
149 PTR_LA t1,cpu_mask_nr_tbl 149 PTR_LA t1,cpu_mask_nr_tbl
1501: lw t2,(t1) 1501: lw t2,(t1)
151 nop 151 nop
152 and t2,t0 152 and t2,t0
@@ -195,7 +195,7 @@
195 /* 195 /*
196 * Find irq with highest priority 196 * Find irq with highest priority
197 */ 197 */
198 PTR_LA t1,asic_mask_nr_tbl 198 PTR_LA t1,asic_mask_nr_tbl
1992: lw t2,(t1) 1992: lw t2,(t1)
200 nop 200 nop
201 and t2,t0 201 and t2,t0
@@ -221,7 +221,7 @@
221 FEXPORT(cpu_all_int) # HALT, timers, software junk 221 FEXPORT(cpu_all_int) # HALT, timers, software junk
222 li a0,DEC_CPU_IRQ_BASE 222 li a0,DEC_CPU_IRQ_BASE
223 srl t0,CAUSEB_IP 223 srl t0,CAUSEB_IP
224 li t1,CAUSEF_IP>>CAUSEB_IP # mask 224 li t1,CAUSEF_IP>>CAUSEB_IP # mask
225 b 1f 225 b 1f
226 li t2,4 # nr of bits / 2 226 li t2,4 # nr of bits / 2
227 227
diff --git a/arch/mips/dec/prom/call_o32.S b/arch/mips/dec/prom/call_o32.S
index c0d1522d448f..8c8498159e43 100644
--- a/arch/mips/dec/prom/call_o32.S
+++ b/arch/mips/dec/prom/call_o32.S
@@ -14,7 +14,7 @@
14 14
15/* Maximum number of arguments supported. Must be even! */ 15/* Maximum number of arguments supported. Must be even! */
16#define O32_ARGC 32 16#define O32_ARGC 32
17/* Number of static registers we save. */ 17/* Number of static registers we save. */
18#define O32_STATC 11 18#define O32_STATC 11
19/* Frame size for both of the above. */ 19/* Frame size for both of the above. */
20#define O32_FRAMESZ (4 * O32_ARGC + SZREG * O32_STATC) 20#define O32_FRAMESZ (4 * O32_ARGC + SZREG * O32_STATC)
diff --git a/arch/mips/dec/prom/init.c b/arch/mips/dec/prom/init.c
index 468f665de7bb..4e1761e0a09a 100644
--- a/arch/mips/dec/prom/init.c
+++ b/arch/mips/dec/prom/init.c
@@ -104,7 +104,7 @@ void __init prom_init(void)
104 if (prom_is_rex(magic)) 104 if (prom_is_rex(magic))
105 rex_clear_cache(); 105 rex_clear_cache();
106 106
107 /* Register the early console. */ 107 /* Register the early console. */
108 register_prom_console(); 108 register_prom_console();
109 109
110 /* Were we compiled with the right CPU option? */ 110 /* Were we compiled with the right CPU option? */
diff --git a/arch/mips/dec/prom/memory.c b/arch/mips/dec/prom/memory.c
index 0aadac742900..8c62316f22f4 100644
--- a/arch/mips/dec/prom/memory.c
+++ b/arch/mips/dec/prom/memory.c
@@ -22,7 +22,7 @@ volatile unsigned long mem_err; /* So we know an error occurred */
22 22
23/* 23/*
24 * Probe memory in 4MB chunks, waiting for an error to tell us we've fallen 24 * Probe memory in 4MB chunks, waiting for an error to tell us we've fallen
25 * off the end of real memory. Only suitable for the 2100/3100's (PMAX). 25 * off the end of real memory. Only suitable for the 2100/3100's (PMAX).
26 */ 26 */
27 27
28#define CHUNK_SIZE 0x400000 28#define CHUNK_SIZE 0x400000
diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c
index 741cb4235bde..56e6e2c23683 100644
--- a/arch/mips/dec/setup.c
+++ b/arch/mips/dec/setup.c
@@ -65,7 +65,7 @@ EXPORT_SYMBOL(ioasic_base);
65/* 65/*
66 * IRQ routing and priority tables. Priorites are set as follows: 66 * IRQ routing and priority tables. Priorites are set as follows:
67 * 67 *
68 * KN01 KN230 KN02 KN02-BA KN02-CA KN03 68 * KN01 KN230 KN02 KN02-BA KN02-CA KN03
69 * 69 *
70 * MEMORY CPU CPU CPU ASIC CPU CPU 70 * MEMORY CPU CPU CPU ASIC CPU CPU
71 * RTC CPU CPU CPU ASIC CPU CPU 71 * RTC CPU CPU CPU ASIC CPU CPU
@@ -413,7 +413,7 @@ static void __init dec_init_kn02(void)
413 413
414/* 414/*
415 * Machine-specific initialisation for KN02-BA, aka DS5000/1xx 415 * Machine-specific initialisation for KN02-BA, aka DS5000/1xx
416 * (xx = 20, 25, 33), aka 3min. Also applies to KN04(-BA), aka 416 * (xx = 20, 25, 33), aka 3min. Also applies to KN04(-BA), aka
417 * DS5000/150, aka 4min. 417 * DS5000/150, aka 4min.
418 */ 418 */
419static int kn02ba_interrupt[DEC_NR_INTS] __initdata = { 419static int kn02ba_interrupt[DEC_NR_INTS] __initdata = {