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-rw-r--r--arch/mips/dec/setup.c16
1 files changed, 11 insertions, 5 deletions
diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c
index f63fb9cd43c6..8861c3b22e4b 100644
--- a/arch/mips/dec/setup.c
+++ b/arch/mips/dec/setup.c
@@ -39,6 +39,7 @@
39#include <asm/dec/kn02ca.h> 39#include <asm/dec/kn02ca.h>
40#include <asm/dec/kn03.h> 40#include <asm/dec/kn03.h>
41#include <asm/dec/kn230.h> 41#include <asm/dec/kn230.h>
42#include <asm/dec/system.h>
42 43
43 44
44extern void dec_machine_restart(char *command); 45extern void dec_machine_restart(char *command);
@@ -48,10 +49,16 @@ extern irqreturn_t dec_intr_halt(int irq, void *dev_id, struct pt_regs *regs);
48 49
49extern asmlinkage void decstation_handle_int(void); 50extern asmlinkage void decstation_handle_int(void);
50 51
52unsigned long dec_kn_slot_base, dec_kn_slot_size;
53
54EXPORT_SYMBOL(dec_kn_slot_base);
55EXPORT_SYMBOL(dec_kn_slot_size);
56
51spinlock_t ioasic_ssr_lock; 57spinlock_t ioasic_ssr_lock;
52 58
53volatile u32 *ioasic_base; 59volatile u32 *ioasic_base;
54unsigned long dec_kn_slot_size; 60
61EXPORT_SYMBOL(ioasic_base);
55 62
56/* 63/*
57 * IRQ routing and priority tables. Priorites are set as follows: 64 * IRQ routing and priority tables. Priorites are set as follows:
@@ -78,6 +85,9 @@ unsigned long dec_kn_slot_size;
78int dec_interrupt[DEC_NR_INTS] = { 85int dec_interrupt[DEC_NR_INTS] = {
79 [0 ... DEC_NR_INTS - 1] = -1 86 [0 ... DEC_NR_INTS - 1] = -1
80}; 87};
88
89EXPORT_SYMBOL(dec_interrupt);
90
81int_ptr cpu_mask_nr_tbl[DEC_MAX_CPU_INTS][2] = { 91int_ptr cpu_mask_nr_tbl[DEC_MAX_CPU_INTS][2] = {
82 { { .i = ~0 }, { .p = dec_intr_unimplemented } }, 92 { { .i = ~0 }, { .p = dec_intr_unimplemented } },
83}; 93};
@@ -755,7 +765,3 @@ void __init arch_init_irq(void)
755 if (dec_interrupt[DEC_IRQ_HALT] >= 0) 765 if (dec_interrupt[DEC_IRQ_HALT] >= 0)
756 setup_irq(dec_interrupt[DEC_IRQ_HALT], &haltirq); 766 setup_irq(dec_interrupt[DEC_IRQ_HALT], &haltirq);
757} 767}
758
759EXPORT_SYMBOL(ioasic_base);
760EXPORT_SYMBOL(dec_kn_slot_size);
761EXPORT_SYMBOL(dec_interrupt);