diff options
Diffstat (limited to 'arch/mips/dec/setup.c')
-rw-r--r-- | arch/mips/dec/setup.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c index d34032ac492a..1058e2f409bb 100644 --- a/arch/mips/dec/setup.c +++ b/arch/mips/dec/setup.c | |||
@@ -234,7 +234,7 @@ static void __init dec_init_kn01(void) | |||
234 | memcpy(&cpu_mask_nr_tbl, &kn01_cpu_mask_nr_tbl, | 234 | memcpy(&cpu_mask_nr_tbl, &kn01_cpu_mask_nr_tbl, |
235 | sizeof(kn01_cpu_mask_nr_tbl)); | 235 | sizeof(kn01_cpu_mask_nr_tbl)); |
236 | 236 | ||
237 | mips_cpu_irq_init(DEC_CPU_IRQ_BASE); | 237 | mips_cpu_irq_init(); |
238 | 238 | ||
239 | } /* dec_init_kn01 */ | 239 | } /* dec_init_kn01 */ |
240 | 240 | ||
@@ -309,7 +309,7 @@ static void __init dec_init_kn230(void) | |||
309 | memcpy(&cpu_mask_nr_tbl, &kn230_cpu_mask_nr_tbl, | 309 | memcpy(&cpu_mask_nr_tbl, &kn230_cpu_mask_nr_tbl, |
310 | sizeof(kn230_cpu_mask_nr_tbl)); | 310 | sizeof(kn230_cpu_mask_nr_tbl)); |
311 | 311 | ||
312 | mips_cpu_irq_init(DEC_CPU_IRQ_BASE); | 312 | mips_cpu_irq_init(); |
313 | 313 | ||
314 | } /* dec_init_kn230 */ | 314 | } /* dec_init_kn230 */ |
315 | 315 | ||
@@ -403,7 +403,7 @@ static void __init dec_init_kn02(void) | |||
403 | memcpy(&asic_mask_nr_tbl, &kn02_asic_mask_nr_tbl, | 403 | memcpy(&asic_mask_nr_tbl, &kn02_asic_mask_nr_tbl, |
404 | sizeof(kn02_asic_mask_nr_tbl)); | 404 | sizeof(kn02_asic_mask_nr_tbl)); |
405 | 405 | ||
406 | mips_cpu_irq_init(DEC_CPU_IRQ_BASE); | 406 | mips_cpu_irq_init(); |
407 | init_kn02_irqs(KN02_IRQ_BASE); | 407 | init_kn02_irqs(KN02_IRQ_BASE); |
408 | 408 | ||
409 | } /* dec_init_kn02 */ | 409 | } /* dec_init_kn02 */ |
@@ -504,7 +504,7 @@ static void __init dec_init_kn02ba(void) | |||
504 | memcpy(&asic_mask_nr_tbl, &kn02ba_asic_mask_nr_tbl, | 504 | memcpy(&asic_mask_nr_tbl, &kn02ba_asic_mask_nr_tbl, |
505 | sizeof(kn02ba_asic_mask_nr_tbl)); | 505 | sizeof(kn02ba_asic_mask_nr_tbl)); |
506 | 506 | ||
507 | mips_cpu_irq_init(DEC_CPU_IRQ_BASE); | 507 | mips_cpu_irq_init(); |
508 | init_ioasic_irqs(IO_IRQ_BASE); | 508 | init_ioasic_irqs(IO_IRQ_BASE); |
509 | 509 | ||
510 | } /* dec_init_kn02ba */ | 510 | } /* dec_init_kn02ba */ |
@@ -601,7 +601,7 @@ static void __init dec_init_kn02ca(void) | |||
601 | memcpy(&asic_mask_nr_tbl, &kn02ca_asic_mask_nr_tbl, | 601 | memcpy(&asic_mask_nr_tbl, &kn02ca_asic_mask_nr_tbl, |
602 | sizeof(kn02ca_asic_mask_nr_tbl)); | 602 | sizeof(kn02ca_asic_mask_nr_tbl)); |
603 | 603 | ||
604 | mips_cpu_irq_init(DEC_CPU_IRQ_BASE); | 604 | mips_cpu_irq_init(); |
605 | init_ioasic_irqs(IO_IRQ_BASE); | 605 | init_ioasic_irqs(IO_IRQ_BASE); |
606 | 606 | ||
607 | } /* dec_init_kn02ca */ | 607 | } /* dec_init_kn02ca */ |
@@ -702,7 +702,7 @@ static void __init dec_init_kn03(void) | |||
702 | memcpy(&asic_mask_nr_tbl, &kn03_asic_mask_nr_tbl, | 702 | memcpy(&asic_mask_nr_tbl, &kn03_asic_mask_nr_tbl, |
703 | sizeof(kn03_asic_mask_nr_tbl)); | 703 | sizeof(kn03_asic_mask_nr_tbl)); |
704 | 704 | ||
705 | mips_cpu_irq_init(DEC_CPU_IRQ_BASE); | 705 | mips_cpu_irq_init(); |
706 | init_ioasic_irqs(IO_IRQ_BASE); | 706 | init_ioasic_irqs(IO_IRQ_BASE); |
707 | 707 | ||
708 | } /* dec_init_kn03 */ | 708 | } /* dec_init_kn03 */ |