diff options
Diffstat (limited to 'arch/mips/dec/setup.c')
-rw-r--r-- | arch/mips/dec/setup.c | 57 |
1 files changed, 37 insertions, 20 deletions
diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c index 6a69309baf40..9ef54fe1feaa 100644 --- a/arch/mips/dec/setup.c +++ b/arch/mips/dec/setup.c | |||
@@ -1,19 +1,20 @@ | |||
1 | /* | 1 | /* |
2 | * Setup the interrupt stuff. | 2 | * System-specific setup, especially interrupts. |
3 | * | 3 | * |
4 | * This file is subject to the terms and conditions of the GNU General Public | 4 | * This file is subject to the terms and conditions of the GNU General Public |
5 | * License. See the file "COPYING" in the main directory of this archive | 5 | * License. See the file "COPYING" in the main directory of this archive |
6 | * for more details. | 6 | * for more details. |
7 | * | 7 | * |
8 | * Copyright (C) 1998 Harald Koerfgen | 8 | * Copyright (C) 1998 Harald Koerfgen |
9 | * Copyright (C) 2000, 2001, 2002, 2003 Maciej W. Rozycki | 9 | * Copyright (C) 2000, 2001, 2002, 2003, 2005 Maciej W. Rozycki |
10 | */ | 10 | */ |
11 | #include <linux/sched.h> | ||
12 | #include <linux/interrupt.h> | ||
13 | #include <linux/param.h> | ||
14 | #include <linux/console.h> | 11 | #include <linux/console.h> |
15 | #include <linux/init.h> | 12 | #include <linux/init.h> |
13 | #include <linux/interrupt.h> | ||
14 | #include <linux/ioport.h> | ||
16 | #include <linux/module.h> | 15 | #include <linux/module.h> |
16 | #include <linux/param.h> | ||
17 | #include <linux/sched.h> | ||
17 | #include <linux/spinlock.h> | 18 | #include <linux/spinlock.h> |
18 | #include <linux/types.h> | 19 | #include <linux/types.h> |
19 | 20 | ||
@@ -38,6 +39,7 @@ | |||
38 | #include <asm/dec/kn02ca.h> | 39 | #include <asm/dec/kn02ca.h> |
39 | #include <asm/dec/kn03.h> | 40 | #include <asm/dec/kn03.h> |
40 | #include <asm/dec/kn230.h> | 41 | #include <asm/dec/kn230.h> |
42 | #include <asm/dec/system.h> | ||
41 | 43 | ||
42 | 44 | ||
43 | extern void dec_machine_restart(char *command); | 45 | extern void dec_machine_restart(char *command); |
@@ -47,10 +49,16 @@ extern irqreturn_t dec_intr_halt(int irq, void *dev_id, struct pt_regs *regs); | |||
47 | 49 | ||
48 | extern asmlinkage void decstation_handle_int(void); | 50 | extern asmlinkage void decstation_handle_int(void); |
49 | 51 | ||
52 | unsigned long dec_kn_slot_base, dec_kn_slot_size; | ||
53 | |||
54 | EXPORT_SYMBOL(dec_kn_slot_base); | ||
55 | EXPORT_SYMBOL(dec_kn_slot_size); | ||
56 | |||
50 | spinlock_t ioasic_ssr_lock; | 57 | spinlock_t ioasic_ssr_lock; |
51 | 58 | ||
52 | volatile u32 *ioasic_base; | 59 | volatile u32 *ioasic_base; |
53 | unsigned long dec_kn_slot_size; | 60 | |
61 | EXPORT_SYMBOL(ioasic_base); | ||
54 | 62 | ||
55 | /* | 63 | /* |
56 | * IRQ routing and priority tables. Priorites are set as follows: | 64 | * IRQ routing and priority tables. Priorites are set as follows: |
@@ -77,6 +85,9 @@ unsigned long dec_kn_slot_size; | |||
77 | int dec_interrupt[DEC_NR_INTS] = { | 85 | int dec_interrupt[DEC_NR_INTS] = { |
78 | [0 ... DEC_NR_INTS - 1] = -1 | 86 | [0 ... DEC_NR_INTS - 1] = -1 |
79 | }; | 87 | }; |
88 | |||
89 | EXPORT_SYMBOL(dec_interrupt); | ||
90 | |||
80 | int_ptr cpu_mask_nr_tbl[DEC_MAX_CPU_INTS][2] = { | 91 | int_ptr cpu_mask_nr_tbl[DEC_MAX_CPU_INTS][2] = { |
81 | { { .i = ~0 }, { .p = dec_intr_unimplemented } }, | 92 | { { .i = ~0 }, { .p = dec_intr_unimplemented } }, |
82 | }; | 93 | }; |
@@ -108,11 +119,20 @@ static struct irqaction haltirq = { | |||
108 | /* | 119 | /* |
109 | * Bus error (DBE/IBE exceptions and bus interrupts) handling setup. | 120 | * Bus error (DBE/IBE exceptions and bus interrupts) handling setup. |
110 | */ | 121 | */ |
111 | void __init dec_be_init(void) | 122 | static void __init dec_be_init(void) |
112 | { | 123 | { |
113 | switch (mips_machtype) { | 124 | switch (mips_machtype) { |
114 | case MACH_DS23100: /* DS2100/DS3100 Pmin/Pmax */ | 125 | case MACH_DS23100: /* DS2100/DS3100 Pmin/Pmax */ |
126 | board_be_handler = dec_kn01_be_handler; | ||
127 | busirq.handler = dec_kn01_be_interrupt; | ||
115 | busirq.flags |= SA_SHIRQ; | 128 | busirq.flags |= SA_SHIRQ; |
129 | dec_kn01_be_init(); | ||
130 | break; | ||
131 | case MACH_DS5000_1XX: /* DS5000/1xx 3min */ | ||
132 | case MACH_DS5000_XX: /* DS5000/xx Maxine */ | ||
133 | board_be_handler = dec_kn02xa_be_handler; | ||
134 | busirq.handler = dec_kn02xa_be_interrupt; | ||
135 | dec_kn02xa_be_init(); | ||
116 | break; | 136 | break; |
117 | case MACH_DS5000_200: /* DS5000/200 3max */ | 137 | case MACH_DS5000_200: /* DS5000/200 3max */ |
118 | case MACH_DS5000_2X0: /* DS5000/240 3max+ */ | 138 | case MACH_DS5000_2X0: /* DS5000/240 3max+ */ |
@@ -128,7 +148,7 @@ void __init dec_be_init(void) | |||
128 | extern void dec_time_init(void); | 148 | extern void dec_time_init(void); |
129 | extern void dec_timer_setup(struct irqaction *); | 149 | extern void dec_timer_setup(struct irqaction *); |
130 | 150 | ||
131 | static void __init decstation_setup(void) | 151 | void __init plat_setup(void) |
132 | { | 152 | { |
133 | board_be_init = dec_be_init; | 153 | board_be_init = dec_be_init; |
134 | board_time_init = dec_time_init; | 154 | board_time_init = dec_time_init; |
@@ -139,9 +159,10 @@ static void __init decstation_setup(void) | |||
139 | _machine_restart = dec_machine_restart; | 159 | _machine_restart = dec_machine_restart; |
140 | _machine_halt = dec_machine_halt; | 160 | _machine_halt = dec_machine_halt; |
141 | _machine_power_off = dec_machine_power_off; | 161 | _machine_power_off = dec_machine_power_off; |
142 | } | ||
143 | 162 | ||
144 | early_initcall(decstation_setup); | 163 | ioport_resource.start = ~0UL; |
164 | ioport_resource.end = 0UL; | ||
165 | } | ||
145 | 166 | ||
146 | /* | 167 | /* |
147 | * Machine-specific initialisation for KN01, aka DS2100 (aka Pmin) | 168 | * Machine-specific initialisation for KN01, aka DS2100 (aka Pmin) |
@@ -206,7 +227,7 @@ static int_ptr kn01_cpu_mask_nr_tbl[][2] __initdata = { | |||
206 | { .p = cpu_all_int } }, | 227 | { .p = cpu_all_int } }, |
207 | }; | 228 | }; |
208 | 229 | ||
209 | void __init dec_init_kn01(void) | 230 | static void __init dec_init_kn01(void) |
210 | { | 231 | { |
211 | /* IRQ routing. */ | 232 | /* IRQ routing. */ |
212 | memcpy(&dec_interrupt, &kn01_interrupt, | 233 | memcpy(&dec_interrupt, &kn01_interrupt, |
@@ -281,7 +302,7 @@ static int_ptr kn230_cpu_mask_nr_tbl[][2] __initdata = { | |||
281 | { .p = cpu_all_int } }, | 302 | { .p = cpu_all_int } }, |
282 | }; | 303 | }; |
283 | 304 | ||
284 | void __init dec_init_kn230(void) | 305 | static void __init dec_init_kn230(void) |
285 | { | 306 | { |
286 | /* IRQ routing. */ | 307 | /* IRQ routing. */ |
287 | memcpy(&dec_interrupt, &kn230_interrupt, | 308 | memcpy(&dec_interrupt, &kn230_interrupt, |
@@ -371,7 +392,7 @@ static int_ptr kn02_asic_mask_nr_tbl[][2] __initdata = { | |||
371 | { .p = kn02_all_int } }, | 392 | { .p = kn02_all_int } }, |
372 | }; | 393 | }; |
373 | 394 | ||
374 | void __init dec_init_kn02(void) | 395 | static void __init dec_init_kn02(void) |
375 | { | 396 | { |
376 | /* IRQ routing. */ | 397 | /* IRQ routing. */ |
377 | memcpy(&dec_interrupt, &kn02_interrupt, | 398 | memcpy(&dec_interrupt, &kn02_interrupt, |
@@ -472,7 +493,7 @@ static int_ptr kn02ba_asic_mask_nr_tbl[][2] __initdata = { | |||
472 | { .p = asic_all_int } }, | 493 | { .p = asic_all_int } }, |
473 | }; | 494 | }; |
474 | 495 | ||
475 | void __init dec_init_kn02ba(void) | 496 | static void __init dec_init_kn02ba(void) |
476 | { | 497 | { |
477 | /* IRQ routing. */ | 498 | /* IRQ routing. */ |
478 | memcpy(&dec_interrupt, &kn02ba_interrupt, | 499 | memcpy(&dec_interrupt, &kn02ba_interrupt, |
@@ -569,7 +590,7 @@ static int_ptr kn02ca_asic_mask_nr_tbl[][2] __initdata = { | |||
569 | { .p = asic_all_int } }, | 590 | { .p = asic_all_int } }, |
570 | }; | 591 | }; |
571 | 592 | ||
572 | void __init dec_init_kn02ca(void) | 593 | static void __init dec_init_kn02ca(void) |
573 | { | 594 | { |
574 | /* IRQ routing. */ | 595 | /* IRQ routing. */ |
575 | memcpy(&dec_interrupt, &kn02ca_interrupt, | 596 | memcpy(&dec_interrupt, &kn02ca_interrupt, |
@@ -670,7 +691,7 @@ static int_ptr kn03_asic_mask_nr_tbl[][2] __initdata = { | |||
670 | { .p = asic_all_int } }, | 691 | { .p = asic_all_int } }, |
671 | }; | 692 | }; |
672 | 693 | ||
673 | void __init dec_init_kn03(void) | 694 | static void __init dec_init_kn03(void) |
674 | { | 695 | { |
675 | /* IRQ routing. */ | 696 | /* IRQ routing. */ |
676 | memcpy(&dec_interrupt, &kn03_interrupt, | 697 | memcpy(&dec_interrupt, &kn03_interrupt, |
@@ -744,7 +765,3 @@ void __init arch_init_irq(void) | |||
744 | if (dec_interrupt[DEC_IRQ_HALT] >= 0) | 765 | if (dec_interrupt[DEC_IRQ_HALT] >= 0) |
745 | setup_irq(dec_interrupt[DEC_IRQ_HALT], &haltirq); | 766 | setup_irq(dec_interrupt[DEC_IRQ_HALT], &haltirq); |
746 | } | 767 | } |
747 | |||
748 | EXPORT_SYMBOL(ioasic_base); | ||
749 | EXPORT_SYMBOL(dec_kn_slot_size); | ||
750 | EXPORT_SYMBOL(dec_interrupt); | ||