diff options
Diffstat (limited to 'arch/mips/dec/kn02-irq.c')
| -rw-r--r-- | arch/mips/dec/kn02-irq.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c index e0bfcd1521e2..898bed502a34 100644 --- a/arch/mips/dec/kn02-irq.c +++ b/arch/mips/dec/kn02-irq.c | |||
| @@ -4,7 +4,7 @@ | |||
| 4 | * DECstation 5000/200 (KN02) Control and Status Register | 4 | * DECstation 5000/200 (KN02) Control and Status Register |
| 5 | * interrupts. | 5 | * interrupts. |
| 6 | * | 6 | * |
| 7 | * Copyright (c) 2002, 2003 Maciej W. Rozycki | 7 | * Copyright (c) 2002, 2003, 2005 Maciej W. Rozycki |
| 8 | * | 8 | * |
| 9 | * This program is free software; you can redistribute it and/or | 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License | 10 | * modify it under the terms of the GNU General Public License |
| @@ -37,7 +37,8 @@ static int kn02_irq_base; | |||
| 37 | 37 | ||
| 38 | static inline void unmask_kn02_irq(unsigned int irq) | 38 | static inline void unmask_kn02_irq(unsigned int irq) |
| 39 | { | 39 | { |
| 40 | volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE; | 40 | volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + |
| 41 | KN02_CSR); | ||
| 41 | 42 | ||
| 42 | cached_kn02_csr |= (1 << (irq - kn02_irq_base + 16)); | 43 | cached_kn02_csr |= (1 << (irq - kn02_irq_base + 16)); |
| 43 | *csr = cached_kn02_csr; | 44 | *csr = cached_kn02_csr; |
| @@ -45,7 +46,8 @@ static inline void unmask_kn02_irq(unsigned int irq) | |||
| 45 | 46 | ||
| 46 | static inline void mask_kn02_irq(unsigned int irq) | 47 | static inline void mask_kn02_irq(unsigned int irq) |
| 47 | { | 48 | { |
| 48 | volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE; | 49 | volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + |
| 50 | KN02_CSR); | ||
| 49 | 51 | ||
| 50 | cached_kn02_csr &= ~(1 << (irq - kn02_irq_base + 16)); | 52 | cached_kn02_csr &= ~(1 << (irq - kn02_irq_base + 16)); |
| 51 | *csr = cached_kn02_csr; | 53 | *csr = cached_kn02_csr; |
| @@ -105,13 +107,14 @@ static struct hw_interrupt_type kn02_irq_type = { | |||
| 105 | 107 | ||
| 106 | void __init init_kn02_irqs(int base) | 108 | void __init init_kn02_irqs(int base) |
| 107 | { | 109 | { |
| 108 | volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE; | 110 | volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + |
| 111 | KN02_CSR); | ||
| 109 | unsigned long flags; | 112 | unsigned long flags; |
| 110 | int i; | 113 | int i; |
| 111 | 114 | ||
| 112 | /* Mask interrupts. */ | 115 | /* Mask interrupts. */ |
| 113 | spin_lock_irqsave(&kn02_lock, flags); | 116 | spin_lock_irqsave(&kn02_lock, flags); |
| 114 | cached_kn02_csr &= ~KN03_CSR_IOINTEN; | 117 | cached_kn02_csr &= ~KN02_CSR_IOINTEN; |
| 115 | *csr = cached_kn02_csr; | 118 | *csr = cached_kn02_csr; |
| 116 | iob(); | 119 | iob(); |
| 117 | spin_unlock_irqrestore(&kn02_lock, flags); | 120 | spin_unlock_irqrestore(&kn02_lock, flags); |
