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-rw-r--r--arch/mips/dec/int-handler.S10
1 files changed, 3 insertions, 7 deletions
diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S
index 5bafd585ac3e..e8ec93e33fe6 100644
--- a/arch/mips/dec/int-handler.S
+++ b/arch/mips/dec/int-handler.S
@@ -36,7 +36,7 @@
36 .text 36 .text
37 .set noreorder 37 .set noreorder
38/* 38/*
39 * decstation_handle_int: Interrupt handler for DECstations 39 * plat_irq_dispatch: Interrupt handler for DECstations
40 * 40 *
41 * We follow the model in the Indy interrupt code by David Miller, where he 41 * We follow the model in the Indy interrupt code by David Miller, where he
42 * says: a lot of complication here is taken away because: 42 * says: a lot of complication here is taken away because:
@@ -125,11 +125,7 @@
125 * just take another exception, big deal. 125 * just take another exception, big deal.
126 */ 126 */
127 .align 5 127 .align 5
128 NESTED(decstation_handle_int, PT_SIZE, ra) 128 NESTED(plat_irq_dispatch, PT_SIZE, ra)
129 .set noat
130 SAVE_ALL
131 CLI # TEST: interrupts should be off
132 .set at
133 .set noreorder 129 .set noreorder
134 130
135 /* 131 /*
@@ -286,7 +282,7 @@ spurious:
286 nop 282 nop
287 j ret_from_irq 283 j ret_from_irq
288 nop 284 nop
289 END(decstation_handle_int) 285 END(plat_irq_dispatch)
290 286
291/* 287/*
292 * Generic unimplemented interrupt routines -- cpu_mask_nr_tbl 288 * Generic unimplemented interrupt routines -- cpu_mask_nr_tbl