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Diffstat (limited to 'arch/mips/dec/ecc-berr.c')
-rw-r--r--arch/mips/dec/ecc-berr.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/mips/dec/ecc-berr.c b/arch/mips/dec/ecc-berr.c
index 3e374d05978f..c8430c07355e 100644
--- a/arch/mips/dec/ecc-berr.c
+++ b/arch/mips/dec/ecc-berr.c
@@ -18,7 +18,6 @@
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/sched.h> 20#include <linux/sched.h>
21#include <linux/spinlock.h>
22#include <linux/types.h> 21#include <linux/types.h>
23 22
24#include <asm/addrspace.h> 23#include <asm/addrspace.h>
@@ -231,13 +230,10 @@ irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id)
231static inline void dec_kn02_be_init(void) 230static inline void dec_kn02_be_init(void)
232{ 231{
233 volatile u32 *csr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR); 232 volatile u32 *csr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR);
234 unsigned long flags;
235 233
236 kn0x_erraddr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_ERRADDR); 234 kn0x_erraddr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_ERRADDR);
237 kn0x_chksyn = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CHKSYN); 235 kn0x_chksyn = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CHKSYN);
238 236
239 spin_lock_irqsave(&kn02_lock, flags);
240
241 /* Preset write-only bits of the Control Register cache. */ 237 /* Preset write-only bits of the Control Register cache. */
242 cached_kn02_csr = *csr | KN02_CSR_LEDS; 238 cached_kn02_csr = *csr | KN02_CSR_LEDS;
243 239
@@ -247,8 +243,6 @@ static inline void dec_kn02_be_init(void)
247 cached_kn02_csr |= KN02_CSR_CORRECT; 243 cached_kn02_csr |= KN02_CSR_CORRECT;
248 *csr = cached_kn02_csr; 244 *csr = cached_kn02_csr;
249 iob(); 245 iob();
250
251 spin_unlock_irqrestore(&kn02_lock, flags);
252} 246}
253 247
254static inline void dec_kn03_be_init(void) 248static inline void dec_kn03_be_init(void)