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Diffstat (limited to 'arch/mips/ddb5xxx/ddb5477/setup.c')
-rw-r--r--arch/mips/ddb5xxx/ddb5477/setup.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/mips/ddb5xxx/ddb5477/setup.c b/arch/mips/ddb5xxx/ddb5477/setup.c
index 15c6e543b56f..d62f5a789b05 100644
--- a/arch/mips/ddb5xxx/ddb5477/setup.c
+++ b/arch/mips/ddb5xxx/ddb5477/setup.c
@@ -141,7 +141,7 @@ static void __init ddb_time_init(void)
141 141
142 /* mips_hpt_frequency is 1/2 of the cpu core freq */ 142 /* mips_hpt_frequency is 1/2 of the cpu core freq */
143 i = (read_c0_config() >> 28 ) & 7; 143 i = (read_c0_config() >> 28 ) & 7;
144 if ((current_cpu_data.cputype == CPU_R5432) && (i == 3)) 144 if ((current_cpu_data.cputype == CPU_R5432) && (i == 3))
145 i = 4; 145 i = 4;
146 mips_hpt_frequency = bus_frequency*(i+4)/4; 146 mips_hpt_frequency = bus_frequency*(i+4)/4;
147} 147}
@@ -298,11 +298,11 @@ static void __init ddb5477_board_init(void)
298 298
299 if (mips_machtype == MACH_NEC_ROCKHOPPER 299 if (mips_machtype == MACH_NEC_ROCKHOPPER
300 || mips_machtype == MACH_NEC_ROCKHOPPERII) { 300 || mips_machtype == MACH_NEC_ROCKHOPPERII) {
301 /* Disable bus diagnostics. */ 301 /* Disable bus diagnostics. */
302 ddb_out32(DDB_PCICTL0_L, 0); 302 ddb_out32(DDB_PCICTL0_L, 0);
303 ddb_out32(DDB_PCICTL0_H, 0); 303 ddb_out32(DDB_PCICTL0_H, 0);
304 ddb_out32(DDB_PCICTL1_L, 0); 304 ddb_out32(DDB_PCICTL1_L, 0);
305 ddb_out32(DDB_PCICTL1_H, 0); 305 ddb_out32(DDB_PCICTL1_H, 0);
306 } 306 }
307 307
308 if (mips_machtype == MACH_NEC_ROCKHOPPER) { 308 if (mips_machtype == MACH_NEC_ROCKHOPPER) {
@@ -354,7 +354,7 @@ static void __init ddb5477_board_init(void)
354 */ 354 */
355 pci_write_config_byte(&dev_m1533, 0x58, 0x74); 355 pci_write_config_byte(&dev_m1533, 0x58, 0x74);
356 356
357 /* 357 /*
358 * positive decode (bit6 -0) 358 * positive decode (bit6 -0)
359 * enable IDE controler interrupt (bit 4 -1) 359 * enable IDE controler interrupt (bit 4 -1)
360 * setup SIRQ to point to IRQ 14 (bit 3:0 - 1101) 360 * setup SIRQ to point to IRQ 14 (bit 3:0 - 1101)
@@ -364,31 +364,31 @@ static void __init ddb5477_board_init(void)
364 /* Setup M5229 registers */ 364 /* Setup M5229 registers */
365 dev_m5229.bus = &bus; 365 dev_m5229.bus = &bus;
366 dev_m5229.sysdata = NULL; 366 dev_m5229.sysdata = NULL;
367 dev_m5229.devfn = 4*8; // slot 4 (AD15): M5229 IDE 367 dev_m5229.devfn = 4*8; // slot 4 (AD15): M5229 IDE
368 368
369 /* 369 /*
370 * enable IDE in the M5229 config register 0x50 (bit 0 - 1) 370 * enable IDE in the M5229 config register 0x50 (bit 0 - 1)
371 * M5229 IDSEL is addr:15; see above setting 371 * M5229 IDSEL is addr:15; see above setting
372 */ 372 */
373 pci_read_config_byte(&dev_m5229, 0x50, &temp8); 373 pci_read_config_byte(&dev_m5229, 0x50, &temp8);
374 pci_write_config_byte(&dev_m5229, 0x50, temp8 | 0x1); 374 pci_write_config_byte(&dev_m5229, 0x50, temp8 | 0x1);
375 375
376 /* 376 /*
377 * enable bus master (bit 2) and IO decoding (bit 0) 377 * enable bus master (bit 2) and IO decoding (bit 0)
378 */ 378 */
379 pci_read_config_byte(&dev_m5229, 0x04, &temp8); 379 pci_read_config_byte(&dev_m5229, 0x04, &temp8);
380 pci_write_config_byte(&dev_m5229, 0x04, temp8 | 0x5); 380 pci_write_config_byte(&dev_m5229, 0x04, temp8 | 0x5);
381 381
382 /* 382 /*
383 * enable native, copied from arch/ppc/k2boot/head.S 383 * enable native, copied from arch/ppc/k2boot/head.S
384 * TODO - need volatile, need to be portable 384 * TODO - need volatile, need to be portable
385 */ 385 */
386 pci_write_config_byte(&dev_m5229, 0x09, 0xef); 386 pci_write_config_byte(&dev_m5229, 0x09, 0xef);
387 387
388 /* Set Primary Channel Command Block Timing */ 388 /* Set Primary Channel Command Block Timing */
389 pci_write_config_byte(&dev_m5229, 0x59, 0x31); 389 pci_write_config_byte(&dev_m5229, 0x59, 0x31);
390 390
391 /* 391 /*
392 * Enable primary channel 40-pin cable 392 * Enable primary channel 40-pin cable
393 * M5229 register 0x4a (bit 0) 393 * M5229 register 0x4a (bit 0)
394 */ 394 */