diff options
Diffstat (limited to 'arch/mips/ddb5xxx/ddb5477/irq.c')
-rw-r--r-- | arch/mips/ddb5xxx/ddb5477/irq.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/ddb5xxx/ddb5477/irq.c b/arch/mips/ddb5xxx/ddb5477/irq.c index 5f027bfa4af8..9ffe1a9142ca 100644 --- a/arch/mips/ddb5xxx/ddb5477/irq.c +++ b/arch/mips/ddb5xxx/ddb5477/irq.c | |||
@@ -76,7 +76,7 @@ set_pci_int_attr(u32 pci, u32 intn, u32 active, u32 trigger) | |||
76 | extern void vrc5477_irq_init(u32 base); | 76 | extern void vrc5477_irq_init(u32 base); |
77 | extern void mips_cpu_irq_init(u32 base); | 77 | extern void mips_cpu_irq_init(u32 base); |
78 | extern asmlinkage void ddb5477_handle_int(void); | 78 | extern asmlinkage void ddb5477_handle_int(void); |
79 | extern int setup_irq(unsigned int irq, struct irqaction *irqaction); | 79 | extern int setup_irq(unsigned int irq, struct irqaction *irqaction); |
80 | static struct irqaction irq_cascade = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL }; | 80 | static struct irqaction irq_cascade = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL }; |
81 | 81 | ||
82 | void __init arch_init_irq(void) | 82 | void __init arch_init_irq(void) |
@@ -94,7 +94,7 @@ void __init arch_init_irq(void) | |||
94 | /* setup PCI interrupt attributes */ | 94 | /* setup PCI interrupt attributes */ |
95 | set_pci_int_attr(PCI0, INTA, ACTIVE_LOW, LEVEL_SENSE); | 95 | set_pci_int_attr(PCI0, INTA, ACTIVE_LOW, LEVEL_SENSE); |
96 | set_pci_int_attr(PCI0, INTB, ACTIVE_LOW, LEVEL_SENSE); | 96 | set_pci_int_attr(PCI0, INTB, ACTIVE_LOW, LEVEL_SENSE); |
97 | if (mips_machtype == MACH_NEC_ROCKHOPPERII) | 97 | if (mips_machtype == MACH_NEC_ROCKHOPPERII) |
98 | set_pci_int_attr(PCI0, INTC, ACTIVE_HIGH, LEVEL_SENSE); | 98 | set_pci_int_attr(PCI0, INTC, ACTIVE_HIGH, LEVEL_SENSE); |
99 | else | 99 | else |
100 | set_pci_int_attr(PCI0, INTC, ACTIVE_LOW, LEVEL_SENSE); | 100 | set_pci_int_attr(PCI0, INTC, ACTIVE_LOW, LEVEL_SENSE); |
@@ -134,7 +134,7 @@ void __init arch_init_irq(void) | |||
134 | 134 | ||
135 | /* setup cascade interrupts */ | 135 | /* setup cascade interrupts */ |
136 | setup_irq(VRC5477_IRQ_BASE + VRC5477_I8259_CASCADE, &irq_cascade); | 136 | setup_irq(VRC5477_IRQ_BASE + VRC5477_I8259_CASCADE, &irq_cascade); |
137 | setup_irq(CPU_IRQ_BASE + CPU_VRC5477_CASCADE, &irq_cascade); | 137 | setup_irq(CPU_IRQ_BASE + CPU_VRC5477_CASCADE, &irq_cascade); |
138 | 138 | ||
139 | /* hook up the first-level interrupt handler */ | 139 | /* hook up the first-level interrupt handler */ |
140 | set_except_vector(0, ddb5477_handle_int); | 140 | set_except_vector(0, ddb5477_handle_int); |