1 files changed, 4 insertions, 5 deletions

diff --git a/arch/mips/ddb5xxx/ddb5477/irq.c b/arch/mips/ddb5xxx/ddb5477/irq.c
index a8bd2e66705c..2b23234a5b95 100644
--- a/arch/mips/ddb5xxx/ddb5477/irq.c
+++ b/arch/mips/ddb5xxx/ddb5477/irq.c
@@ -17,6 +17,7 @@
 #include <linux/ptrace.h>
 
 #include <asm/i8259.h>
+#include <asm/irq_cpu.h>
 #include <asm/system.h>
 #include <asm/mipsregs.h>
 #include <asm/debug.h>
@@ -73,7 +74,6 @@ set_pci_int_attr(u32 pci, u32 intn, u32 active, u32 trigger)
 }
 
 extern void vrc5477_irq_init(u32 base);
-extern void mips_cpu_irq_init(u32 base);
 static struct irqaction irq_cascade = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL };
 
 void __init arch_init_irq(void)
@@ -125,7 +125,7 @@ void __init arch_init_irq(void)
 
         /* init all controllers */
         init_i8259_irqs();
-        mips_cpu_irq_init(CPU_IRQ_BASE);
+        mips_cpu_irq_init();
         vrc5477_irq_init(VRC5477_IRQ_BASE);
 
 
@@ -146,8 +146,7 @@ u8 i8259_interrupt_ack(void)
         irq = *(volatile u8 *) KSEG1ADDR(DDB_PCI_IACK_BASE);
         ddb_out32(DDB_PCIINIT10, reg);
 
-        /* i8259.c set the base vector to be 0x0 */
-        return irq + I8259_IRQ_BASE;
+        return irq;
 }
 /*
  * the first level int-handler will jump here if it is a vrc5477 irq
@@ -177,7 +176,7 @@ static void vrc5477_irq_dispatch(void)
                 /* check for i8259 interrupts */
                 if (intStatus & (1 << VRC5477_I8259_CASCADE)) {
                         int i8259_irq = i8259_interrupt_ack();
-                        do_IRQ(I8259_IRQ_BASE + i8259_irq);
+                        do_IRQ(i8259_irq);
                         return;
                 }
         }