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Diffstat (limited to 'arch/mips/ddb5xxx/ddb5074/irq.c')
-rw-r--r--arch/mips/ddb5xxx/ddb5074/irq.c26
1 files changed, 18 insertions, 8 deletions
diff --git a/arch/mips/ddb5xxx/ddb5074/irq.c b/arch/mips/ddb5xxx/ddb5074/irq.c
index 45088a1be414..60c087b7738c 100644
--- a/arch/mips/ddb5xxx/ddb5074/irq.c
+++ b/arch/mips/ddb5xxx/ddb5074/irq.c
@@ -21,8 +21,6 @@
21#include <asm/ddb5xxx/ddb5074.h> 21#include <asm/ddb5xxx/ddb5074.h>
22 22
23 23
24extern asmlinkage void ddbIRQ(void);
25
26static struct irqaction irq_cascade = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL }; 24static struct irqaction irq_cascade = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL };
27 25
28#define M1543_PNP_CONFIG 0x03f0 /* PnP Config Port */ 26#define M1543_PNP_CONFIG 0x03f0 /* PnP Config Port */
@@ -90,7 +88,7 @@ static void m1543_irq_setup(void)
90 88
91} 89}
92 90
93void ddb_local0_irqdispatch(struct pt_regs *regs) 91static void ddb_local0_irqdispatch(struct pt_regs *regs)
94{ 92{
95 u32 mask; 93 u32 mask;
96 int nile4_irq; 94 int nile4_irq;
@@ -118,29 +116,41 @@ void ddb_local0_irqdispatch(struct pt_regs *regs)
118 } 116 }
119} 117}
120 118
121void ddb_local1_irqdispatch(void) 119static void ddb_local1_irqdispatch(void)
122{ 120{
123 printk("ddb_local1_irqdispatch called\n"); 121 printk("ddb_local1_irqdispatch called\n");
124} 122}
125 123
126void ddb_buserror_irq(void) 124static void ddb_buserror_irq(void)
127{ 125{
128 printk("ddb_buserror_irq called\n"); 126 printk("ddb_buserror_irq called\n");
129} 127}
130 128
131void ddb_8254timer_irq(void) 129static void ddb_8254timer_irq(void)
132{ 130{
133 printk("ddb_8254timer_irq called\n"); 131 printk("ddb_8254timer_irq called\n");
134} 132}
135 133
134asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
135{
136 unsigned int pending = read_c0_cause() & read_c0_status();
137
138 if (pending & CAUSEF_IP2)
139 ddb_local0_irqdispatch(regs);
140 else if (pending & CAUSEF_IP3)
141 ddb_local1_irqdispatch();
142 else if (pending & CAUSEF_IP6)
143 ddb_buserror_irq();
144 else if (pending & (CAUSEF_IP4 | CAUSEF_IP5))
145 ddb_8254timer_irq();
146}
147
136void __init arch_init_irq(void) 148void __init arch_init_irq(void)
137{ 149{
138 /* setup cascade interrupts */ 150 /* setup cascade interrupts */
139 setup_irq(NILE4_IRQ_BASE + NILE4_INT_INTE, &irq_cascade); 151 setup_irq(NILE4_IRQ_BASE + NILE4_INT_INTE, &irq_cascade);
140 setup_irq(CPU_IRQ_BASE + CPU_NILE4_CASCADE, &irq_cascade); 152 setup_irq(CPU_IRQ_BASE + CPU_NILE4_CASCADE, &irq_cascade);
141 153
142 set_except_vector(0, ddbIRQ);
143
144 nile4_irq_setup(NILE4_IRQ_BASE); 154 nile4_irq_setup(NILE4_IRQ_BASE);
145 m1543_irq_setup(); 155 m1543_irq_setup();
146 init_i8259_irqs(); 156 init_i8259_irqs();