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-rw-r--r--arch/mips/cobalt/Makefile2
-rw-r--r--arch/mips/cobalt/int-handler.S25
-rw-r--r--arch/mips/cobalt/irq.c6
3 files changed, 2 insertions, 31 deletions
diff --git a/arch/mips/cobalt/Makefile b/arch/mips/cobalt/Makefile
index 720e757b2b64..225ac8f34ccd 100644
--- a/arch/mips/cobalt/Makefile
+++ b/arch/mips/cobalt/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the Cobalt micro systems family specific parts of the kernel 2# Makefile for the Cobalt micro systems family specific parts of the kernel
3# 3#
4 4
5obj-y := irq.o int-handler.o reset.o setup.o 5obj-y := irq.o reset.o setup.o
6 6
7obj-$(CONFIG_EARLY_PRINTK) += console.o 7obj-$(CONFIG_EARLY_PRINTK) += console.o
8 8
diff --git a/arch/mips/cobalt/int-handler.S b/arch/mips/cobalt/int-handler.S
deleted file mode 100644
index e75d5e3ca868..000000000000
--- a/arch/mips/cobalt/int-handler.S
+++ /dev/null
@@ -1,25 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1995, 1996, 1997, 2003 by Ralf Baechle
7 * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
8 */
9#include <asm/asm.h>
10#include <asm/mipsregs.h>
11#include <asm/mach-cobalt/cobalt.h>
12#include <asm/regdef.h>
13#include <asm/stackframe.h>
14
15 .text
16 .align 5
17 NESTED(cobalt_handle_int, PT_SIZE, sp)
18 SAVE_ALL
19 CLI
20
21 PTR_LA ra, ret_from_irq
22 move a0, sp
23 j cobalt_irq
24
25 END(cobalt_handle_int)
diff --git a/arch/mips/cobalt/irq.c b/arch/mips/cobalt/irq.c
index f9a108820d6e..0b75f4fb7195 100644
--- a/arch/mips/cobalt/irq.c
+++ b/arch/mips/cobalt/irq.c
@@ -20,8 +20,6 @@
20 20
21#include <asm/mach-cobalt/cobalt.h> 21#include <asm/mach-cobalt/cobalt.h>
22 22
23extern void cobalt_handle_int(void);
24
25/* 23/*
26 * We have two types of interrupts that we handle, ones that come in through 24 * We have two types of interrupts that we handle, ones that come in through
27 * the CPU interrupt lines, and ones that come in on the via chip. The CPU 25 * the CPU interrupt lines, and ones that come in on the via chip. The CPU
@@ -79,7 +77,7 @@ static inline void via_pic_irq(struct pt_regs *regs)
79 do_IRQ(irq, regs); 77 do_IRQ(irq, regs);
80} 78}
81 79
82asmlinkage void cobalt_irq(struct pt_regs *regs) 80asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
83{ 81{
84 unsigned pending; 82 unsigned pending;
85 83
@@ -122,8 +120,6 @@ void __init arch_init_irq(void)
122 */ 120 */
123 GALILEO_OUTL(0, GT_INTRMASK_OFS); 121 GALILEO_OUTL(0, GT_INTRMASK_OFS);
124 122
125 set_except_vector(0, cobalt_handle_int);
126
127 init_i8259_irqs(); /* 0 ... 15 */ 123 init_i8259_irqs(); /* 0 ... 15 */
128 mips_cpu_irq_init(COBALT_CPU_IRQ); /* 16 ... 23 */ 124 mips_cpu_irq_init(COBALT_CPU_IRQ); /* 16 ... 23 */
129 125