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-rw-r--r--arch/mips/cobalt/Makefile7
-rw-r--r--arch/mips/cobalt/int-handler.S25
-rw-r--r--arch/mips/cobalt/irq.c102
-rw-r--r--arch/mips/cobalt/promcon.c87
-rw-r--r--arch/mips/cobalt/reset.c68
-rw-r--r--arch/mips/cobalt/setup.c150
6 files changed, 439 insertions, 0 deletions
diff --git a/arch/mips/cobalt/Makefile b/arch/mips/cobalt/Makefile
new file mode 100644
index 000000000000..a5e6554b2326
--- /dev/null
+++ b/arch/mips/cobalt/Makefile
@@ -0,0 +1,7 @@
1#
2# Makefile for the Cobalt micro systems family specific parts of the kernel
3#
4
5obj-y := irq.o int-handler.o reset.o setup.o promcon.o
6
7EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/cobalt/int-handler.S b/arch/mips/cobalt/int-handler.S
new file mode 100644
index 000000000000..1a21dec1b3ca
--- /dev/null
+++ b/arch/mips/cobalt/int-handler.S
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1995, 1996, 1997, 2003 by Ralf Baechle
7 * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
8 */
9#include <asm/asm.h>
10#include <asm/mipsregs.h>
11#include <asm/cobalt/cobalt.h>
12#include <asm/regdef.h>
13#include <asm/stackframe.h>
14
15 .text
16 .align 5
17 NESTED(cobalt_handle_int, PT_SIZE, sp)
18 SAVE_ALL
19 CLI
20
21 la ra, ret_from_irq
22 move a1, sp
23 j cobalt_irq
24
25 END(cobalt_handle_int)
diff --git a/arch/mips/cobalt/irq.c b/arch/mips/cobalt/irq.c
new file mode 100644
index 000000000000..6d2a81581397
--- /dev/null
+++ b/arch/mips/cobalt/irq.c
@@ -0,0 +1,102 @@
1/*
2 * IRQ vector handles
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1995, 1996, 1997, 2003 by Ralf Baechle
9 */
10#include <linux/kernel.h>
11#include <linux/init.h>
12#include <linux/irq.h>
13
14#include <asm/i8259.h>
15#include <asm/irq_cpu.h>
16#include <asm/gt64120.h>
17#include <asm/ptrace.h>
18
19#include <asm/cobalt/cobalt.h>
20
21extern void cobalt_handle_int(void);
22
23/*
24 * We have two types of interrupts that we handle, ones that come in through
25 * the CPU interrupt lines, and ones that come in on the via chip. The CPU
26 * mappings are:
27 *
28 * 16, - Software interrupt 0 (unused) IE_SW0
29 * 17 - Software interrupt 1 (unused) IE_SW0
30 * 18 - Galileo chip (timer) IE_IRQ0
31 * 19 - Tulip 0 + NCR SCSI IE_IRQ1
32 * 20 - Tulip 1 IE_IRQ2
33 * 21 - 16550 UART IE_IRQ3
34 * 22 - VIA southbridge PIC IE_IRQ4
35 * 23 - unused IE_IRQ5
36 *
37 * The VIA chip is a master/slave 8259 setup and has the following interrupts:
38 *
39 * 8 - RTC
40 * 9 - PCI
41 * 14 - IDE0
42 * 15 - IDE1
43 */
44
45asmlinkage void cobalt_irq(struct pt_regs *regs)
46{
47 unsigned int pending = read_c0_status() & read_c0_cause();
48
49 if (pending & CAUSEF_IP2) { /* int 18 */
50 unsigned long irq_src = GALILEO_INL(GT_INTRCAUSE_OFS);
51
52 /* Check for timer irq ... */
53 if (irq_src & GALILEO_T0EXP) {
54 /* Clear the int line */
55 GALILEO_OUTL(0, GT_INTRCAUSE_OFS);
56 do_IRQ(COBALT_TIMER_IRQ, regs);
57 }
58 return;
59 }
60
61 if (pending & CAUSEF_IP6) { /* int 22 */
62 int irq = i8259_irq();
63
64 if (irq >= 0)
65 do_IRQ(irq, regs);
66 return;
67 }
68
69 if (pending & CAUSEF_IP3) { /* int 19 */
70 do_IRQ(COBALT_ETH0_IRQ, regs);
71 return;
72 }
73
74 if (pending & CAUSEF_IP4) { /* int 20 */
75 do_IRQ(COBALT_ETH1_IRQ, regs);
76 return;
77 }
78
79 if (pending & CAUSEF_IP5) { /* int 21 */
80 do_IRQ(COBALT_SERIAL_IRQ, regs);
81 return;
82 }
83
84 if (pending & CAUSEF_IP7) { /* int 23 */
85 do_IRQ(COBALT_QUBE_SLOT_IRQ, regs);
86 return;
87 }
88}
89
90void __init arch_init_irq(void)
91{
92 set_except_vector(0, cobalt_handle_int);
93
94 init_i8259_irqs(); /* 0 ... 15 */
95 mips_cpu_irq_init(16); /* 16 ... 23 */
96
97 /*
98 * Mask all cpu interrupts
99 * (except IE4, we already masked those at VIA level)
100 */
101 change_c0_status(ST0_IM, IE_IRQ4);
102}
diff --git a/arch/mips/cobalt/promcon.c b/arch/mips/cobalt/promcon.c
new file mode 100644
index 000000000000..f03df761e9f1
--- /dev/null
+++ b/arch/mips/cobalt/promcon.c
@@ -0,0 +1,87 @@
1/*
2 * PROM console for Cobalt Raq2
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1995, 1996, 1997 by Ralf Baechle
9 * Copyright (C) 2001 by Liam Davies (ldavies@agile.tv)
10 *
11 */
12
13#include <linux/init.h>
14#include <linux/console.h>
15#include <linux/kdev_t.h>
16#include <linux/serial_reg.h>
17
18#include <asm/delay.h>
19#include <asm/serial.h>
20#include <asm/io.h>
21
22static unsigned long port = 0xc800000;
23
24static __inline__ void ns16550_cons_put_char(char ch, unsigned long ioaddr)
25{
26 char lsr;
27
28 do {
29 lsr = inb(ioaddr + UART_LSR);
30 } while ((lsr & (UART_LSR_TEMT | UART_LSR_THRE)) != (UART_LSR_TEMT | UART_LSR_THRE));
31 outb(ch, ioaddr + UART_TX);
32}
33
34static __inline__ char ns16550_cons_get_char(unsigned long ioaddr)
35{
36 while ((inb(ioaddr + UART_LSR) & UART_LSR_DR) == 0)
37 udelay(1);
38 return inb(ioaddr + UART_RX);
39}
40
41void ns16550_console_write(struct console *co, const char *s, unsigned count)
42{
43 char lsr, ier;
44 unsigned i;
45
46 ier = inb(port + UART_IER);
47 outb(0x00, port + UART_IER);
48 for (i=0; i < count; i++, s++) {
49
50 if(*s == '\n')
51 ns16550_cons_put_char('\r', port);
52 ns16550_cons_put_char(*s, port);
53 }
54
55 do {
56 lsr = inb(port + UART_LSR);
57 } while ((lsr & (UART_LSR_TEMT | UART_LSR_THRE)) != (UART_LSR_TEMT | UART_LSR_THRE));
58
59 outb(ier, port + UART_IER);
60}
61
62char getDebugChar(void)
63{
64 return ns16550_cons_get_char(port);
65}
66
67void putDebugChar(char kgdb_char)
68{
69 ns16550_cons_put_char(kgdb_char, port);
70}
71
72static struct console ns16550_console = {
73 .name = "prom",
74 .setup = NULL,
75 .write = ns16550_console_write,
76 .flags = CON_PRINTBUFFER,
77 .index = -1,
78};
79
80static int __init ns16550_setup_console(void)
81{
82 register_console(&ns16550_console);
83
84 return 0;
85}
86
87console_initcall(ns16550_setup_console);
diff --git a/arch/mips/cobalt/reset.c b/arch/mips/cobalt/reset.c
new file mode 100644
index 000000000000..084c8e59f42c
--- /dev/null
+++ b/arch/mips/cobalt/reset.c
@@ -0,0 +1,68 @@
1/*
2 * Cobalt Reset operations
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1995, 1996, 1997 by Ralf Baechle
9 * Copyright (C) 2001 by Liam Davies (ldavies@agile.tv)
10 */
11#include <linux/sched.h>
12#include <linux/mm.h>
13#include <asm/cacheflush.h>
14#include <asm/io.h>
15#include <asm/processor.h>
16#include <asm/reboot.h>
17#include <asm/system.h>
18#include <asm/mipsregs.h>
19
20void cobalt_machine_restart(char *command)
21{
22 *(volatile char *)0xbc000000 = 0x0f;
23
24 /*
25 * Ouch, we're still alive ... This time we take the silver bullet ...
26 * ... and find that we leave the hardware in a state in which the
27 * kernel in the flush locks up somewhen during of after the PCI
28 * detection stuff.
29 */
30 set_c0_status(ST0_BEV | ST0_ERL);
31 change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
32 flush_cache_all();
33 write_c0_wired(0);
34 __asm__ __volatile__(
35 "jr\t%0"
36 :
37 : "r" (0xbfc00000));
38}
39
40extern int led_state;
41#define kLED 0xBC000000
42#define LEDSet(x) (*(volatile unsigned char *) kLED) = (( unsigned char)x)
43
44void cobalt_machine_halt(void)
45{
46 int mark;
47
48 /* Blink our cute? little LED (number 3)... */
49 while (1) {
50 led_state = led_state | ( 1 << 3 );
51 LEDSet(led_state);
52 mark = jiffies;
53 while (jiffies<(mark+HZ));
54 led_state = led_state & ~( 1 << 3 );
55 LEDSet(led_state);
56 mark = jiffies;
57 while (jiffies<(mark+HZ));
58 }
59}
60
61/*
62 * This triggers the luser mode device driver for the power switch ;-)
63 */
64void cobalt_machine_power_off(void)
65{
66 printk("You can switch the machine off now.\n");
67 cobalt_machine_halt();
68}
diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c
new file mode 100644
index 000000000000..6b4737e425ed
--- /dev/null
+++ b/arch/mips/cobalt/setup.c
@@ -0,0 +1,150 @@
1/*
2 * Setup pointers to hardware dependent routines.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1996, 1997, 2004 by Ralf Baechle (ralf@linux-mips.org)
9 * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
10 *
11 */
12#include <linux/config.h>
13#include <linux/interrupt.h>
14#include <linux/pci.h>
15#include <linux/init.h>
16
17#include <asm/bootinfo.h>
18#include <asm/time.h>
19#include <asm/io.h>
20#include <asm/irq.h>
21#include <asm/processor.h>
22#include <asm/reboot.h>
23#include <asm/gt64120.h>
24
25#include <asm/cobalt/cobalt.h>
26
27extern void cobalt_machine_restart(char *command);
28extern void cobalt_machine_halt(void);
29extern void cobalt_machine_power_off(void);
30
31int cobalt_board_id;
32
33static char my_cmdline[CL_SIZE] = {
34 "console=ttyS0,115200 "
35#ifdef CONFIG_IP_PNP
36 "ip=on "
37#endif
38#ifdef CONFIG_ROOT_NFS
39 "root=/dev/nfs "
40#else
41 "root=/dev/hda1 "
42#endif
43 };
44
45const char *get_system_type(void)
46{
47 return "MIPS Cobalt";
48}
49
50static void __init cobalt_timer_setup(struct irqaction *irq)
51{
52 /* Load timer value for 150 Hz */
53 GALILEO_OUTL(500000, GT_TC0_OFS);
54
55 /* Register our timer interrupt */
56 setup_irq(COBALT_TIMER_IRQ, irq);
57
58 /* Enable timer ints */
59 GALILEO_OUTL((GALILEO_ENTC0 | GALILEO_SELTC0), GT_TC_CONTROL_OFS);
60 /* Unmask timer int */
61 GALILEO_OUTL(0x100, GT_INTRMASK_OFS);
62}
63
64extern struct pci_ops gt64111_pci_ops;
65
66static struct resource cobalt_mem_resource = {
67 "GT64111 PCI MEM", GT64111_IO_BASE, 0xffffffffUL, IORESOURCE_MEM
68};
69
70static struct resource cobalt_io_resource = {
71 "GT64111 IO MEM", 0x00001000UL, 0x0fffffffUL, IORESOURCE_IO
72};
73
74static struct resource cobalt_io_resources[] = {
75 { "dma1", 0x00, 0x1f, IORESOURCE_BUSY },
76 { "timer", 0x40, 0x5f, IORESOURCE_BUSY },
77 { "keyboard", 0x60, 0x6f, IORESOURCE_BUSY },
78 { "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY },
79 { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
80};
81
82#define COBALT_IO_RESOURCES (sizeof(cobalt_io_resources)/sizeof(struct resource))
83
84static struct pci_controller cobalt_pci_controller = {
85 .pci_ops = &gt64111_pci_ops,
86 .mem_resource = &cobalt_mem_resource,
87 .mem_offset = 0,
88 .io_resource = &cobalt_io_resource,
89 .io_offset = 0x00001000UL - GT64111_IO_BASE
90};
91
92static void __init cobalt_setup(void)
93{
94 unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0);
95 int i;
96
97 _machine_restart = cobalt_machine_restart;
98 _machine_halt = cobalt_machine_halt;
99 _machine_power_off = cobalt_machine_power_off;
100
101 board_timer_setup = cobalt_timer_setup;
102
103 set_io_port_base(KSEG1ADDR(GT64111_IO_BASE));
104
105 /*
106 * This is a prom style console. We just poke at the
107 * UART to make it talk.
108 * Only use this console if you really screw up and can't
109 * get to the stage of setting up a real serial console.
110 */
111 /*ns16550_setup_console();*/
112
113 /* request I/O space for devices used on all i[345]86 PCs */
114 for (i = 0; i < COBALT_IO_RESOURCES; i++)
115 request_resource(&ioport_resource, cobalt_io_resources + i);
116
117 /* Read the cobalt id register out of the PCI config space */
118 PCI_CFG_SET(devfn, (VIA_COBALT_BRD_ID_REG & ~0x3));
119 cobalt_board_id = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
120 cobalt_board_id >>= ((VIA_COBALT_BRD_ID_REG & 3) * 8);
121 cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id);
122
123#ifdef CONFIG_PCI
124 register_pci_controller(&cobalt_pci_controller);
125#endif
126}
127
128early_initcall(cobalt_setup);
129
130/*
131 * Prom init. We read our one and only communication with the firmware.
132 * Grab the amount of installed memory
133 */
134
135void __init prom_init(void)
136{
137 int argc = fw_arg0;
138
139 strcpy(arcs_cmdline, my_cmdline);
140
141 mips_machgroup = MACH_GROUP_COBALT;
142
143 add_memory_region(0x0, argc & 0x7fffffff, BOOT_MEM_RAM);
144}
145
146unsigned long __init prom_free_prom_memory(void)
147{
148 /* Nothing to do! */
149 return 0;
150}
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